p5membar.c revision 1.2.4.2
1 1.2.4.2 mrg /* $NetBSD: p5membar.c,v 1.2.4.2 2012/02/18 07:31:19 mrg Exp $ */ 2 1.2.4.2 mrg 3 1.2.4.2 mrg /*- 4 1.2.4.2 mrg * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 1.2.4.2 mrg * All rights reserved. 6 1.2.4.2 mrg * 7 1.2.4.2 mrg * This code is derived from software contributed to The NetBSD Foundation 8 1.2.4.2 mrg * by Radoslaw Kujawa. 9 1.2.4.2 mrg * 10 1.2.4.2 mrg * Redistribution and use in source and binary forms, with or without 11 1.2.4.2 mrg * modification, are permitted provided that the following conditions 12 1.2.4.2 mrg * are met: 13 1.2.4.2 mrg * 1. Redistributions of source code must retain the above copyright 14 1.2.4.2 mrg * notice, this list of conditions and the following disclaimer. 15 1.2.4.2 mrg * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.4.2 mrg * notice, this list of conditions and the following disclaimer in the 17 1.2.4.2 mrg * documentation and/or other materials provided with the distribution. 18 1.2.4.2 mrg * 19 1.2.4.2 mrg * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.2.4.2 mrg * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.2.4.2 mrg * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.2.4.2 mrg * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.2.4.2 mrg * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.2.4.2 mrg * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.2.4.2 mrg * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.2.4.2 mrg * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.2.4.2 mrg * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.2.4.2 mrg * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.2.4.2 mrg * POSSIBILITY OF SUCH DAMAGE. 30 1.2.4.2 mrg */ 31 1.2.4.2 mrg 32 1.2.4.2 mrg /* 33 1.2.4.2 mrg * Handle autoconfigured PCI resources on some revisions of CyberVision PPC, 34 1.2.4.2 mrg * BlizzardVision PPC graphics cards and all G-REX PCI busboards. 35 1.2.4.2 mrg */ 36 1.2.4.2 mrg 37 1.2.4.2 mrg #include <sys/types.h> 38 1.2.4.2 mrg #include <sys/param.h> 39 1.2.4.2 mrg #include <sys/time.h> 40 1.2.4.2 mrg #include <sys/systm.h> 41 1.2.4.2 mrg #include <sys/errno.h> 42 1.2.4.2 mrg #include <sys/device.h> 43 1.2.4.2 mrg #include <sys/malloc.h> 44 1.2.4.2 mrg #include <sys/extent.h> 45 1.2.4.2 mrg 46 1.2.4.2 mrg #include <uvm/uvm_extern.h> 47 1.2.4.2 mrg 48 1.2.4.2 mrg #include <machine/bus.h> 49 1.2.4.2 mrg #include <machine/cpu.h> 50 1.2.4.2 mrg 51 1.2.4.2 mrg #include <m68k/bus_dma.h> 52 1.2.4.2 mrg #include <amiga/dev/zbusvar.h> 53 1.2.4.2 mrg #include <amiga/pci/p5pbreg.h> 54 1.2.4.2 mrg #include <amiga/pci/p5pbvar.h> 55 1.2.4.2 mrg #include <amiga/pci/p5membarvar.h> 56 1.2.4.2 mrg 57 1.2.4.2 mrg /* Zorro IDs */ 58 1.2.4.2 mrg #define ZORRO_MANID_P5 8512 59 1.2.4.2 mrg #define ZORRO_PRODID_P5PB 101 /* CVPPC/BVPPC/G-REX */ 60 1.2.4.2 mrg 61 1.2.4.2 mrg static int p5membar_match(struct device *, struct cfdata *, void *); 62 1.2.4.2 mrg static void p5membar_attach(struct device *, struct device *, void *); 63 1.2.4.2 mrg 64 1.2.4.2 mrg CFATTACH_DECL_NEW(p5membar, sizeof(struct p5membar_softc), 65 1.2.4.2 mrg p5membar_match, p5membar_attach, NULL, NULL); 66 1.2.4.2 mrg 67 1.2.4.2 mrg static int 68 1.2.4.2 mrg p5membar_match(device_t parent, cfdata_t cf, void *aux) 69 1.2.4.2 mrg { 70 1.2.4.2 mrg struct zbus_args *zap; 71 1.2.4.2 mrg 72 1.2.4.2 mrg zap = aux; 73 1.2.4.2 mrg 74 1.2.4.2 mrg if (zap->manid != ZORRO_MANID_P5) 75 1.2.4.2 mrg return 0; 76 1.2.4.2 mrg 77 1.2.4.2 mrg if (zap->prodid != ZORRO_PRODID_P5PB) 78 1.2.4.2 mrg return 0; 79 1.2.4.2 mrg 80 1.2.4.2 mrg return 1; 81 1.2.4.2 mrg } 82 1.2.4.2 mrg 83 1.2.4.2 mrg static void 84 1.2.4.2 mrg p5membar_attach(device_t parent, device_t self, void *aux) 85 1.2.4.2 mrg { 86 1.2.4.2 mrg struct zbus_args *zap; 87 1.2.4.2 mrg struct p5membar_softc *sc; 88 1.2.4.2 mrg 89 1.2.4.2 mrg sc = device_private(self); 90 1.2.4.2 mrg zap = aux; 91 1.2.4.2 mrg 92 1.2.4.2 mrg sc->sc_dev = self; 93 1.2.4.2 mrg sc->sc_base = zap->pa; 94 1.2.4.2 mrg sc->sc_size = zap->size; 95 1.2.4.2 mrg 96 1.2.4.2 mrg if ((bus_addr_t) zap->pa == P5BUS_PCI_CONF_BASE) { 97 1.2.4.2 mrg aprint_normal(": PCI config area, %d kB\n", 98 1.2.4.2 mrg zap->size / 1024); 99 1.2.4.2 mrg sc->sc_type = P5MEMBAR_TYPE_INTERNAL; 100 1.2.4.2 mrg } else if ((bus_addr_t) zap->pa == P5BUS_PCI_IO_BASE) { 101 1.2.4.2 mrg aprint_normal(": PCI I/O area, %d kB\n", 102 1.2.4.2 mrg zap->size / 1024); 103 1.2.4.2 mrg sc->sc_type = P5MEMBAR_TYPE_INTERNAL; 104 1.2.4.2 mrg } else if ((bus_addr_t) zap->pa == P5BUS_BRIDGE_BASE) { 105 1.2.4.2 mrg aprint_normal(": PCI bridge, %d kB\n", 106 1.2.4.2 mrg zap->size / 1024); 107 1.2.4.2 mrg sc->sc_type = P5MEMBAR_TYPE_INTERNAL; 108 1.2.4.2 mrg } else { 109 1.2.4.2 mrg aprint_normal(": PCI memory BAR, %d kB\n", 110 1.2.4.2 mrg zap->size / 1024); 111 1.2.4.2 mrg sc->sc_type = P5MEMBAR_TYPE_MEMORY; 112 1.2.4.2 mrg } 113 1.2.4.2 mrg 114 1.2.4.2 mrg /* 115 1.2.4.2 mrg * Do nothing here, p5pb should find the p5membar devices 116 1.2.4.2 mrg * and do the right(tm) thing. 117 1.2.4.2 mrg */ 118 1.2.4.2 mrg 119 1.2.4.2 mrg } 120 1.2.4.2 mrg 121
Indexes created Tue Oct 14 11:09:46 GMT 2025