1 1.21 riastrad /* $NetBSD: cpu.h,v 1.21 2022/02/16 23:49:26 riastradh Exp $ */ 2 1.6 is 3 1.6 is /* 4 1.6 is * Copyright (C) 1995-1997 Wolfgang Solfrank. 5 1.6 is * Copyright (C) 1995-1997 TooLs GmbH. 6 1.6 is * All rights reserved. 7 1.6 is * 8 1.6 is * Redistribution and use in source and binary forms, with or without 9 1.6 is * modification, are permitted provided that the following conditions 10 1.6 is * are met: 11 1.6 is * 1. Redistributions of source code must retain the above copyright 12 1.6 is * notice, this list of conditions and the following disclaimer. 13 1.6 is * 2. Redistributions in binary form must reproduce the above copyright 14 1.6 is * notice, this list of conditions and the following disclaimer in the 15 1.6 is * documentation and/or other materials provided with the distribution. 16 1.6 is * 3. All advertising materials mentioning features or use of this software 17 1.6 is * must display the following acknowledgement: 18 1.16 phx * This product includes software developed by TooLs GmbH. 19 1.6 is * 4. The name of TooLs GmbH may not be used to endorse or promote products 20 1.6 is * derived from this software without specific prior written permission. 21 1.6 is * 22 1.6 is * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 23 1.6 is * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 1.6 is * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 1.6 is * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 1.6 is * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 27 1.6 is * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 28 1.6 is * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 29 1.6 is * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 30 1.6 is * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 31 1.6 is * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 1.6 is */ 33 1.20 matt #ifndef _AMIGAPPC_CPU_H_ 34 1.20 matt #define _AMIGAPPC_CPU_H_ 35 1.20 matt #define _MACHINE_CPU_H_ /* for <m68k/cpu.h> */ 36 1.1 is 37 1.20 matt #if defined(_KERNEL) && !defined(_MODULE) 38 1.16 phx #define CPU_MAXNUM 1 39 1.18 phx /* 40 1.18 phx * Amiga models 41 1.18 phx */ 42 1.16 phx #define A1200 1200 43 1.16 phx #define A3000 3000 44 1.16 phx #define A4000 4000 45 1.16 phx extern int machineid; 46 1.1 is 47 1.1 is /* 48 1.16 phx * Prototypes from amiga_init.c 49 1.16 phx */ 50 1.19 phx void *alloc_z2mem(long); 51 1.1 is 52 1.1 is /* 53 1.16 phx * Prototypes from autoconf.c 54 1.1 is */ 55 1.19 phx #define is_a600() 0 56 1.19 phx int is_a1200(void); 57 1.19 phx int is_a3000(void); 58 1.19 phx int is_a4000(void); 59 1.1 is 60 1.1 is /* 61 1.16 phx * Prototypes from machdep.c 62 1.1 is */ 63 1.16 phx int dma_cachectl(void *, int); 64 1.17 phx 65 1.17 phx /* 66 1.17 phx * Prototypes from powerpc/powerpc/trap.c 67 1.17 phx */ 68 1.17 phx int badaddr_read(void *, size_t, int *); 69 1.18 phx 70 1.18 phx /* 71 1.18 phx * Reorder protection when accessing device registers. 72 1.18 phx */ 73 1.21 riastrad #define amiga_membarrier() __asm volatile("eieio" ::: "memory") 74 1.18 phx 75 1.18 phx /* 76 1.18 phx * Finish all bus operations and flush pipelines. 77 1.18 phx */ 78 1.21 riastrad #define amiga_cpu_sync() __asm volatile("sync; isync" ::: "memory") 79 1.1 is 80 1.20 matt #endif /* _KERNEL && !_MODULE */ 81 1.20 matt 82 1.16 phx #include <powerpc/cpu.h> 83 1.16 phx 84 1.20 matt #endif /* _AMIGAPPC_CPU_H_ */ 85