intr.h revision 1.16
1/* $NetBSD: intr.h,v 1.16 2005/12/24 20:06:47 perry Exp $ */ 2 3/*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ignatios Souvatzis. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39/* 40 * machine/intr.h for the Amiga port. 41 * Currently, only a wrapper, for most of the stuff, around the old 42 * include files. 43 */ 44 45#ifndef _MACHINE_INTR_H_ 46#define _MACHINE_INTR_H_ 47 48#ifdef _KERNEL 49#include <amiga/amiga/isr.h> 50#include <amiga/include/mtpr.h> 51#endif 52 53/* ADAM: commented out 54#define IPL_SOFTSERIAL 1 55#define IPL_SOFTNET 1 56*/ 57 58#ifdef splaudio 59#undef splaudio 60#define splaudio spl6 61#endif 62 63#define spllpt() spl6() 64 65/* ADAM: from macppc/intr.h */ 66/* Interrupt priority `levels'. */ 67#define IPL_NONE 9 /* nothing */ 68#define IPL_SOFTCLOCK 8 /* timeouts */ 69#define IPL_SOFTNET 7 /* protocol stacks */ 70#define IPL_BIO 6 /* block I/O */ 71#define IPL_NET 5 /* network */ 72#define IPL_SOFTSERIAL 4 /* serial */ 73#define IPL_TTY 3 /* terminal */ 74#define IPL_VM 3 /* memory allocation */ 75#define IPL_AUDIO 2 /* audio */ 76#define IPL_CLOCK 1 /* clock */ 77#define IPL_HIGH 1 /* everything */ 78#define IPL_SERIAL 0 /* serial */ 79#define NIPL 10 80 81/* Interrupt sharing types. */ 82#define IST_NONE 0 /* none */ 83#define IST_PULSE 1 /* pulsed */ 84#define IST_EDGE 2 /* edge-triggered */ 85#define IST_LEVEL 3 /* level-triggered */ 86 87#ifndef _LOCORE 88 89/* 90 * Interrupt handler chains. intr_establish() inserts a handler into 91 * the list. The handler is called with its (single) argument. 92 */ 93struct intrhand { 94 int (*ih_fun) __P((void *)); 95 void *ih_arg; 96 u_long ih_count; 97 struct intrhand *ih_next; 98 int ih_level; 99 int ih_irq; 100}; 101 102void do_pending_int __P((void)); 103 104static inline int splraise __P((int)); 105static inline int spllower __P((int)); 106static inline void splx __P((int)); 107static inline void softintr __P((int)); 108 109extern volatile int cpl, ipending, astpending, tickspending; 110extern int imask[]; 111 112/* 113 * Reorder protection in the following inline functions is 114 * achieved with the "eieio" instruction which the assembler 115 * seems to detect and then doesn't move instructions past.... 116 */ 117static inline int 118splraise(ncpl) 119 int ncpl; 120{ 121 int ocpl; 122 123 __asm__ volatile("sync; eieio\n"); /* don't reorder.... */ 124 ocpl = cpl; 125 cpl = ocpl | ncpl; 126 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 127 return (ocpl); 128} 129 130static inline void 131splx(ncpl) 132 int ncpl; 133{ 134 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 135 cpl = ncpl; 136 if (ipending & ~ncpl) 137 do_pending_int(); 138 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 139} 140 141static inline int 142spllower(ncpl) 143 int ncpl; 144{ 145 int ocpl; 146 147 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 148 ocpl = cpl; 149 cpl = ncpl; 150 if (ipending & ~ncpl) 151 do_pending_int(); 152 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 153 return (ocpl); 154} 155 156/* Following code should be implemented with lwarx/stwcx to avoid 157 * the disable/enable. i need to read the manual once more.... */ 158static inline void 159softintr(ipl) 160 int ipl; 161{ 162 int msrsave; 163 164 __asm__ volatile("mfmsr %0" : "=r"(msrsave)); 165 __asm__ volatile("mtmsr %0" :: "r"(msrsave & ~PSL_EE)); 166 ipending |= 1 << ipl; 167 __asm__ volatile("mtmsr %0" :: "r"(msrsave)); 168} 169 170#define ICU_LEN 32 171 172/* Soft interrupt masks. */ 173/* 174#define SIR_CLOCK 28 175#define SIR_NET 29 176#define SIR_SERIAL 30 177*/ 178#define SPL_CLOCK 31 179 180/* 181 * Hardware interrupt masks 182 */ 183#define splbio() splraise(imask[IPL_BIO]) 184#define splnet() splraise(imask[IPL_NET]) 185#define spltty() splraise(imask[IPL_TTY]) 186#define splaudio() splraise(imask[IPL_AUDIO]) 187#define splclock() splraise(imask[IPL_CLOCK]) 188#define splstatclock() splclock() 189#define splserial() splraise(imask[IPL_SERIAL]) 190 191/* ADAM: see above 192#define spllpt() spltty() 193*/ 194 195/* 196 * Software interrupt masks 197 * 198 * NOTE: splsoftclock() is used by hardclock() to lower the priority from 199 * clock to softclock before it calls softclock(). 200 */ 201#define spllowersoftclock() spllower(imask[IPL_SOFTCLOCK]) 202#define splsoftclock() splraise(imask[IPL_SOFTCLOCK]) 203#define splsoftnet() splraise(imask[IPL_SOFTNET]) 204#define splsoftserial() splraise(imask[IPL_SOFTSERIAL]) 205 206/* 207 * Miscellaneous 208 */ 209#define splvm() splraise(imask[IPL_VM]) 210#define splhigh() splraise(imask[IPL_HIGH]) 211#define splsched() splhigh() 212#define spllock() splhigh() 213#define spl0() spllower(0) 214 215/* 216#define setsoftnet() softintr(SIR_NET) 217#define setsoftserial() softintr(SIR_SERIAL) 218*/ 219extern long intrcnt[]; 220 221#define CNT_IRQ0 0 222#define CNT_CLOCK 64 223#define CNT_SOFTCLOCK 65 224#define CNT_SOFTNET 66 225#define CNT_SOFTSERIAL 67 226 227#endif /* !_LOCORE */ 228 229#endif /* !_MACPPC_INTR_H_ */ 230