intr.h revision 1.21
1/* $NetBSD: intr.h,v 1.21 2009/03/14 14:45:54 dsl Exp $ */ 2 3/*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ignatios Souvatzis. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32/* 33 * machine/intr.h for the Amiga port. 34 * Currently, only a wrapper, for most of the stuff, around the old 35 * include files. 36 */ 37 38#ifndef _MACHINE_INTR_H_ 39#define _MACHINE_INTR_H_ 40 41#ifdef _KERNEL 42#include <amiga/amiga/isr.h> 43#include <amiga/include/mtpr.h> 44#endif 45 46/* ADAM: commented out 47#define IPL_SOFTSERIAL 1 48#define IPL_SOFTNET 1 49*/ 50 51#ifdef splaudio 52#undef splaudio 53#define splaudio spl6 54#endif 55 56#define spllpt() spl6() 57 58/* ADAM: from macppc/intr.h */ 59/* Interrupt priority `levels'. */ 60#define IPL_NONE 9 /* nothing */ 61#define IPL_SOFTCLOCK 8 /* timeouts */ 62#define IPL_SOFTNET 7 /* protocol stacks */ 63#define IPL_BIO 6 /* block I/O */ 64#define IPL_NET 5 /* network */ 65#define IPL_SOFTSERIAL 4 /* serial */ 66#define IPL_TTY 3 /* terminal */ 67#define IPL_VM 3 /* memory allocation */ 68#define IPL_AUDIO 2 /* audio */ 69#define IPL_CLOCK 1 /* clock */ 70#define IPL_HIGH 1 /* everything */ 71#define IPL_SERIAL 0 /* serial */ 72#define NIPL 10 73 74/* Interrupt sharing types. */ 75#define IST_NONE 0 /* none */ 76#define IST_PULSE 1 /* pulsed */ 77#define IST_EDGE 2 /* edge-triggered */ 78#define IST_LEVEL 3 /* level-triggered */ 79 80#ifndef _LOCORE 81 82/* 83 * Interrupt handler chains. intr_establish() inserts a handler into 84 * the list. The handler is called with its (single) argument. 85 */ 86struct intrhand { 87 int (*ih_fun)(void *); 88 void *ih_arg; 89 u_long ih_count; 90 struct intrhand *ih_next; 91 int ih_level; 92 int ih_irq; 93}; 94 95void do_pending_int(void); 96 97static __inline int splraise(int); 98static __inline int spllower(int); 99static __inline void splx(int); 100static __inline void softintr(int); 101 102extern volatile int cpl, ipending, astpending, tickspending; 103extern int imask[]; 104 105/* 106 * Reorder protection in the following inline functions is 107 * achieved with the "eieio" instruction which the assembler 108 * seems to detect and then doesn't move instructions past.... 109 */ 110static __inline int 111splraise(ncpl) 112 int ncpl; 113{ 114 int ocpl; 115 116 __asm volatile("sync; eieio\n"); /* don't reorder.... */ 117 ocpl = cpl; 118 cpl = ocpl | ncpl; 119 __asm volatile("sync; eieio\n"); /* reorder protect */ 120 return (ocpl); 121} 122 123static __inline void 124splx(ncpl) 125 int ncpl; 126{ 127 __asm volatile("sync; eieio\n"); /* reorder protect */ 128 cpl = ncpl; 129 if (ipending & ~ncpl) 130 do_pending_int(); 131 __asm volatile("sync; eieio\n"); /* reorder protect */ 132} 133 134static __inline int 135spllower(ncpl) 136 int ncpl; 137{ 138 int ocpl; 139 140 __asm volatile("sync; eieio\n"); /* reorder protect */ 141 ocpl = cpl; 142 cpl = ncpl; 143 if (ipending & ~ncpl) 144 do_pending_int(); 145 __asm volatile("sync; eieio\n"); /* reorder protect */ 146 return (ocpl); 147} 148 149/* Following code should be implemented with lwarx/stwcx to avoid 150 * the disable/enable. i need to read the manual once more.... */ 151static __inline void 152softintr(ipl) 153 int ipl; 154{ 155 int msrsave; 156 157 __asm volatile("mfmsr %0" : "=r"(msrsave)); 158 __asm volatile("mtmsr %0" :: "r"(msrsave & ~PSL_EE)); 159 ipending |= 1 << ipl; 160 __asm volatile("mtmsr %0" :: "r"(msrsave)); 161} 162 163#define ICU_LEN 32 164 165/* Soft interrupt masks. */ 166/* 167#define SIR_CLOCK 28 168#define SIR_NET 29 169#define SIR_SERIAL 30 170*/ 171#define SPL_CLOCK 31 172 173/* 174 * Hardware interrupt masks 175 */ 176#define splbio() splraise(imask[IPL_BIO]) 177#define splnet() splraise(imask[IPL_NET]) 178#define spltty() splraise(imask[IPL_TTY]) 179#define splaudio() splraise(imask[IPL_AUDIO]) 180#define splclock() splraise(imask[IPL_CLOCK]) 181#define splstatclock() splclock() 182#define splserial() splraise(imask[IPL_SERIAL]) 183 184/* ADAM: see above 185#define spllpt() spltty() 186*/ 187 188/* 189 * Software interrupt masks 190 */ 191#define splsoftclock() splraise(imask[IPL_SOFTCLOCK]) 192#define splsoftnet() splraise(imask[IPL_SOFTNET]) 193#define splsoftserial() splraise(imask[IPL_SOFTSERIAL]) 194 195/* 196 * Miscellaneous 197 */ 198#define splvm() splraise(imask[IPL_VM]) 199#define splhigh() splraise(imask[IPL_HIGH]) 200#define splsched() splhigh() 201#define spllock() splhigh() 202#define spl0() spllower(0) 203 204/* 205#define setsoftnet() softintr(SIR_NET) 206#define setsoftserial() softintr(SIR_SERIAL) 207*/ 208extern long intrcnt[]; 209 210#define CNT_IRQ0 0 211#define CNT_CLOCK 64 212#define CNT_SOFTCLOCK 65 213#define CNT_SOFTNET 66 214#define CNT_SOFTSERIAL 67 215 216#endif /* !_LOCORE */ 217 218#endif /* !_MACPPC_INTR_H_ */ 219