intr.h revision 1.8
1/* $NetBSD: intr.h,v 1.8 2001/04/13 23:29:58 thorpej Exp $ */ 2 3/*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Ignatios Souvatzis. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39/* 40 * machine/intr.h for the Amiga port. 41 * Currently, only a wrapper, for most of the stuff, around the old 42 * include files. 43 */ 44 45#ifndef _MACHINE_INTR_H_ 46#define _MACHINE_INTR_H_ 47 48#include <amiga/amiga/isr.h> 49#include <amiga/include/mtpr.h> 50 51/* ADAM: commented out 52#define IPL_SOFTSERIAL 1 53#define IPL_SOFTNET 1 54*/ 55 56#ifdef splaudio 57#undef splaudio 58#define splaudio spl6 59#endif 60 61#define spllpt() spl6() 62 63/* ADAM: from macppc/intr.h */ 64/* Interrupt priority `levels'. */ 65#define IPL_NONE 9 /* nothing */ 66#define IPL_SOFTCLOCK 8 /* timeouts */ 67#define IPL_SOFTNET 7 /* protocol stacks */ 68#define IPL_BIO 6 /* block I/O */ 69#define IPL_NET 5 /* network */ 70#define IPL_SOFTSERIAL 4 /* serial */ 71#define IPL_TTY 3 /* terminal */ 72#define IPL_IMP 3 /* memory allocation */ 73#define IPL_AUDIO 2 /* audio */ 74#define IPL_CLOCK 1 /* clock */ 75#define IPL_HIGH 1 /* everything */ 76#define IPL_SERIAL 0 /* serial */ 77#define NIPL 10 78 79/* Interrupt sharing types. */ 80#define IST_NONE 0 /* none */ 81#define IST_PULSE 1 /* pulsed */ 82#define IST_EDGE 2 /* edge-triggered */ 83#define IST_LEVEL 3 /* level-triggered */ 84 85#ifndef _LOCORE 86 87/* 88 * Interrupt handler chains. intr_establish() inserts a handler into 89 * the list. The handler is called with its (single) argument. 90 */ 91struct intrhand { 92 int (*ih_fun) __P((void *)); 93 void *ih_arg; 94 u_long ih_count; 95 struct intrhand *ih_next; 96 int ih_level; 97 int ih_irq; 98}; 99 100void clearsoftclock __P((void)); 101int splsoftclock __P((void)); 102/* 103void setsoftnet __P((void)); 104*/ 105void clearsoftnet __P((void)); 106int splsoftnet __P((void)); 107 108void do_pending_int __P((void)); 109 110static __inline int splraise __P((int)); 111static __inline int spllower __P((int)); 112static __inline void splx __P((int)); 113static __inline void softintr __P((int)); 114 115extern volatile int cpl, ipending, astpending, tickspending; 116extern int imask[]; 117 118/* 119 * Reorder protection in the following inline functions is 120 * achived with the "eieio" instruction which the assembler 121 * seems to detect and then doen't move instructions past.... 122 */ 123static __inline int 124splraise(ncpl) 125 int ncpl; 126{ 127 int ocpl; 128 129 __asm__ volatile("sync; eieio\n"); /* don't reorder.... */ 130 ocpl = cpl; 131 cpl = ocpl | ncpl; 132 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 133 return (ocpl); 134} 135 136static __inline void 137splx(ncpl) 138 int ncpl; 139{ 140 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 141 cpl = ncpl; 142 if (ipending & ~ncpl) 143 do_pending_int(); 144 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 145} 146 147static __inline int 148spllower(ncpl) 149 int ncpl; 150{ 151 int ocpl; 152 153 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 154 ocpl = cpl; 155 cpl = ncpl; 156 if (ipending & ~ncpl) 157 do_pending_int(); 158 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 159 return (ocpl); 160} 161 162/* Following code should be implemented with lwarx/stwcx to avoid 163 * the disable/enable. i need to read the manual once more.... */ 164static __inline void 165softintr(ipl) 166 int ipl; 167{ 168 int msrsave; 169 170 __asm__ volatile("mfmsr %0" : "=r"(msrsave)); 171 __asm__ volatile("mtmsr %0" :: "r"(msrsave & ~PSL_EE)); 172 ipending |= 1 << ipl; 173 __asm__ volatile("mtmsr %0" :: "r"(msrsave)); 174} 175 176#define ICU_LEN 32 177 178/* Soft interrupt masks. */ 179/* 180#define SIR_CLOCK 28 181#define SIR_NET 29 182#define SIR_SERIAL 30 183*/ 184#define SPL_CLOCK 31 185 186/* 187 * Hardware interrupt masks 188 */ 189#define splbio() splraise(imask[IPL_BIO]) 190#define splnet() splraise(imask[IPL_NET]) 191#define spltty() splraise(imask[IPL_TTY]) 192#define splaudio() splraise(imask[IPL_AUDIO]) 193#define splclock() splraise(imask[IPL_CLOCK]) 194#define splstatclock() splclock() 195#define splserial() splraise(imask[IPL_SERIAL]) 196 197/* ADAM: see above 198#define spllpt() spltty() 199*/ 200 201/* 202 * Software interrupt masks 203 * 204 * NOTE: splsoftclock() is used by hardclock() to lower the priority from 205 * clock to softclock before it calls softclock(). 206 */ 207#define spllowersoftclock() spllower(imask[IPL_SOFTCLOCK]) 208#define splsoftclock() splraise(imask[IPL_SOFTCLOCK]) 209#define splsoftnet() splraise(imask[IPL_SOFTNET]) 210#define splsoftserial() splraise(imask[IPL_SOFTSERIAL]) 211 212/* 213 * Miscellaneous 214 */ 215#define splvm() splraise(imask[IPL_IMP]) 216#define splhigh() splraise(imask[IPL_HIGH]) 217#define splsched() splhigh() 218#define spllock() splhigh() 219#define spl0() spllower(0) 220 221/* 222#define setsoftnet() softintr(SIR_NET) 223#define setsoftserial() softintr(SIR_SERIAL) 224*/ 225extern long intrcnt[]; 226 227#define CNT_IRQ0 0 228#define CNT_CLOCK 64 229#define CNT_SOFTCLOCK 65 230#define CNT_SOFTNET 66 231#define CNT_SOFTSERIAL 67 232 233#endif /* !_LOCORE */ 234 235#endif /* !_MACPPC_INTR_H_ */ 236