xref: /src/sys/arch/arc/TODO

$NetBSD: TODO,v 1.13 2000/06/17 09:18:39 soda Exp $

To do list (not in any particular order).

    o	XXX at least 2000/06/07 version is already quite unstable
	on PICA and NEC Image RISCstation. (but almost OK on Magnum)
	Userland commands dumps	core randomly.
	This version is before _MIPS_PADDR_T_64BIT changes
	and MIPS3_TLB_WIRED_UPAGES changes.	

    o	XXX sudden hang up in a few minutes or dozens of minutes.
	2000 Mar 17 -current is OK. Mar 29 is NG.

    o	Move the RO and WIRED attribute from the pte to the pv table.
	This saves four instructions in the tlb miss handler.

    o   Boot. Standalone boot program instead of booting the kernel directly.

    o   Find out why bitmap load to S3-928 flashes screen. (X server)
	Know why (enable linear mode). Need S3 info.

    o   Can we have 32 double registers?

    o	64bit kernel/userland

    o	NEC RISCstation 2200 support

	-   framebuffer?

	-   interrupt handling?

    o	repair DeskStation support

	-   requires bounce buffer bus_dma for Tyne

	-   set up rPC44 wired TLB entries explicitly

   o	repair Algor support

	-   pci/pbcpcibus.c:vtophysaddr(): pbc_version < V96X_VREV_C0 case

   o	sysinst

   o	install notes

   o	www: diskless HOW-TO port-arc specific part.

   o	Xserver

	-   VXL		magnum, some RISCserver 2200
	-   vga/S3	pica, Image RISCstation - OpenBSD's?
	-   vga/cirrus	some RISCserver 2200
	-   vga/???	DESKstation Tyne, rPC44
	-   TGA		RISCserver 2250

   o	X clients
	probably pmax binary is good enough.

    o	source code structure is quite obsolete,
	general clean up is needed as nisimura-san suggested.
	especially:

 	-   introduce struct platform and remove ugly ``switch (cputype)''
	    in many places.

	-   redesign interrupt handler framework to be flexible for
	    possible variations; must be sane and useful for R4030/R4230
	    'local' devices and any combinations with ISA/EISA/PCI

	-   remove inb/outb

	-   try to interporate HZ; may be possible for R4030/R4230 system
	    or 'hardclock() by R4000' system.  Clock resolution of 100Hz
	    without any interporation is substandard

	-   remove UADDR

    o	overblocking on interrupt handler, and related problems

	-   SR_INT_IE should be enabled before calling hardclock().
	    Since this is not done currently, spllowersoftclock()
	    on hardclock() doesn't have effect, and softclock() is
	    handled with all interrupt disabled in this case.
		-> overblocking, possibly causes missing hardclock()

	-   MIPS3_CLKF_BASEPRI() doesn't work correctly,
	    when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled.
		-> micro optimization on hardclock() doesn't work.
		   but currently this may make hardclock() latency better
		   due to above SR_INT_IE problem.
	    s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky.

	-   if (ipending & INT_MASK_REAL_DEV) == 0,
	    softnet() and softclock() are handled with all interrupt disabled.
		-> overblocking, possibly causes missing hardclock()

	-   softclock() is handled with softnet() disabled.
		-> slightly overblocking

	-   `netisr' handling in netintr() implies potential race condition.
	    `netisr' access should be protected by splnet().
	    currently this is not real problem due to above overblocking.

	    `ssir' handling on many mips ports has same problem.
	    It should be protected by splnet() or splserial() or splhigh()
	    (depends on the highest interrupt level which sets `ssir').
	    Since `ssir' is accessed not only by setsoftnet() but also
	    by setsoft(), setsoftnet() should protect `ssir' by splserial()
	    or something. (i.e. priority level which setsoft() will be called)
	    Probably, it is better to split `ssir' variable for each
	    priority level.
	    also, _clearsoftintr() should be called before `ssir' access.
	    currently this is not real problem due to above overblocking.

	-   INT_MASK_REAL_DEV should be removed

	-   make CLKF_INTR() work.

	-   major rework, possibly by software emulated spl.
		splserial()/splsoftserial()

    o	it is better to always disable MIPS_INT_MASK_CLOCK.
	those are the points which should be fixed:
	mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
	machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE;
	spl0()
	splnone()

	-   MIPS_INT_MASK_CLOCK should be removed in someway

    o	fix kernel start address

    o	allocate PICA_TL_BASE and SONICBUF dynamically

    o	merge new wscons

    o	fix mem_clusters[] usage.

    o	test and merge soren's clean up about proc0.p_addr.

    o	parse ARC BIOS configuration information and use it

    o	omit __BROKEN_CONFIG_UNIT_USAGE

    o	omit __SWAP_BROKEN in <mips/types.h>

    o	fix implementation of DELAY(), clean up clock implementation

    o	increase MAXPHYS to 64KB

    o	asc.c scsi clock/NCR53CF94 handling clean up

    o	if_sn.c

	-   ether address handling clean up

	-   bus_dma'fy
	-   bus_space'fy
	-   split frontend and backend
	-   make this MI, and share with mac68k, newsmips/apbus

    o	com_lbus.c clock handling clean up

    o	intrcnt[] name cleanup

    o	implement NCR 53c700(?) driver for NEC RISCserver 2200,
	RISCstation 2200 and RISCstation 2250.
	based on MI siop driver?

    o	audio driver

    o	use MI driver

	-   use MI ncr53c9x driver instead of home grown asc

	-   use MI bha driver instead of home grown btl

	-   make fd driver MI, and share it with i386
	    (contact christos about MI fd driver)

	-   make pccons MI, and share it with i386,
	    or simply eliminate pccons

	-   LKM

    o	ARC boot device name -> NetBSD root device conversion

    o	and missing MI devices
		ses?, lkm, vcoda, ...

    o	bus_dmamap_sync: Hit_Invalidate and Hit_Write_Back cache operation

    o	clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland.

    o	resolve "XXX"

Lots of other things.....