TODO revision 1.27
11.27Stsutsui$NetBSD: TODO,v 1.27 2008/02/02 15:47:48 tsutsui Exp $ 21.2Sthorpej 31.17StsutsuiTo do list (in some particular order) 41.17StsutsuiXXX some entries might be obsolete. 51.12Ssoda 61.17Stsutsui o install notes 71.17Stsutsui 81.17Stsutsui 91.17Stsutsui o use MI driver 101.17Stsutsui 111.17Stsutsui - make fd driver MI, and share it with other ports 121.17Stsutsui (contact christos about MI fd driver) 131.17Stsutsui 141.17Stsutsui - use MI bha driver instead of home grown btl 151.17Stsutsui XXX needs fixes of DESKstation support 161.14Ssoda 171.17Stsutsui o VXL framebuffer support (Magnum, RISCstation 2200) 181.14Ssoda 191.17Stsutsui o com_jazzio.c 201.17Stsutsui - clock handling clean up (obtain from ARC BIOS) 211.17Stsutsui - fifo disabling may be only needed on some Magnum? 221.1Sjonathan 231.17Stsutsui o remove pccons and switch to wscons completely 241.17Stsutsui (XXX what's the problem to remove pccons?) 251.9Ssoda 261.17Stsutsui o AD1848 audio support 271.1Sjonathan 281.17Stsutsui o missing MI devices 291.17Stsutsui ses?, vcoda, ... 301.1Sjonathan 311.4Ssoda 321.17Stsutsui o Xserver 331.4Ssoda 341.17Stsutsui - VXL Magnum, RISCstation 2200 351.17Stsutsui - vga/S3 PICA, Image RISCstation - OpenBSD's? 361.17Stsutsui - vga/cirrus RISCserver 2200, Express5800/240 R4400 EISA 371.17Stsutsui - vga/??? DESKstation Tyne, rPC44 381.17Stsutsui - TGA RISCstation 2250, Express5800/230 R4400 PCI 391.4Ssoda 401.17Stsutsui o Find out why bitmap load to S3-928 flashes screen. (X server) 411.17Stsutsui Know why (enable linear mode). Need S3 info. 421.5Ssoda 431.5Ssoda 441.27Stsutsui o repair DescStation support 451.11Ssoda - requires bounce buffer bus_dma for Tyne 461.17Stsutsui XXX - too small bounce buffer size (128KB) 471.11Ssoda 481.15Ssoda o Olivetti M700 support 491.11Ssoda 501.19Stsutsui o NEC Express5800/230 R10000 PCI (NEC-J95) support 511.27Stsutsui (needs info about interrupt, jazzio device address etc.) 521.11Ssoda 531.17Stsutsui o SNI RM200PCI/RM300/RM400/RM600 support 541.27Stsutsui (Linux/MIPS seems to have some info) 551.11Ssoda 561.11Ssoda 571.17Stsutsui o parse ARC BIOS configuration information and use it 581.11Ssoda 591.17Stsutsui o fix kernel start address 601.17Stsutsui (maybe requires bootloader support) 611.11Ssoda 621.17Stsutsui o allocate PICA_TL_BASE dynamically 631.5Ssoda 641.15Ssoda o remove inb/outb 651.8Snisimura 661.15Ssoda o remove UADDR 671.9Ssoda 681.17Stsutsui o fix mem_clusters[] usage. 691.17Stsutsui 701.17Stsutsui o intrcnt[] name cleanup, use MI evcnt(9) 711.17Stsutsui 721.17Stsutsui o test and merge soren's clean up about proc0.p_addr. 731.17Stsutsui 741.15Ssoda o redesign interrupt handler framework. 751.11Ssoda 761.23Stsutsui o it is better to always disable the MIPS3 internal timer interrupts 771.23Stsutsui (i.e. MIPS_INT_MASK_5) if it is not needed for the system. 781.9Ssoda those are the points which should be fixed: 791.9Ssoda mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE) 801.9Ssoda machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE; 811.9Ssoda spl0() 821.9Ssoda splnone() 831.10Ssoda 841.17Stsutsui o XXX at least 2000/06/07 version is already quite unstable 851.17Stsutsui on PICA and NEC Image RISCstation. (but almost OK on Magnum) 861.17Stsutsui Userland commands dumps core randomly. 871.17Stsutsui This version is before _MIPS_PADDR_T_64BIT changes 881.17Stsutsui and MIPS3_TLB_WIRED_UPAGES changes. 891.1Sjonathan 901.17Stsutsui "vm_page_zero_enable = FALSE" makes this problem disappeared. 911.17Stsutsui (vm_page_zero_enable = FALSE by default on all archs w/ UBC, now) 921.11Ssoda 931.17Stsutsui currently, page zero in the idle loop is also disabled on 941.17Stsutsui untested platforms like DESKstation rPC44/Tyne and SNI for safety. 951.11Ssoda 961.17Stsutsui XXX what's the current status of uvm_pageidlezero()? 971.11Ssoda 981.4Ssoda 991.17Stsutsui o resolve "XXX" 1001.5Ssoda 1011.4Ssoda 1021.17Stsutsui(following entries might be MI MIPS items) 1031.11Ssoda 1041.27Stsutsui o make CLKF_INTR() work. 1051.27Stsutsui 1061.17Stsutsui o Move the RO and WIRED attribute from the pte to the pv table. 1071.17Stsutsui This saves four instructions in the tlb miss handler. 1081.15Ssoda 1091.17Stsutsui o Can we have 32 double registers? 1101.15Ssoda 1111.17Stsutsui o 64bit kernel/userland 1121.15Ssoda 1131.17Stsutsui o omit __SWAP_BROKEN in <mips/types.h> 1141.11Ssoda 1151.11Ssoda o clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland. 1161.1Sjonathan 1171.1SjonathanLots of other things..... 118