TODO revision 1.17 
1$NetBSD: TODO,v 1.17 2003/04/06 17:48:51 tsutsui Exp $
2
3To do list (in some particular order)
4XXX some entries might be obsolete.
5
6    o   Boot. Standalone boot program to load ELF kernels instead of
7	booting ECOFF kernels directly.
8	(maybe sgimips/stand would help, but annoying buggy ARC BIOS)
9
10    o	sysinst
11	maybe MD fdisk partitioning support is required to load files
12	from FAT partition on ARC BIOS prompt.
13
14    o	install notes
15
16
17    o	use MI driver
18
19	-   use MI ncr53c9x driver instead of home grown asc
20	    XXX patch is available. needs testers
21
22	-   make fd driver MI, and share it with other ports
23	    (contact christos about MI fd driver)
24
25	-   use MI bha driver instead of home grown btl
26	    XXX needs fixes of DESKstation support
27
28    o	VXL framebuffer support (Magnum, RISCstation 2200)
29
30    o	com_jazzio.c
31	-   clock handling clean up (obtain from ARC BIOS)
32	-   fifo disabling may be only needed on some Magnum?
33
34    o	remove pccons and switch to wscons completely
35	(XXX what's the problem to remove pccons?)
36
37    o	AD1848 audio support
38
39    o	missing MI devices
40		ses?, vcoda, ...
41
42
43    o	Xserver
44
45	-   VXL		Magnum, RISCstation 2200
46	-   vga/S3	PICA, Image RISCstation - OpenBSD's?
47	-   vga/cirrus	RISCserver 2200, Express5800/240 R4400 EISA
48	-   vga/???	DESKstation Tyne, rPC44
49	-   TGA		RISCstation 2250, Express5800/230 R4400 PCI
50
51    o   Find out why bitmap load to S3-928 flashes screen. (X server)
52	Know why (enable linear mode). Need S3 info.
53
54
55    o	repair DESKstation support
56	-   requires bounce buffer bus_dma for Tyne
57		XXX - too small bounce buffer size (128KB)
58
59    o	Olivetti M700 support
60
61    o	NEC Express5800/230 R10000 PCI (NEC-JC95) support
62	(needs MI R10000 support)
63
64    o	SNI RM200PCI/RM300/RM400/RM600 support
65
66
67    o	parse ARC BIOS configuration information and use it
68
69    o	increase MAXPHYS to 64KB
70	(XXX why is it limited to 32KB?)
71
72    o	fix kernel start address
73	(maybe requires bootloader support)
74
75    o	allocate PICA_TL_BASE dynamically
76
77    o	remove inb/outb
78
79    o	remove UADDR
80
81    o	fix mem_clusters[] usage.
82
83    o	intrcnt[] name cleanup, use MI evcnt(9)
84
85    o	test and merge soren's clean up about proc0.p_addr.
86
87    o	redesign interrupt handler framework.
88	i/o bus devices should have sane IPL, but currently doesn't.
89
90	also, current MIPS interrupt handler has overblocking and
91	other problems as follows:
92
93	-   SR_INT_IE should be enabled before calling hardclock().
94	    Since this is not done currently, spllowersoftclock()
95	    on hardclock() doesn't have effect, and softclock() is
96	    handled with all interrupt disabled in this case.
97		-> overblocking, possibly causes missing hardclock()
98
99	-   MIPS3_CLKF_BASEPRI() doesn't work correctly,
100	    when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled.
101		-> micro optimization on hardclock() doesn't work.
102		   but currently this may make hardclock() latency better
103		   due to above SR_INT_IE problem.
104	    s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky.
105
106	-   if (ipending & INT_MASK_REAL_DEV) == 0,
107	    softnet() and softclock() are handled with all interrupt disabled.
108		-> overblocking, possibly causes missing hardclock()
109
110	-   softclock() is handled with softnet() disabled.
111		-> slightly overblocking
112
113	-   `netisr' handling in netintr() implies potential race condition.
114	    The access to `netisr' should be protected by splnet().
115	    Currently this is not real problem due to above overblocking.
116
117	    `ssir' handling on many mips ports has same problem.
118	    It should be protected by splnet() or splserial() or splhigh()
119	    (depends on the highest interrupt level which sets `ssir').
120	    Since `ssir' is accessed not only by setsoftnet() but also
121	    by setsoft(), setsoftnet() should protect `ssir' by splserial()
122	    or something. (i.e. priority level which setsoft() will be called)
123	    Probably, it is better to split `ssir' variable for each
124	    priority level.
125	    Also, _clearsoftintr() should be called before `ssir' access.
126	    currently this is not real problem due to above overblocking.
127
128	-   INT_MASK_REAL_DEV should be removed
129
130	-   make CLKF_INTR() work.
131
132	-   generic software interrupt
133	    (see algor, mipsco, pmax etc.)
134
135	-   major rework, possibly by software emulated spl.
136		splserial()/splsoftserial()
137
138    o	it is better to always disable MIPS_INT_MASK_CLOCK.
139	those are the points which should be fixed:
140	mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
141	machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE;
142	spl0()
143	splnone()
144
145	-   MIPS_INT_MASK_CLOCK should be removed in someway
146
147    o	XXX at least 2000/06/07 version is already quite unstable
148	on PICA and NEC Image RISCstation. (but almost OK on Magnum)
149	Userland commands dumps	core randomly.
150	This version is before _MIPS_PADDR_T_64BIT changes
151	and MIPS3_TLB_WIRED_UPAGES changes.	
152
153	"vm_page_zero_enable = FALSE" makes this problem disappeared.
154	(vm_page_zero_enable = FALSE by default on all archs w/ UBC, now)
155
156	currently, page zero in the idle loop is also disabled on
157	untested platforms like DESKstation rPC44/Tyne and SNI for safety.
158
159	    XXX what's the current status of uvm_pageidlezero()?
160
161
162    o	resolve "XXX"
163
164
165(following entries might be MI MIPS items)
166
167    o	Move the RO and WIRED attribute from the pte to the pv table.
168	This saves four instructions in the tlb miss handler.
169
170    o   Can we have 32 double registers?
171
172    o	64bit kernel/userland
173
174    o	fix implementation of DELAY(), clean up clock implementation
175
176    o	omit __SWAP_BROKEN in <mips/types.h>
177
178    o	clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland.
179
180Lots of other things.....
181