TODO revision 1.18 
1$NetBSD: TODO,v 1.18 2003/05/22 17:10:27 tsutsui Exp $
2
3To do list (in some particular order)
4XXX some entries might be obsolete.
5
6    o   Boot. Standalone boot program to load ELF kernels instead of
7	booting ECOFF kernels directly.
8	(maybe sgimips/stand would help, but annoying buggy ARC BIOS)
9
10    o	sysinst
11	maybe MD fdisk partitioning support is required to load files
12	from FAT partition on ARC BIOS prompt.
13
14    o	install notes
15
16
17    o	use MI driver
18
19	-   make fd driver MI, and share it with other ports
20	    (contact christos about MI fd driver)
21
22	-   use MI bha driver instead of home grown btl
23	    XXX needs fixes of DESKstation support
24
25    o	VXL framebuffer support (Magnum, RISCstation 2200)
26
27    o	com_jazzio.c
28	-   clock handling clean up (obtain from ARC BIOS)
29	-   fifo disabling may be only needed on some Magnum?
30
31    o	remove pccons and switch to wscons completely
32	(XXX what's the problem to remove pccons?)
33
34    o	AD1848 audio support
35
36    o	missing MI devices
37		ses?, vcoda, ...
38
39
40    o	Xserver
41
42	-   VXL		Magnum, RISCstation 2200
43	-   vga/S3	PICA, Image RISCstation - OpenBSD's?
44	-   vga/cirrus	RISCserver 2200, Express5800/240 R4400 EISA
45	-   vga/???	DESKstation Tyne, rPC44
46	-   TGA		RISCstation 2250, Express5800/230 R4400 PCI
47
48    o   Find out why bitmap load to S3-928 flashes screen. (X server)
49	Know why (enable linear mode). Need S3 info.
50
51
52    o	repair DESKstation support
53	-   requires bounce buffer bus_dma for Tyne
54		XXX - too small bounce buffer size (128KB)
55
56    o	Olivetti M700 support
57
58    o	NEC Express5800/230 R10000 PCI (NEC-JC95) support
59	(needs MI R10000 support)
60
61    o	SNI RM200PCI/RM300/RM400/RM600 support
62
63
64    o	parse ARC BIOS configuration information and use it
65
66    o	increase MAXPHYS to 64KB
67	(XXX why is it limited to 32KB?)
68
69    o	fix kernel start address
70	(maybe requires bootloader support)
71
72    o	allocate PICA_TL_BASE dynamically
73
74    o	remove inb/outb
75
76    o	remove UADDR
77
78    o	fix mem_clusters[] usage.
79
80    o	intrcnt[] name cleanup, use MI evcnt(9)
81
82    o	test and merge soren's clean up about proc0.p_addr.
83
84    o	redesign interrupt handler framework.
85	i/o bus devices should have sane IPL, but currently doesn't.
86
87	also, current MIPS interrupt handler has overblocking and
88	other problems as follows:
89
90	-   SR_INT_IE should be enabled before calling hardclock().
91	    Since this is not done currently, spllowersoftclock()
92	    on hardclock() doesn't have effect, and softclock() is
93	    handled with all interrupt disabled in this case.
94		-> overblocking, possibly causes missing hardclock()
95
96	-   MIPS3_CLKF_BASEPRI() doesn't work correctly,
97	    when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled.
98		-> micro optimization on hardclock() doesn't work.
99		   but currently this may make hardclock() latency better
100		   due to above SR_INT_IE problem.
101	    s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky.
102
103	-   if (ipending & INT_MASK_REAL_DEV) == 0,
104	    softnet() and softclock() are handled with all interrupt disabled.
105		-> overblocking, possibly causes missing hardclock()
106
107	-   softclock() is handled with softnet() disabled.
108		-> slightly overblocking
109
110	-   `netisr' handling in netintr() implies potential race condition.
111	    The access to `netisr' should be protected by splnet().
112	    Currently this is not real problem due to above overblocking.
113
114	    `ssir' handling on many mips ports has same problem.
115	    It should be protected by splnet() or splserial() or splhigh()
116	    (depends on the highest interrupt level which sets `ssir').
117	    Since `ssir' is accessed not only by setsoftnet() but also
118	    by setsoft(), setsoftnet() should protect `ssir' by splserial()
119	    or something. (i.e. priority level which setsoft() will be called)
120	    Probably, it is better to split `ssir' variable for each
121	    priority level.
122	    Also, _clearsoftintr() should be called before `ssir' access.
123	    currently this is not real problem due to above overblocking.
124
125	-   INT_MASK_REAL_DEV should be removed
126
127	-   make CLKF_INTR() work.
128
129	-   generic software interrupt
130	    (see algor, mipsco, pmax etc.)
131
132	-   major rework, possibly by software emulated spl.
133		splserial()/splsoftserial()
134
135    o	it is better to always disable MIPS_INT_MASK_CLOCK.
136	those are the points which should be fixed:
137	mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
138	machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE;
139	spl0()
140	splnone()
141
142	-   MIPS_INT_MASK_CLOCK should be removed in someway
143
144    o	XXX at least 2000/06/07 version is already quite unstable
145	on PICA and NEC Image RISCstation. (but almost OK on Magnum)
146	Userland commands dumps	core randomly.
147	This version is before _MIPS_PADDR_T_64BIT changes
148	and MIPS3_TLB_WIRED_UPAGES changes.	
149
150	"vm_page_zero_enable = FALSE" makes this problem disappeared.
151	(vm_page_zero_enable = FALSE by default on all archs w/ UBC, now)
152
153	currently, page zero in the idle loop is also disabled on
154	untested platforms like DESKstation rPC44/Tyne and SNI for safety.
155
156	    XXX what's the current status of uvm_pageidlezero()?
157
158
159    o	resolve "XXX"
160
161
162(following entries might be MI MIPS items)
163
164    o	Move the RO and WIRED attribute from the pte to the pv table.
165	This saves four instructions in the tlb miss handler.
166
167    o   Can we have 32 double registers?
168
169    o	64bit kernel/userland
170
171    o	fix implementation of DELAY(), clean up clock implementation
172
173    o	omit __SWAP_BROKEN in <mips/types.h>
174
175    o	clean up ALEAF/NLEAF/NON_LEAF/NNON_LEAF in userland.
176
177Lots of other things.....
178