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TODO revision 1.9 
      1 $NetBSD: TODO,v 1.9 2000/04/15 21:57:37 soda Exp $
      2 
      3 To do list (not in any particular order).
      4 
      5     o	XXX sudden hang up in a few minutes or dozens of minutes.
      6 	2000 Mar 17 -current is OK. Mar 29 is NG.
      7 
      8     o	Move the RO and WIRED attribute from the pte to the pv table.
      9 	This saves four instructions in the tlb miss handler.
     10 
     11     o   Boot. Standalone boot program instead of booting the kernel directly?
     12 
     13     o   Find out why bitmap load to S3-928 flashes screen. (X server)
     14 	Know why (enable linear mode). Need S3 info.
     15 
     16     o   Can we have 32 double registers?
     17 
     18     o	64bit kernel/userland
     19 
     20     o	repair DeskStation and Algor support
     21 
     22 	-   64bit device physical address space for Tyne (see OpenBSD pmap.c)
     23 
     24 	-   requires bus_dma
     25 
     26     o	source code structure is quite obsolete,
     27 	general clean up is needed as nisimura-san suggested.
     28 	especially:
     29 
     30  	-   introduce struct platform and remove ugly ``switch (cputype)''
     31 	    in many places.
     32 
     33 	-   redesign interrupt handler framework to be flexible for
     34 	    possible variations; must be sane and useful for R4030/R4230
     35 	    'local' devices and any combinations with ISA/EISA/PCI
     36 
     37 	-   implement and use bus_dma, keeping in mind TLB assisted VDMA
     38 	    that R4030/R4230 chip provides
     39 
     40 	-   clean up bus_space implementation, remove inb/outb
     41 
     42 	-   try to interporate HZ; may be possible for R4030/R4230 system
     43 	    or 'hardclock() by R4000' system.  Clock resolution of 100Hz
     44 	    without any interporation is substandard
     45 
     46     o	overblocking on interrupt handler, and related problems
     47 
     48 	-   SR_INT_IE should be enabled before calling hardclock().
     49 	    Since this is not done currently, spllowersoftclock()
     50 	    on hardclock() doesn't have effect, and softclock() is
     51 	    handled with all interrupt disabled in this case.
     52 		-> overblocking, possibly causes missing hardclock()
     53 
     54 	-   MIPS3_CLKF_BASEPRI() doesn't work correctly,
     55 	    when MIPS_INT_MASK_5 (== MIPS_INT_MASK_CLOCK) is disabled.
     56 		-> micro optimization on hardclock() doesn't work.
     57 		   but currently this may make hardclock() latency better
     58 		   due to above SR_INT_IE problem.
     59 	    s/MIPS_INT_MASK/MIPS3_INT_MASK/ makes this work, although tricky.
     60 
     61 	-   if (ipending & INT_MASK_REAL_DEV) == 0,
     62 	    softnet() and softclock() are handled with all interrupt disabled.
     63 		-> overblocking, possibly causes missing hardclock()
     64 
     65 	-   softclock() is handled with softnet() disabled.
     66 		-> slightly overblocking
     67 
     68 	-   `netisr' handling in netintr() implies potential race condition.
     69 	    `netisr' access should be protected by splnet().
     70 	    currently this is not real problem due to above overblocking.
     71 
     72 	    `ssir' handling on many mips ports has same problem.
     73 	    It should be protected by splnet() or splserial() or splhigh()
     74 	    (depends on the highest interrupt level which sets `ssir').
     75 	    Since `ssir' is accessed not only by setsoftnet() but also
     76 	    by setsoft(), setsoftnet() should protect `ssir' by splserial()
     77 	    or something. (i.e. priority level which setsoft() will be called)
     78 	    Probably, it is better to split `ssir' variable for each
     79 	    priority level.
     80 	    also, _clearsoftintr() should be called before `ssir' access.
     81 	    currently this is not real problem due to above overblocking.
     82 
     83     o	it is better to always disable MIPS_INT_MASK_CLOCK.
     84 	those are the points which should be fixed:
     85 	mips_idle: li t0, (MIPS_INT_MASK | MIPS_SR_INT_IE)
     86 	machdep.c: curpcb->pcb_context[11] = MIPS_INT_MASK | MIPS_SR_INT_IE;
     87 	spl0()
     88 	splnone()
     89 
     90     o	fix kernel start address
     91 
     92     o	merge new wscons
     93 
     94     o	parse ARC BIOS configuration information and use it
     95 
     96     o	omit __BROKEN_CONFIG_UNIT_USAGE
     97 
     98     o	omit __SWAP_BROKEN in <mips/types.h>
     99 
    100     o	fix implementation of DELAY(), clean up clock implementation
    101 
    102     o	asc.c scsi clock/NCR53CF94 handling clean up
    103 
    104     o	if_sn.c ether address handling clean up
    105 
    106     o	com_lbus.c clock handling clean up
    107 
    108     o	implement NCR 53c700(?) driver for NEC RISCserver 2200
    109 	based on amiga siop driver?
    110 
    111     o	audio driver
    112 
    113     o	use MI driver
    114 
    115 	-   use MI ncr53c9x driver instead of home grown asc
    116 
    117 	-   use MI bha driver instead of home grown btl
    118 
    119 	-   make sonic driver MI, and share it with mac68k, newsmips/apbus
    120 
    121 	-   make fd driver MI, and share it with i386
    122 	    (contact christos about MI fd driver)
    123 
    124 	-   make pccons MI, and share it with i386,
    125 	    or simply eliminate pccons
    126 
    127 	-   LKM
    128 
    129     o	ARC boot device name -> NetBSD root device conversion
    130 
    131     o	and missing MI devices
    132 		ses?, lkm, vcoda, ...
    133 
    134     o	way to specify serial console
    135 
    136     o resolve "XXX"
    137 
    138 Lots of other things.....
    139