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btlreg.h revision 1.2 
      1 typedef u_int8_t physaddr[4];
      2 typedef u_int8_t physlen[4];
      3 #define	ltophys	_lto4l
      4 #define	phystol	_4ltol
      5 
      6 /*
      7  * I/O port offsets
      8  */
      9 #define	BT_CTRL_PORT		0	/* control (wo) */
     10 #define	BT_STAT_PORT		0	/* status (ro) */
     11 #define	BT_CMD_PORT		1	/* command (wo) */
     12 #define	BT_DATA_PORT		1	/* data (ro) */
     13 #define	BT_INTR_PORT		2	/* interrupt status (ro) */
     14 
     15 /*
     16  * BT_CTRL bits
     17  */
     18 #define BT_CTRL_HRST		0x80	/* Hardware reset */
     19 #define BT_CTRL_SRST		0x40	/* Software reset */
     20 #define BT_CTRL_IRST		0x20	/* Interrupt reset */
     21 #define BT_CTRL_SCRST		0x10	/* SCSI bus reset */
     22 
     23 /*
     24  * BT_STAT bits
     25  */
     26 #define BT_STAT_STST		0x80	/* Self test in Progress */
     27 #define BT_STAT_DIAGF		0x40	/* Diagnostic Failure */
     28 #define BT_STAT_INIT		0x20	/* Mbx Init required */
     29 #define BT_STAT_IDLE		0x10	/* Host Adapter Idle */
     30 #define BT_STAT_CDF		0x08	/* cmd/data out port full */
     31 #define BT_STAT_DF		0x04	/* Data in port full */
     32 #define BT_STAT_INVDCMD		0x01	/* Invalid command */
     33 
     34 /*
     35  * BT_CMD opcodes
     36  */
     37 #define	BT_NOP			0x00	/* No operation */
     38 #define BT_MBX_INIT		0x01	/* Mbx initialization */
     39 #define BT_START_SCSI		0x02	/* start scsi command */
     40 #define BT_INQUIRE_REVISION	0x04	/* Adapter Inquiry */
     41 #define BT_MBO_INTR_EN		0x05	/* Enable MBO available interrupt */
     42 #if 0
     43 #define BT_SEL_TIMEOUT_SET	0x06	/* set selection time-out */
     44 #define BT_BUS_ON_TIME_SET	0x07	/* set bus-on time */
     45 #define BT_BUS_OFF_TIME_SET	0x08	/* set bus-off time */
     46 #define BT_SPEED_SET		0x09	/* set transfer speed */
     47 #endif
     48 #define BT_INQUIRE_DEVICES	0x0a	/* return installed devices 0-7 */
     49 #define BT_INQUIRE_CONFIG	0x0b	/* return configuration data */
     50 #define BT_TARGET_EN		0x0c	/* enable target mode */
     51 #define BT_INQUIRE_SETUP	0x0d	/* return setup data */
     52 #define BT_ECHO			0x1e	/* Echo command data */
     53 #define BT_INQUIRE_DEVICES_2	0x23	/* return installed devices 8-15 */
     54 #define BT_MBX_INIT_EXTENDED	0x81	/* Mbx initialization */
     55 #define BT_INQUIRE_REVISION_3	0x84	/* Get 3rd firmware version byte */
     56 #define BT_INQUIRE_REVISION_4	0x85	/* Get 4th firmware version byte */
     57 #define BT_INQUIRE_MODEL	0x8b	/* Get hardware ID and revision */
     58 #define	BT_INQUIRE_PERIOD	0x8c	/* Get synchronous period */
     59 #define BT_INQUIRE_EXTENDED	0x8d	/* Adapter Setup Inquiry */
     60 #define	BT_ROUND_ROBIN		0x8f	/* Enable/Disable(default) round robin */
     61 
     62 /*
     63  * BT_INTR bits
     64  */
     65 #define BT_INTR_ANYINTR		0x80	/* Any interrupt */
     66 #define BT_INTR_SCRD		0x08	/* SCSI reset detected */
     67 #define BT_INTR_HACC		0x04	/* Command complete */
     68 #define BT_INTR_MBOA		0x02	/* MBX out empty */
     69 #define BT_INTR_MBIF		0x01	/* MBX in full */
     70 
     71 struct bt_mbx_out {
     72 	physaddr ccb_addr;
     73 	u_char dummy[3];
     74 	u_char cmd;
     75 };
     76 
     77 struct bt_mbx_in {
     78 	physaddr ccb_addr;
     79 	u_char dummy[3];
     80 	u_char stat;
     81 };
     82 
     83 /*
     84  * mbo.cmd values
     85  */
     86 #define BT_MBO_FREE	0x0	/* MBO entry is free */
     87 #define BT_MBO_START	0x1	/* MBO activate entry */
     88 #define BT_MBO_ABORT	0x2	/* MBO abort entry */
     89 
     90 /*
     91  * mbi.stat values
     92  */
     93 #define BT_MBI_FREE	0x0	/* MBI entry is free */
     94 #define BT_MBI_OK	0x1	/* completed without error */
     95 #define BT_MBI_ABORT	0x2	/* aborted ccb */
     96 #define BT_MBI_UNKNOWN	0x3	/* Tried to abort invalid CCB */
     97 #define BT_MBI_ERROR	0x4	/* Completed with error */
     98 
     99 #if	defined(BIG_DMA)
    100 #define BT_NSEG 2048    /* Number of scatter gather segments - to much vm */
    101 #else
    102 #define	BT_NSEG	(MAXPHYS / NBPG)
    103 #endif /* BIG_DMA */
    104 
    105 struct bt_scat_gath {
    106 	physlen seg_len;
    107 	physaddr seg_addr;
    108 };
    109 
    110 struct bt_ccb {
    111 	u_char opcode;
    112 	u_char:3, data_in:1, data_out:1,:3;
    113 	u_char scsi_cmd_length;
    114 	u_char req_sense_length;
    115 	/*------------------------------------longword boundary */
    116 	physlen data_length;
    117 	/*------------------------------------longword boundary */
    118 	physaddr data_addr;
    119 	/*------------------------------------longword boundary */
    120 	u_char dummy1[2];
    121 	u_char host_stat;
    122 	u_char target_stat;
    123 	/*------------------------------------longword boundary */
    124 	u_char target;
    125 	u_char lun;
    126 	struct scsi_generic scsi_cmd;
    127 	u_char dummy2[1];
    128 	u_char link_id;
    129 	/*------------------------------------longword boundary */
    130 	physaddr link_addr;
    131 	/*------------------------------------longword boundary */
    132 	physaddr sense_ptr;
    133 /*-----end of HW fields-----------------------longword boundary */
    134 	struct scsipi_sense_data scsi_sense;
    135 	/*------------------------------------longword boundary */
    136 	struct bt_scat_gath scat_gath[BT_NSEG];
    137 	/*------------------------------------longword boundary */
    138 	TAILQ_ENTRY(bt_ccb) chain;
    139 	struct bt_ccb *nexthash;
    140 	long hashkey;
    141 	struct scsipi_xfer *xs;		/* the scsi_xfer for this cmd */
    142 	int flags;
    143 #define	CCB_ALLOC	0x01
    144 #define	CCB_ABORT	0x02
    145 #ifdef BTDIAG
    146 #define	CCB_SENDING	0x04
    147 #endif
    148 	int timeout;
    149 };
    150 
    151 struct bt_buf {
    152 	TAILQ_ENTRY(bt_buf) chain;
    153 	char	buf[4096 - 2 * sizeof(struct bt_buf *)];
    154 };
    155 
    156 /*
    157  * opcode fields
    158  */
    159 #define BT_INITIATOR_CCB	0x00	/* SCSI Initiator CCB */
    160 #define BT_TARGET_CCB		0x01	/* SCSI Target CCB */
    161 #define BT_INIT_SCAT_GATH_CCB	0x02	/* SCSI Initiator with scattter gather */
    162 #define BT_RESET_CCB		0x81	/* SCSI Bus reset */
    163 
    164 /*
    165  * bt_ccb.host_stat values
    166  */
    167 #define BT_OK		0x00	/* cmd ok */
    168 #define BT_LINK_OK	0x0a	/* Link cmd ok */
    169 #define BT_LINK_IT	0x0b	/* Link cmd ok + int */
    170 #define BT_SEL_TIMEOUT	0x11	/* Selection time out */
    171 #define BT_OVER_UNDER	0x12	/* Data over/under run */
    172 #define BT_BUS_FREE	0x13	/* Bus dropped at unexpected time */
    173 #define BT_INV_BUS	0x14	/* Invalid bus phase/sequence */
    174 #define BT_BAD_MBO	0x15	/* Incorrect MBO cmd */
    175 #define BT_BAD_CCB	0x16	/* Incorrect ccb opcode */
    176 #define BT_BAD_LINK	0x17	/* Not same values of LUN for links */
    177 #define BT_INV_TARGET	0x18	/* Invalid target direction */
    178 #define BT_CCB_DUP	0x19	/* Duplicate CCB received */
    179 #define BT_INV_CCB	0x1a	/* Invalid CCB or segment list */
    180 
    181 struct bt_extended_inquire {
    182 	struct {
    183 		u_char	opcode;
    184 		u_char	len;
    185 	} cmd;
    186 	struct {
    187 		u_char	bus_type;	/* Type of bus connected to */
    188 #define	BT_BUS_TYPE_24BIT	'A'	/* ISA bus */
    189 #define	BT_BUS_TYPE_32BIT	'E'	/* EISA/VLB/PCI bus */
    190 #define	BT_BUS_TYPE_MCA		'M'	/* MicroChannel bus */
    191 		u_char	bios_address;	/* Address of adapter BIOS */
    192 		u_short	max_segment;	/* ? */
    193 	} reply;
    194 };
    195 
    196 struct bt_config {
    197 	struct {
    198 		u_char	opcode;
    199 	} cmd;
    200 	struct {
    201 		u_char  chan;
    202 		u_char  intr;
    203 		u_char  scsi_dev:3;
    204 		u_char	:5;
    205 	} reply;
    206 };
    207 
    208 struct bt_toggle {
    209 	struct {
    210 		u_char	opcode;
    211 		u_char	enable;
    212 	} cmd;
    213 };
    214 
    215 struct bt_mailbox {
    216 	struct {
    217 		u_char	opcode;
    218 		u_char	nmbx;
    219 		physaddr addr;
    220 	} cmd;
    221 };
    222 
    223 struct bt_model {
    224 	struct {
    225 		u_char	opcode;
    226 		u_char	len;
    227 	} cmd;
    228 	struct {
    229 		u_char	id[4];		/* i.e bt742a -> '7','4','2','A' */
    230 		u_char	version[2];	/* i.e Board Revision 'H' -> 'H', 0x00 */
    231 	} reply;
    232 };
    233 
    234 struct bt_revision {
    235 	struct {
    236 		u_char	opcode;
    237 	} cmd;
    238 	struct {
    239 		u_char  board_type;
    240 		u_char  custom_feature;
    241 		char    firm_revision;
    242 		u_char  firm_version;
    243 	} reply;
    244 };
    245 
    246 struct bt_digit {
    247 	struct {
    248 		u_char	opcode;
    249 	} cmd;
    250 	struct {
    251 		u_char  digit;
    252 	} reply;
    253 };
    254 
    255 struct bt_devices {
    256 	struct {
    257 		u_char	opcode;
    258 	} cmd;
    259 	struct {
    260 		u_char	junk[8];
    261 	} reply;
    262 };
    263 
    264 struct bt_setup {
    265 	struct {
    266 		u_char	opcode;
    267 		u_char	len;
    268 	} cmd;
    269 	struct {
    270 		u_char  sync_neg:1;
    271 		u_char  parity:1;
    272 		u_char	:6;
    273 		u_char  speed;
    274 		u_char  bus_on;
    275 		u_char  bus_off;
    276 		u_char  num_mbx;
    277 		u_char  mbx[3];		/*XXX */
    278 		/* doesn't make sense with 32bit addresses */
    279 		struct {
    280 			u_char  offset:4;
    281 			u_char  period:3;
    282 			u_char  valid:1;
    283 		} sync[8];
    284 		u_char  disc_sts;
    285 	} reply;
    286 };
    287 
    288 struct bt_period {
    289 	struct {
    290 		u_char	opcode;
    291 		u_char	len;
    292 	} cmd;
    293 	struct {
    294 		u_char	period[8];
    295 	} reply;
    296 };
    297 
    298 #define INT9	0x01
    299 #define INT10	0x02
    300 #define INT11	0x04
    301 #define INT12	0x08
    302 #define INT14	0x20
    303 #define INT15	0x40
    304 
    305 #define EISADMA	0x00
    306 #define CHAN0	0x01
    307 #define CHAN5	0x20
    308 #define CHAN6	0x40
    309 #define CHAN7	0x80
    310