bus_defs.h revision 1.1 1 1.1 dyoung /* $NetBSD: bus_defs.h,v 1.1 2011/07/01 17:09:58 dyoung Exp $ */
2 1.1 dyoung /* NetBSD: bus.h,v 1.27 2000/03/15 16:44:50 drochner Exp */
3 1.1 dyoung /* $OpenBSD: bus.h,v 1.15 1999/08/11 23:15:21 niklas Exp $ */
4 1.1 dyoung
5 1.1 dyoung /*-
6 1.1 dyoung * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
7 1.1 dyoung * All rights reserved.
8 1.1 dyoung *
9 1.1 dyoung * This code is derived from software contributed to The NetBSD Foundation
10 1.1 dyoung * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
11 1.1 dyoung * NASA Ames Research Center.
12 1.1 dyoung *
13 1.1 dyoung * Redistribution and use in source and binary forms, with or without
14 1.1 dyoung * modification, are permitted provided that the following conditions
15 1.1 dyoung * are met:
16 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
17 1.1 dyoung * notice, this list of conditions and the following disclaimer.
18 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
19 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
20 1.1 dyoung * documentation and/or other materials provided with the distribution.
21 1.1 dyoung *
22 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
23 1.1 dyoung * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
24 1.1 dyoung * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
25 1.1 dyoung * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
26 1.1 dyoung * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 1.1 dyoung * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 1.1 dyoung * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29 1.1 dyoung * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30 1.1 dyoung * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31 1.1 dyoung * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32 1.1 dyoung * POSSIBILITY OF SUCH DAMAGE.
33 1.1 dyoung */
34 1.1 dyoung
35 1.1 dyoung /*
36 1.1 dyoung * Copyright (c) 1997 Per Fogelstrom. All rights reserved.
37 1.1 dyoung * Copyright (c) 1996 Niklas Hallqvist. All rights reserved.
38 1.1 dyoung *
39 1.1 dyoung * Redistribution and use in source and binary forms, with or without
40 1.1 dyoung * modification, are permitted provided that the following conditions
41 1.1 dyoung * are met:
42 1.1 dyoung * 1. Redistributions of source code must retain the above copyright
43 1.1 dyoung * notice, this list of conditions and the following disclaimer.
44 1.1 dyoung * 2. Redistributions in binary form must reproduce the above copyright
45 1.1 dyoung * notice, this list of conditions and the following disclaimer in the
46 1.1 dyoung * documentation and/or other materials provided with the distribution.
47 1.1 dyoung * 3. All advertising materials mentioning features or use of this software
48 1.1 dyoung * must display the following acknowledgement:
49 1.1 dyoung * This product includes software developed by Christopher G. Demetriou
50 1.1 dyoung * for the NetBSD Project.
51 1.1 dyoung * 4. The name of the author may not be used to endorse or promote products
52 1.1 dyoung * derived from this software without specific prior written permission
53 1.1 dyoung *
54 1.1 dyoung * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
55 1.1 dyoung * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
56 1.1 dyoung * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
57 1.1 dyoung * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
58 1.1 dyoung * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
59 1.1 dyoung * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
60 1.1 dyoung * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
61 1.1 dyoung * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
62 1.1 dyoung * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
63 1.1 dyoung * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
64 1.1 dyoung */
65 1.1 dyoung
66 1.1 dyoung #ifndef _ARC_BUS_DEFS_H_
67 1.1 dyoung #define _ARC_BUS_DEFS_H_
68 1.1 dyoung #ifdef _KERNEL
69 1.1 dyoung
70 1.1 dyoung /*
71 1.1 dyoung * Bus address and size types
72 1.1 dyoung */
73 1.1 dyoung typedef u_long bus_addr_t;
74 1.1 dyoung typedef u_long bus_size_t;
75 1.1 dyoung
76 1.1 dyoung #include <mips/locore.h>
77 1.1 dyoung
78 1.1 dyoung #ifdef BUS_SPACE_DEBUG
79 1.1 dyoung #include <sys/systm.h> /* for printf() prototype */
80 1.1 dyoung /*
81 1.1 dyoung * Macros for checking the aligned-ness of pointers passed to bus
82 1.1 dyoung * space ops. Strict alignment is required by the MIPS architecture,
83 1.1 dyoung * and a trap will occur if unaligned access is performed. These
84 1.1 dyoung * may aid in the debugging of a broken device driver by displaying
85 1.1 dyoung * useful information about the problem.
86 1.1 dyoung */
87 1.1 dyoung #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \
88 1.1 dyoung ((((u_long)(p)) & (sizeof(t)-1)) == 0)
89 1.1 dyoung
90 1.1 dyoung #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \
91 1.1 dyoung ({ \
92 1.1 dyoung if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \
93 1.1 dyoung printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \
94 1.1 dyoung d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \
95 1.1 dyoung } \
96 1.1 dyoung (void) 0; \
97 1.1 dyoung })
98 1.1 dyoung
99 1.1 dyoung #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t)
100 1.1 dyoung #else
101 1.1 dyoung #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0
102 1.1 dyoung #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
103 1.1 dyoung #endif /* BUS_SPACE_DEBUG */
104 1.1 dyoung
105 1.1 dyoung /*
106 1.1 dyoung * Access methods for bus resources and address space.
107 1.1 dyoung */
108 1.1 dyoung typedef uint32_t bus_space_handle_t;
109 1.1 dyoung typedef struct arc_bus_space *bus_space_tag_t;
110 1.1 dyoung
111 1.1 dyoung struct arc_bus_space {
112 1.1 dyoung const char *bs_name;
113 1.1 dyoung struct extent *bs_extent;
114 1.1 dyoung bus_addr_t bs_start;
115 1.1 dyoung bus_size_t bs_size;
116 1.1 dyoung
117 1.1 dyoung paddr_t bs_pbase;
118 1.1 dyoung vaddr_t bs_vbase;
119 1.1 dyoung
120 1.1 dyoung /* sparse addressing shift count */
121 1.1 dyoung uint8_t bs_stride_1;
122 1.1 dyoung uint8_t bs_stride_2;
123 1.1 dyoung uint8_t bs_stride_4;
124 1.1 dyoung uint8_t bs_stride_8;
125 1.1 dyoung
126 1.1 dyoung /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */
127 1.1 dyoung int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t,
128 1.1 dyoung bus_size_t, int, bus_space_handle_t *);
129 1.1 dyoung
130 1.1 dyoung /* dispose a bus_space handle (MD) */
131 1.1 dyoung int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t,
132 1.1 dyoung bus_size_t);
133 1.1 dyoung
134 1.1 dyoung /* convert bus_space tag/handle to physical address (MD) */
135 1.1 dyoung int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t,
136 1.1 dyoung paddr_t *);
137 1.1 dyoung
138 1.1 dyoung /* mapping/unmapping */
139 1.1 dyoung int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int,
140 1.1 dyoung bus_space_handle_t *);
141 1.1 dyoung void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
142 1.1 dyoung int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t,
143 1.1 dyoung bus_size_t, bus_size_t, bus_space_handle_t *);
144 1.1 dyoung paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int);
145 1.1 dyoung
146 1.1 dyoung /* allocation/deallocation */
147 1.1 dyoung int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t,
148 1.1 dyoung bus_size_t, bus_size_t, bus_size_t, int,
149 1.1 dyoung bus_addr_t *, bus_space_handle_t *);
150 1.1 dyoung void (*bs_free)(bus_space_tag_t, bus_space_handle_t, bus_size_t);
151 1.1 dyoung
152 1.1 dyoung void *bs_aux;
153 1.1 dyoung };
154 1.1 dyoung
155 1.1 dyoung /* vaddr_t argument of arc_bus_space_init() */
156 1.1 dyoung #define ARC_BUS_SPACE_UNMAPPED ((vaddr_t)0)
157 1.1 dyoung
158 1.1 dyoung #define BUS_SPACE_MAP_CACHEABLE 0x01
159 1.1 dyoung #define BUS_SPACE_MAP_LINEAR 0x02
160 1.1 dyoung #define BUS_SPACE_MAP_PREFETCHABLE 0x04
161 1.1 dyoung
162 1.1 dyoung #define __BUS_SPACE_HAS_STREAM_METHODS
163 1.1 dyoung
164 1.1 dyoung #define BUS_SPACE_BARRIER_READ 0x01
165 1.1 dyoung #define BUS_SPACE_BARRIER_WRITE 0x02
166 1.1 dyoung
167 1.1 dyoung /*
168 1.1 dyoung * Flags used in various bus DMA methods.
169 1.1 dyoung */
170 1.1 dyoung #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
171 1.1 dyoung #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
172 1.1 dyoung #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
173 1.1 dyoung #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
174 1.1 dyoung #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
175 1.1 dyoung #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
176 1.1 dyoung #define BUS_DMA_BUS2 0x020
177 1.1 dyoung #define BUS_DMA_BUS3 0x040
178 1.1 dyoung #define BUS_DMA_BUS4 0x080
179 1.1 dyoung #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
180 1.1 dyoung #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
181 1.1 dyoung #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
182 1.1 dyoung
183 1.1 dyoung #define ARC_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
184 1.1 dyoung
185 1.1 dyoung /* Forwards needed by prototypes below. */
186 1.1 dyoung struct mbuf;
187 1.1 dyoung struct uio;
188 1.1 dyoung
189 1.1 dyoung /*
190 1.1 dyoung * Operations performed by bus_dmamap_sync().
191 1.1 dyoung */
192 1.1 dyoung #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
193 1.1 dyoung #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
194 1.1 dyoung #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
195 1.1 dyoung #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
196 1.1 dyoung
197 1.1 dyoung typedef struct arc_bus_dma_tag *bus_dma_tag_t;
198 1.1 dyoung typedef struct arc_bus_dmamap *bus_dmamap_t;
199 1.1 dyoung
200 1.1 dyoung #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
201 1.1 dyoung
202 1.1 dyoung /*
203 1.1 dyoung * bus_dma_segment_t
204 1.1 dyoung *
205 1.1 dyoung * Describes a single contiguous DMA transaction. Values
206 1.1 dyoung * are suitable for programming into DMA registers.
207 1.1 dyoung */
208 1.1 dyoung struct arc_bus_dma_segment {
209 1.1 dyoung /*
210 1.1 dyoung * PUBLIC MEMBERS: these are used by device drivers.
211 1.1 dyoung */
212 1.1 dyoung bus_addr_t ds_addr; /* DMA address */
213 1.1 dyoung bus_size_t ds_len; /* length of transfer */
214 1.1 dyoung /*
215 1.1 dyoung * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers.
216 1.1 dyoung */
217 1.1 dyoung vaddr_t _ds_paddr; /* CPU physical address */
218 1.1 dyoung vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */
219 1.1 dyoung };
220 1.1 dyoung typedef struct arc_bus_dma_segment bus_dma_segment_t;
221 1.1 dyoung
222 1.1 dyoung /*
223 1.1 dyoung * bus_dma_tag_t
224 1.1 dyoung *
225 1.1 dyoung * A machine-dependent opaque type describing the implementation of
226 1.1 dyoung * DMA for a given bus.
227 1.1 dyoung */
228 1.1 dyoung
229 1.1 dyoung struct arc_bus_dma_tag {
230 1.1 dyoung bus_addr_t dma_offset;
231 1.1 dyoung
232 1.1 dyoung /*
233 1.1 dyoung * DMA mapping methods.
234 1.1 dyoung */
235 1.1 dyoung int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
236 1.1 dyoung bus_size_t, bus_size_t, int, bus_dmamap_t *);
237 1.1 dyoung void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
238 1.1 dyoung int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
239 1.1 dyoung bus_size_t, struct proc *, int);
240 1.1 dyoung int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
241 1.1 dyoung struct mbuf *, int);
242 1.1 dyoung int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
243 1.1 dyoung struct uio *, int);
244 1.1 dyoung int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
245 1.1 dyoung bus_dma_segment_t *, int, bus_size_t, int);
246 1.1 dyoung void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
247 1.1 dyoung void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
248 1.1 dyoung bus_addr_t, bus_size_t, int);
249 1.1 dyoung
250 1.1 dyoung /*
251 1.1 dyoung * DMA memory utility functions.
252 1.1 dyoung */
253 1.1 dyoung int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
254 1.1 dyoung bus_size_t, bus_dma_segment_t *, int, int *, int);
255 1.1 dyoung void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int);
256 1.1 dyoung int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
257 1.1 dyoung int, size_t, void **, int);
258 1.1 dyoung void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
259 1.1 dyoung paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
260 1.1 dyoung int, off_t, int, int);
261 1.1 dyoung };
262 1.1 dyoung
263 1.1 dyoung /*
264 1.1 dyoung * bus_dmamap_t
265 1.1 dyoung *
266 1.1 dyoung * Describes a DMA mapping.
267 1.1 dyoung */
268 1.1 dyoung struct arc_bus_dmamap {
269 1.1 dyoung /*
270 1.1 dyoung * PRIVATE MEMBERS: not for use by machine-independent code.
271 1.1 dyoung */
272 1.1 dyoung bus_size_t _dm_size; /* largest DMA transfer mappable */
273 1.1 dyoung int _dm_segcnt; /* number of segs this map can map */
274 1.1 dyoung bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
275 1.1 dyoung bus_size_t _dm_boundary; /* don't cross this */
276 1.1 dyoung int _dm_flags; /* misc. flags */
277 1.1 dyoung struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
278 1.1 dyoung
279 1.1 dyoung /*
280 1.1 dyoung * Private cookie to be used by the DMA back-end.
281 1.1 dyoung */
282 1.1 dyoung void *_dm_cookie;
283 1.1 dyoung
284 1.1 dyoung /*
285 1.1 dyoung * PUBLIC MEMBERS: these are used by machine-independent code.
286 1.1 dyoung */
287 1.1 dyoung bus_size_t dm_maxsegsz; /* largest possible segment */
288 1.1 dyoung bus_size_t dm_mapsize; /* size of the mapping */
289 1.1 dyoung int dm_nsegs; /* # valid segments in mapping */
290 1.1 dyoung bus_dma_segment_t dm_segs[1]; /* segments; variable length */
291 1.1 dyoung };
292 1.1 dyoung
293 1.1 dyoung #endif /* _KERNEL */
294 1.1 dyoung #endif /* _ARC_BUS_DEFS_H_ */
295