bus_defs.h revision 1.1
1 /* $NetBSD: bus_defs.h,v 1.1 2011/07/01 17:09:58 dyoung Exp $ */ 2 /* NetBSD: bus.h,v 1.27 2000/03/15 16:44:50 drochner Exp */ 3 /* $OpenBSD: bus.h,v 1.15 1999/08/11 23:15:21 niklas Exp $ */ 4 5 /*- 6 * Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc. 7 * All rights reserved. 8 * 9 * This code is derived from software contributed to The NetBSD Foundation 10 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 11 * NASA Ames Research Center. 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 23 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 24 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 25 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 32 * POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 /* 36 * Copyright (c) 1997 Per Fogelstrom. All rights reserved. 37 * Copyright (c) 1996 Niklas Hallqvist. All rights reserved. 38 * 39 * Redistribution and use in source and binary forms, with or without 40 * modification, are permitted provided that the following conditions 41 * are met: 42 * 1. Redistributions of source code must retain the above copyright 43 * notice, this list of conditions and the following disclaimer. 44 * 2. Redistributions in binary form must reproduce the above copyright 45 * notice, this list of conditions and the following disclaimer in the 46 * documentation and/or other materials provided with the distribution. 47 * 3. All advertising materials mentioning features or use of this software 48 * must display the following acknowledgement: 49 * This product includes software developed by Christopher G. Demetriou 50 * for the NetBSD Project. 51 * 4. The name of the author may not be used to endorse or promote products 52 * derived from this software without specific prior written permission 53 * 54 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 55 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 56 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 57 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 58 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 59 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 60 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 61 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 62 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 63 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 64 */ 65 66 #ifndef _ARC_BUS_DEFS_H_ 67 #define _ARC_BUS_DEFS_H_ 68 #ifdef _KERNEL 69 70 /* 71 * Bus address and size types 72 */ 73 typedef u_long bus_addr_t; 74 typedef u_long bus_size_t; 75 76 #include <mips/locore.h> 77 78 #ifdef BUS_SPACE_DEBUG 79 #include <sys/systm.h> /* for printf() prototype */ 80 /* 81 * Macros for checking the aligned-ness of pointers passed to bus 82 * space ops. Strict alignment is required by the MIPS architecture, 83 * and a trap will occur if unaligned access is performed. These 84 * may aid in the debugging of a broken device driver by displaying 85 * useful information about the problem. 86 */ 87 #define __BUS_SPACE_ALIGNED_ADDRESS(p, t) \ 88 ((((u_long)(p)) & (sizeof(t)-1)) == 0) 89 90 #define __BUS_SPACE_ADDRESS_SANITY(p, t, d) \ 91 ({ \ 92 if (__BUS_SPACE_ALIGNED_ADDRESS((p), t) == 0) { \ 93 printf("%s 0x%lx not aligned to %d bytes %s:%d\n", \ 94 d, (u_long)(p), sizeof(t), __FILE__, __LINE__); \ 95 } \ 96 (void) 0; \ 97 }) 98 99 #define BUS_SPACE_ALIGNED_POINTER(p, t) __BUS_SPACE_ALIGNED_ADDRESS(p, t) 100 #else 101 #define __BUS_SPACE_ADDRESS_SANITY(p,t,d) (void) 0 102 #define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t) 103 #endif /* BUS_SPACE_DEBUG */ 104 105 /* 106 * Access methods for bus resources and address space. 107 */ 108 typedef uint32_t bus_space_handle_t; 109 typedef struct arc_bus_space *bus_space_tag_t; 110 111 struct arc_bus_space { 112 const char *bs_name; 113 struct extent *bs_extent; 114 bus_addr_t bs_start; 115 bus_size_t bs_size; 116 117 paddr_t bs_pbase; 118 vaddr_t bs_vbase; 119 120 /* sparse addressing shift count */ 121 uint8_t bs_stride_1; 122 uint8_t bs_stride_2; 123 uint8_t bs_stride_4; 124 uint8_t bs_stride_8; 125 126 /* compose a bus_space handle from tag/handle/addr/size/flags (MD) */ 127 int (*bs_compose_handle)(bus_space_tag_t, bus_addr_t, 128 bus_size_t, int, bus_space_handle_t *); 129 130 /* dispose a bus_space handle (MD) */ 131 int (*bs_dispose_handle)(bus_space_tag_t, bus_space_handle_t, 132 bus_size_t); 133 134 /* convert bus_space tag/handle to physical address (MD) */ 135 int (*bs_paddr)(bus_space_tag_t, bus_space_handle_t, 136 paddr_t *); 137 138 /* mapping/unmapping */ 139 int (*bs_map)(bus_space_tag_t, bus_addr_t, bus_size_t, int, 140 bus_space_handle_t *); 141 void (*bs_unmap)(bus_space_tag_t, bus_space_handle_t, bus_size_t); 142 int (*bs_subregion)(bus_space_tag_t, bus_space_handle_t, 143 bus_size_t, bus_size_t, bus_space_handle_t *); 144 paddr_t (*bs_mmap)(bus_space_tag_t, bus_addr_t, off_t, int, int); 145 146 /* allocation/deallocation */ 147 int (*bs_alloc)(bus_space_tag_t, bus_addr_t, bus_addr_t, 148 bus_size_t, bus_size_t, bus_size_t, int, 149 bus_addr_t *, bus_space_handle_t *); 150 void (*bs_free)(bus_space_tag_t, bus_space_handle_t, bus_size_t); 151 152 void *bs_aux; 153 }; 154 155 /* vaddr_t argument of arc_bus_space_init() */ 156 #define ARC_BUS_SPACE_UNMAPPED ((vaddr_t)0) 157 158 #define BUS_SPACE_MAP_CACHEABLE 0x01 159 #define BUS_SPACE_MAP_LINEAR 0x02 160 #define BUS_SPACE_MAP_PREFETCHABLE 0x04 161 162 #define __BUS_SPACE_HAS_STREAM_METHODS 163 164 #define BUS_SPACE_BARRIER_READ 0x01 165 #define BUS_SPACE_BARRIER_WRITE 0x02 166 167 /* 168 * Flags used in various bus DMA methods. 169 */ 170 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 171 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 172 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 173 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 174 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 175 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 176 #define BUS_DMA_BUS2 0x020 177 #define BUS_DMA_BUS3 0x040 178 #define BUS_DMA_BUS4 0x080 179 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 180 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 181 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 182 183 #define ARC_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */ 184 185 /* Forwards needed by prototypes below. */ 186 struct mbuf; 187 struct uio; 188 189 /* 190 * Operations performed by bus_dmamap_sync(). 191 */ 192 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 193 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 194 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 195 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 196 197 typedef struct arc_bus_dma_tag *bus_dma_tag_t; 198 typedef struct arc_bus_dmamap *bus_dmamap_t; 199 200 #define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0) 201 202 /* 203 * bus_dma_segment_t 204 * 205 * Describes a single contiguous DMA transaction. Values 206 * are suitable for programming into DMA registers. 207 */ 208 struct arc_bus_dma_segment { 209 /* 210 * PUBLIC MEMBERS: these are used by device drivers. 211 */ 212 bus_addr_t ds_addr; /* DMA address */ 213 bus_size_t ds_len; /* length of transfer */ 214 /* 215 * PRIVATE MEMBERS for the DMA back-end.: not for use by drivers. 216 */ 217 vaddr_t _ds_paddr; /* CPU physical address */ 218 vaddr_t _ds_vaddr; /* virtual address, 0 if invalid */ 219 }; 220 typedef struct arc_bus_dma_segment bus_dma_segment_t; 221 222 /* 223 * bus_dma_tag_t 224 * 225 * A machine-dependent opaque type describing the implementation of 226 * DMA for a given bus. 227 */ 228 229 struct arc_bus_dma_tag { 230 bus_addr_t dma_offset; 231 232 /* 233 * DMA mapping methods. 234 */ 235 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 236 bus_size_t, bus_size_t, int, bus_dmamap_t *); 237 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 238 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 239 bus_size_t, struct proc *, int); 240 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 241 struct mbuf *, int); 242 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 243 struct uio *, int); 244 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 245 bus_dma_segment_t *, int, bus_size_t, int); 246 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 247 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 248 bus_addr_t, bus_size_t, int); 249 250 /* 251 * DMA memory utility functions. 252 */ 253 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 254 bus_size_t, bus_dma_segment_t *, int, int *, int); 255 void (*_dmamem_free)(bus_dma_tag_t, bus_dma_segment_t *, int); 256 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 257 int, size_t, void **, int); 258 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 259 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 260 int, off_t, int, int); 261 }; 262 263 /* 264 * bus_dmamap_t 265 * 266 * Describes a DMA mapping. 267 */ 268 struct arc_bus_dmamap { 269 /* 270 * PRIVATE MEMBERS: not for use by machine-independent code. 271 */ 272 bus_size_t _dm_size; /* largest DMA transfer mappable */ 273 int _dm_segcnt; /* number of segs this map can map */ 274 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 275 bus_size_t _dm_boundary; /* don't cross this */ 276 int _dm_flags; /* misc. flags */ 277 struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */ 278 279 /* 280 * Private cookie to be used by the DMA back-end. 281 */ 282 void *_dm_cookie; 283 284 /* 285 * PUBLIC MEMBERS: these are used by machine-independent code. 286 */ 287 bus_size_t dm_maxsegsz; /* largest possible segment */ 288 bus_size_t dm_mapsize; /* size of the mapping */ 289 int dm_nsegs; /* # valid segments in mapping */ 290 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 291 }; 292 293 #endif /* _KERNEL */ 294 #endif /* _ARC_BUS_DEFS_H_ */ 295
Indexes created Mon Sep 29 18:09:42 GMT 2025