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intr.h revision 1.16.6.1 
      1 /*	$NetBSD: intr.h,v 1.16.6.1 2006/09/21 14:30:50 yamt Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  * 3. All advertising materials mentioning features or use of this software
     19  *    must display the following acknowledgement:
     20  *	This product includes software developed by the NetBSD
     21  *	Foundation, Inc. and its contributors.
     22  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  *    contributors may be used to endorse or promote products derived
     24  *    from this software without specific prior written permission.
     25  *
     26  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  * POSSIBILITY OF SUCH DAMAGE.
     37  */
     38 
     39 #ifndef _ARC_INTR_H_
     40 #define _ARC_INTR_H_
     41 
     42 #define IPL_NONE	0	/* disable only this interrupt */
     43 
     44 #define IPL_SOFT	1	/* generic software interrupts (SI 0) */
     45 #define IPL_SOFTCLOCK	2	/* clock software interrupts (SI 0) */
     46 #define IPL_SOFTNET	3	/* network software interrupts (SI 1) */
     47 #define IPL_SOFTSERIAL	4	/* serial software interrupts (SI 1) */
     48 
     49 #define IPL_BIO		5	/* disable block I/O interrupts */
     50 #define IPL_NET		6	/* disable network interrupts */
     51 #define IPL_TTY		7	/* disable terminal interrupts */
     52 #define	IPL_LPT		IPL_TTY
     53 #define	IPL_VM		IPL_TTY
     54 #define IPL_SERIAL	7	/* disable serial hardware interrupts */
     55 #define IPL_CLOCK	8	/* disable clock interrupts */
     56 #define	IPL_STATCLOCK	IPL_CLOCK
     57 #define	IPL_SCHED	IPL_CLOCK
     58 #define IPL_HIGH	8	/* disable all interrupts */
     59 #define	IPL_LOCK	IPL_HIGH
     60 
     61 #define _IPL_NSOFT	4
     62 #define _IPL_N		9
     63 
     64 #define _IPL_SI0_FIRST	IPL_SOFT
     65 #define _IPL_SI0_LAST	IPL_SOFTCLOCK
     66 
     67 #define _IPL_SI1_FIRST	IPL_SOFTNET
     68 #define _IPL_SI1_LAST	IPL_SOFTSERIAL
     69 
     70 #define IPL_SOFTNAMES {							\
     71 	"misc",								\
     72 	"clock",							\
     73 	"net",								\
     74 	"serial",							\
     75 }
     76 
     77 /* Interrupt sharing types. */
     78 #define IST_NONE	0	/* none */
     79 #define IST_PULSE	1	/* pulsed */
     80 #define IST_EDGE	2	/* edge-triggered */
     81 #define IST_LEVEL	3	/* level-triggered */
     82 
     83 #ifdef _KERNEL
     84 #ifndef _LOCORE
     85 
     86 extern const uint32_t *ipl_sr_bits;
     87 
     88 int _splraise(int);
     89 int _spllower(int);
     90 int _splset(int);
     91 int _splget(void);
     92 void _splnone(void);
     93 void _setsoftintr(int);
     94 void _clrsoftintr(int);
     95 
     96 #define spl0()		(void)_spllower(0)
     97 #define splx(s)		(void)_splset(s)
     98 
     99 #define spllowersoftclock() _spllower(ipl_sr_bits[IPL_SOFTCLOCK])
    100 
    101 typedef int ipl_t;
    102 typedef struct {
    103 	ipl_t _sr;
    104 } ipl_cookie_t;
    105 
    106 static inline ipl_cookie_t
    107 makeiplcookie(ipl_t ipl)
    108 {
    109 
    110 	return (ipl_cookie_t){._sr = ipl_sr_bits[ipl]};
    111 }
    112 
    113 static inline int
    114 splraiseipl(ipl_cookie_t icookie)
    115 {
    116 
    117 	return _splraise(icookie._sr);
    118 }
    119 
    120 #include <sys/spl.h>
    121 
    122 #include <mips/softintr.h>
    123 
    124 struct clockframe;
    125 void arc_set_intr(uint32_t, uint32_t (*)(uint32_t, struct clockframe *), int);
    126 extern uint32_t cpu_int_mask;
    127 
    128 /* priority order to handle each CPU INT line specified via set_intr() */
    129 #define ARC_INTPRI_TIMER_INT	0	/* independent CPU INT for timer */
    130 #define ARC_INTPRI_JAZZ		1	/* CPU INT for JAZZ local bus */
    131 #define ARC_INTPRI_PCIISA	2	/* CPU INT for PCI/EISA/ISA */
    132 #define ARC_NINTPRI		3	/* number of total used CPU INTs */
    133 
    134 #endif /* !_LOCORE */
    135 #endif /* _KERNEL */
    136 
    137 #endif /* _ARC_INTR_H_ */
    138