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isadma.c revision 1.1 
      1 /*	$OpenBSD: isadma.c,v 1.2 1996/11/23 21:45:34 kstailey Exp $	*/
      2 /*	$NetBSD: isadma.c,v 1.1 2000/01/23 20:24:29 soda Exp $	*/
      3 
      4 #include <sys/param.h>
      5 #include <sys/systm.h>
      6 #include <sys/device.h>
      7 #include <sys/file.h>
      8 #include <sys/buf.h>
      9 #include <sys/syslog.h>
     10 #include <sys/malloc.h>
     11 #include <sys/uio.h>
     12 
     13 #include <vm/vm.h>
     14 
     15 #include <machine/pio.h>
     16 
     17 #include <dev/isa/isareg.h>
     18 #include <dev/isa/isavar.h>
     19 #include <dev/isa/isadmavar.h>
     20 #include <arch/arc/isa/isadmareg.h> /*XXX*/
     21 
     22 struct dma_info {
     23 	int flags;
     24 	int active;
     25 	caddr_t addr;
     26 	vm_size_t nbytes;
     27 	struct isadma_seg phys[1];
     28 };
     29 
     30 static struct isadma_softc *isadma_sc;	/*XXX ugly */
     31 static struct dma_info dma_info[8];
     32 static u_int8_t dma_finished;
     33 
     34 /* high byte of address is stored in this port for i-th dma channel */
     35 static int dmapageport[2][4] = {
     36 	{0x87, 0x83, 0x81, 0x82},
     37 	{0x8f, 0x8b, 0x89, 0x8a}
     38 };
     39 
     40 static u_int8_t dmamode[4] = {
     41 	DMA37MD_READ | DMA37MD_SINGLE,
     42 	DMA37MD_WRITE | DMA37MD_SINGLE,
     43 	DMA37MD_READ | DMA37MD_LOOP,
     44 	DMA37MD_WRITE | DMA37MD_LOOP
     45 };
     46 
     47 int isadmamatch __P((struct device *, void *, void *));
     48 void isadmaattach __P((struct device *, struct device *, void *));
     49 int isadmaprint __P((void *, const char *));
     50 
     51 struct isadma_softc {
     52 	struct device sc_dev;
     53 	bus_chipset_tag_t sc_bc;
     54 	bus_io_handle_t sc_ioh1;
     55 	bus_io_handle_t sc_ioh2;
     56 }
     57 
     58 struct cfattach isadma_ca = {
     59 	sizeof(struct isadma_softc), isadmamatch, isadmaattach
     60 };
     61 
     62 struct cfdriver isadma_cd = {
     63 	NULL, "isadma", DV_DULL, 1
     64 };
     65 
     66 isadmamatch(parent, match, aux)
     67 	struct device *parent;
     68 	void *match, *aux;
     69 {
     70 	struct isa_attach_args *ia = aux;
     71 
     72 	/* Sure we exist */
     73 	ia->ia_iosize = 0;
     74 	return (1);
     75 }
     76 
     77 void
     78 isadmaattach(parent, self, aux)
     79 	struct device *parent, *self;
     80 	void *aux;
     81 {
     82 	struct isadma_softc *sc = (void *)self;
     83 	struct isa_attach_args *ia = aux;
     84 	bus_chipset_tag_t bc;
     85 	bus_io_handle_t ioh;
     86 
     87 	printf("\n");
     88 
     89 	bc = sc->sc_bc = ia->ia_bc;
     90 	if (bus_io_map(bc, IO_DMA1, DMA_NREGS, &ioh))
     91 		panic("isadmaattach: couldn't map I/O ports");
     92 	sc->sc_ioh1 = ioh;
     93 	if (bus_io_map(bc, IO_DMA2, DMA_NREGS*2, &ioh))
     94 		panic("isadmaattach: couldn't map I/O ports");
     95 	sc->sc_ioh2 = ioh;
     96 	isadma_sc = sc;
     97 }
     98 
     99 /*
    100  * isadma_cascade(): program 8237 DMA controller channel to accept
    101  * external dma control by a board.
    102  */
    103 void
    104 isadma_cascade(chan)
    105 	int chan;
    106 {
    107 	struct isadma_softc *sc = isadma_sc;
    108 	bus_chipset_tag_t bc = sc->sc_bc;
    109 
    110 #ifdef ISADMA_DEBUG
    111 	if (chan < 0 || chan > 7)
    112 		panic("isadma_cascade: impossible request");
    113 #endif
    114 
    115 	/* set dma channel mode, and set dma channel mode */
    116 	if ((chan & 4) == 0) {
    117 		bus_io_write_1(bc, sc->sc_ioh1, DMA1_MODE, chan | DMA37MD_CASCADE);
    118 		bus_io_write_1(bc, sc->sc_ioh1, DMA1_SMSK, chan);
    119 	} else {
    120 		chan &= 3;
    121 
    122 		bus_io_write_1(bc, sc->sc_ioh2, DMA2_MODE, chan | DMA37MD_CASCADE);
    123 		bus_io_write_1(bc, sc->sc_ioh2, DMA2_SMSK, chan);
    124 	}
    125 }
    126 
    127 /*
    128  * isadma_start(): program 8237 DMA controller channel, avoid page alignment
    129  * problems by using a bounce buffer.
    130  */
    131 void
    132 isadma_start(addr, nbytes, chan, flags)
    133 	caddr_t addr;
    134 	vm_size_t nbytes;
    135 	int chan;
    136 	int flags;
    137 {
    138 	struct dma_info *di;
    139 	int waport;
    140 	int mflags;
    141 	vm_size_t size;
    142 	struct isadma_softc *sc = isadma_sc;
    143 	bus_chipset_tag_t bc = sc->sc_bc;
    144 	bus_io_handle_t ioh;
    145 
    146 #ifdef ISADMA_DEBUG
    147 	if (chan < 0 || chan > 7 ||
    148 	    (((flags & DMAMODE_READ) != 0) + ((flags & DMAMODE_WRITE) != 0) +
    149 	    ((flags & DMAMODE_LOOP) != 0) != 1) ||
    150 	    ((chan & 4) ? (nbytes >= (1<<17) || nbytes & 1 || (u_int)addr & 1) :
    151 	    (nbytes >= (1<<16))))
    152 		panic("isadma_start: impossible request");
    153 #endif
    154 
    155 	di = dma_info+chan;
    156 	if (di->active) {
    157 		log(LOG_ERR,"isadma_start: old request active on %d\n",chan);
    158 		isadma_abort(chan);
    159 	}
    160 
    161 	di->flags = flags;
    162 	di->active = 1;
    163 	di->addr = addr;
    164 	di->nbytes = nbytes;
    165 
    166 	mflags = ISADMA_MAP_WAITOK | ISADMA_MAP_BOUNCE | ISADMA_MAP_CONTIG;
    167 	mflags |= (chan & 4) ? ISADMA_MAP_16BIT : ISADMA_MAP_8BIT;
    168 
    169 	if (isadma_map(addr, nbytes, di->phys, mflags) != 1)
    170 		panic("isadma_start: cannot map");
    171 
    172 	/* XXX Will this do what we want with DMAMODE_LOOP?  */
    173 	if ((flags & DMAMODE_READ) == 0)
    174 		isadma_copytobuf(addr, nbytes, 1, di->phys);
    175 
    176 	dma_finished &= ~(1 << chan);
    177 
    178 	if ((chan & 4) == 0) {
    179 		ioh = sc->sc_ioh1;
    180 		/*
    181 		 * Program one of DMA channels 0..3.  These are
    182 		 * byte mode channels.
    183 		 */
    184 		/* set dma channel mode, and reset address ff */
    185 		bus_io_write_1(bc, ioh, DMA1_MODE, chan | dmamode[flags]);
    186 		bus_io_write_1(bc, ioh, DMA1_FFC, 0);
    187 
    188 		/* send start address */
    189 		waport = DMA1_CHN(chan);
    190 		outb(dmapageport[0][chan], di->phys[0].addr>>16);
    191 		outb(waport, di->phys[0].addr);
    192 		outb(waport, di->phys[0].addr>>8);
    193 
    194 		/* send count */
    195 		outb(waport + 1, --nbytes);
    196 		outb(waport + 1, nbytes>>8);
    197 
    198 		/* unmask channel */
    199 		bus_io_write_1(bc, ioh, DMA1_SMSK, chan | DMA37SM_CLEAR);
    200 	} else {
    201 		ioh = sc->sc_ioh2;
    202 		/*
    203 		 * Program one of DMA channels 4..7.  These are
    204 		 * word mode channels.
    205 		 */
    206 		/* set dma channel mode, and reset address ff */
    207 		bus_io_write_1(bc, ioh, DMA2_MODE, (chan & 3) | dmamode[flags]);
    208 		bus_io_write_1(bc, ioh, DMA2_FFC, 0);
    209 
    210 		/* send start address */
    211 		waport = DMA2_CHN(chan & 3);
    212 		outb(dmapageport[1][chan], di->phys[0].addr>>16);
    213 		outb(waport, di->phys[0].addr>>1);
    214 		outb(waport, di->phys[0].addr>>9);
    215 
    216 		/* send count */
    217 		nbytes >>= 1;
    218 		outb(waport + 2, --nbytes);
    219 		outb(waport + 2, nbytes>>8);
    220 
    221 		/* unmask channel */
    222 		bus_io_write_1(bc, ioh, DMA2_SMSK, (chan & 3) | DMA37SM_CLEAR);
    223 	}
    224 }
    225 
    226 void
    227 isadma_abort(chan)
    228 	int chan;
    229 {
    230 	struct dma_info *di;
    231 	struct isadma_softc *sc = isadma_sc;
    232 	bus_chipset_tag_t bc = sc->sc_bc;
    233 
    234 #ifdef ISADMA_DEBUG
    235 	if (chan < 0 || chan > 7)
    236 		panic("isadma_abort: impossible request");
    237 #endif
    238 
    239 	di = dma_info+chan;
    240 	if (! di->active) {
    241 		log(LOG_ERR,"isadma_abort: no request active on %d\n",chan);
    242 		return;
    243 	}
    244 
    245 	/* mask channel */
    246 	if ((chan & 4) == 0)
    247 		bus_io_write_1(bc, sc->sc_ioh1, DMA1_SMSK, DMA37SM_SET | chan);
    248 	else
    249 		bus_io_write_1(bc, sc->sc_ioh2, DMA2_SMSK, DMA37SM_SET | (chan & 3));
    250 
    251 	isadma_unmap(di->addr, di->nbytes, 1, di->phys);
    252 	di->active = 0;
    253 }
    254 
    255 int
    256 isadma_finished(chan)
    257 	int chan;
    258 {
    259 	struct isadma_softc *sc = isadma_sc;
    260 	bus_chipset_tag_t bc = sc->sc_bc;
    261 
    262 #ifdef ISADMA_DEBUG
    263 	if (chan < 0 || chan > 7)
    264 		panic("isadma_finished: impossible request");
    265 #endif
    266 
    267 	/* check that the terminal count was reached */
    268 	if ((chan & 4) == 0)
    269 		dma_finished |= bus_io_read_1(bc, sc->sc_ioh1, DMA1_SR) & 0x0f;
    270 	else
    271 		dma_finished |= (bus_io_read_1(bc, sc->sc_ioh2, DMA2_SR) & 0x0f) << 4;
    272 
    273 	return ((dma_finished & (1 << chan)) != 0);
    274 }
    275 
    276 void
    277 isadma_done(chan)
    278 	int chan;
    279 {
    280 	struct dma_info *di;
    281 	u_char tc;
    282 	struct isadma_softc *sc = isadma_sc;
    283 	bus_chipset_tag_t bc = sc->sc_bc;
    284 
    285 #ifdef DIAGNOSTIC
    286 	if (chan < 0 || chan > 7)
    287 		panic("isadma_done: impossible request");
    288 #endif
    289 
    290 	di = dma_info+chan;
    291 	if (! di->active) {
    292 		log(LOG_ERR,"isadma_done: no request active on %d\n",chan);
    293 		return;
    294 	}
    295 
    296 	/* check that the terminal count was reached */
    297 	if ((chan & 4) == 0)
    298 		tc = bus_io_read_1(bc, sc->sc_ioh1, DMA1_SR) & (1 << chan);
    299 	else
    300 		tc = bus_io_read_1(bc, sc->sc_ioh2, DMA2_SR) & (1 << (chan & 3));
    301 	if (tc == 0)
    302 		/* XXX probably should panic or something */
    303 		log(LOG_ERR, "dma channel %d not finished\n", chan);
    304 
    305 	/* mask channel */
    306 	if ((chan & 4) == 0)
    307 		bus_io_write_1(bc, sc->sc_ioh1, DMA1_SMSK, DMA37SM_SET | chan);
    308 	else
    309 		bus_io_write_1(bc, sc->sc_ioh2, DMA2_SMSK, DMA37SM_SET | (chan & 3));
    310 
    311 	/* XXX Will this do what we want with DMAMODE_LOOP?  */
    312 	if (di->flags & DMAMODE_READ)
    313 		isadma_copyfrombuf(di->addr, di->nbytes, 1, di->phys);
    314 
    315 	isadma_unmap(di->addr, di->nbytes, 1, di->phys);
    316 	di->active = 0;
    317 }
    318