timer_isa.c revision 1.1.10.4
1 1.1.10.4 nathanw /* $NetBSD: timer_isa.c,v 1.1.10.4 2002/10/18 02:35:14 nathanw Exp $ */ 2 1.1.10.2 nathanw /* $OpenBSD: clock_mc.c,v 1.9 1998/03/16 09:38:26 pefo Exp $ */ 3 1.1.10.2 nathanw /* NetBSD: clock_mc.c,v 1.2 1995/06/28 04:30:30 cgd Exp */ 4 1.1.10.2 nathanw 5 1.1.10.2 nathanw /* 6 1.1.10.2 nathanw * Copyright (c) 1988 University of Utah. 7 1.1.10.2 nathanw * Copyright (c) 1992, 1993 8 1.1.10.2 nathanw * The Regents of the University of California. All rights reserved. 9 1.1.10.2 nathanw * 10 1.1.10.2 nathanw * This code is derived from software contributed to Berkeley by 11 1.1.10.2 nathanw * the Systems Programming Group of the University of Utah Computer 12 1.1.10.2 nathanw * Science Department and Ralph Campbell. 13 1.1.10.2 nathanw * 14 1.1.10.2 nathanw * Redistribution and use in source and binary forms, with or without 15 1.1.10.2 nathanw * modification, are permitted provided that the following conditions 16 1.1.10.2 nathanw * are met: 17 1.1.10.2 nathanw * 1. Redistributions of source code must retain the above copyright 18 1.1.10.2 nathanw * notice, this list of conditions and the following disclaimer. 19 1.1.10.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright 20 1.1.10.2 nathanw * notice, this list of conditions and the following disclaimer in the 21 1.1.10.2 nathanw * documentation and/or other materials provided with the distribution. 22 1.1.10.2 nathanw * 3. All advertising materials mentioning features or use of this software 23 1.1.10.2 nathanw * must display the following acknowledgement: 24 1.1.10.2 nathanw * This product includes software developed by the University of 25 1.1.10.2 nathanw * California, Berkeley and its contributors. 26 1.1.10.2 nathanw * 4. Neither the name of the University nor the names of its contributors 27 1.1.10.2 nathanw * may be used to endorse or promote products derived from this software 28 1.1.10.2 nathanw * without specific prior written permission. 29 1.1.10.2 nathanw * 30 1.1.10.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 31 1.1.10.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 32 1.1.10.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 33 1.1.10.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 34 1.1.10.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 35 1.1.10.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 36 1.1.10.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 37 1.1.10.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 38 1.1.10.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 39 1.1.10.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 40 1.1.10.2 nathanw * SUCH DAMAGE. 41 1.1.10.2 nathanw * 42 1.1.10.2 nathanw * from: Utah Hdr: clock.c 1.18 91/01/21 43 1.1.10.2 nathanw * 44 1.1.10.2 nathanw * @(#)clock.c 8.1 (Berkeley) 6/10/93 45 1.1.10.2 nathanw */ 46 1.1.10.2 nathanw 47 1.1.10.2 nathanw #include <sys/param.h> 48 1.1.10.2 nathanw #include <sys/kernel.h> 49 1.1.10.2 nathanw #include <sys/systm.h> 50 1.1.10.2 nathanw #include <sys/device.h> 51 1.1.10.2 nathanw 52 1.1.10.2 nathanw #include <machine/bus.h> 53 1.1.10.2 nathanw 54 1.1.10.2 nathanw #include <dev/isa/isareg.h> 55 1.1.10.2 nathanw #include <dev/isa/isavar.h> 56 1.1.10.2 nathanw 57 1.1.10.2 nathanw #include <dev/isa/isareg.h> 58 1.1.10.2 nathanw #include <dev/ic/i8253reg.h> 59 1.1.10.2 nathanw 60 1.1.10.2 nathanw #include <arc/arc/timervar.h> 61 1.1.10.2 nathanw #include <arc/isa/timer_isavar.h> 62 1.1.10.2 nathanw 63 1.1.10.2 nathanw #define TIMER_IOSIZE 4 64 1.1.10.2 nathanw #define TIMER_IRQ 0 65 1.1.10.2 nathanw 66 1.1.10.2 nathanw struct timer_isa_softc { 67 1.1.10.2 nathanw struct device sc_dev; 68 1.1.10.2 nathanw 69 1.1.10.2 nathanw bus_space_tag_t sc_iot; 70 1.1.10.2 nathanw bus_space_handle_t sc_ioh; 71 1.1.10.2 nathanw }; 72 1.1.10.2 nathanw 73 1.1.10.2 nathanw /* Definition of the driver for autoconfig. */ 74 1.1.10.2 nathanw int timer_isa_match __P((struct device *, struct cfdata *, void *)); 75 1.1.10.2 nathanw void timer_isa_attach __P((struct device *, struct device *, void *)); 76 1.1.10.2 nathanw 77 1.1.10.4 nathanw CFATTACH_DECL(timer_isa, sizeof(struct timer_isa_softc), 78 1.1.10.4 nathanw timer_isa_match, timer_isa_attach, NULL, NULL); 79 1.1.10.2 nathanw 80 1.1.10.2 nathanw /* ISA timer access code */ 81 1.1.10.2 nathanw void timer_isa_init __P((struct device *)); 82 1.1.10.2 nathanw 83 1.1.10.2 nathanw struct timerfns timerfns_isa = { 84 1.1.10.2 nathanw timer_isa_init 85 1.1.10.2 nathanw }; 86 1.1.10.2 nathanw 87 1.1.10.2 nathanw int timer_isa_conf = 0; 88 1.1.10.2 nathanw 89 1.1.10.2 nathanw int 90 1.1.10.2 nathanw timer_isa_match(parent, match, aux) 91 1.1.10.2 nathanw struct device *parent; 92 1.1.10.2 nathanw struct cfdata *match; 93 1.1.10.2 nathanw void *aux; 94 1.1.10.2 nathanw { 95 1.1.10.2 nathanw struct isa_attach_args *ia = aux; 96 1.1.10.2 nathanw bus_space_handle_t ioh; 97 1.1.10.2 nathanw 98 1.1.10.2 nathanw if (ia->ia_nio < 1 || 99 1.1.10.2 nathanw (ia->ia_io[0].ir_addr != ISACF_PORT_DEFAULT && 100 1.1.10.2 nathanw ia->ia_io[0].ir_addr != IO_TIMER1)) 101 1.1.10.2 nathanw return (0); 102 1.1.10.2 nathanw 103 1.1.10.2 nathanw if (ia->ia_niomem > 0 && 104 1.1.10.2 nathanw (ia->ia_iomem[0].ir_addr != ISACF_IOMEM_DEFAULT)) 105 1.1.10.2 nathanw return (0); 106 1.1.10.2 nathanw 107 1.1.10.2 nathanw if (ia->ia_nirq > 0 && 108 1.1.10.2 nathanw (ia->ia_irq[0].ir_irq != ISACF_IRQ_DEFAULT && 109 1.1.10.2 nathanw ia->ia_irq[0].ir_irq != TIMER_IRQ)) 110 1.1.10.2 nathanw return (0); 111 1.1.10.2 nathanw 112 1.1.10.2 nathanw if (ia->ia_ndrq > 0 && 113 1.1.10.2 nathanw (ia->ia_drq[0].ir_drq != ISACF_DRQ_DEFAULT)) 114 1.1.10.2 nathanw return (0); 115 1.1.10.2 nathanw 116 1.1.10.2 nathanw if (!timer_isa_conf) 117 1.1.10.2 nathanw return (0); 118 1.1.10.2 nathanw 119 1.1.10.2 nathanw if (bus_space_map(ia->ia_iot, IO_TIMER1, TIMER_IOSIZE, 0, &ioh)) 120 1.1.10.2 nathanw return (0); 121 1.1.10.2 nathanw 122 1.1.10.2 nathanw bus_space_unmap(ia->ia_iot, ioh, TIMER_IOSIZE); 123 1.1.10.2 nathanw 124 1.1.10.2 nathanw ia->ia_nio = 1; 125 1.1.10.2 nathanw ia->ia_io[0].ir_addr = IO_TIMER1; 126 1.1.10.2 nathanw ia->ia_io[0].ir_size = TIMER_IOSIZE; 127 1.1.10.2 nathanw 128 1.1.10.2 nathanw ia->ia_niomem = 0; 129 1.1.10.2 nathanw ia->ia_nirq = 0; 130 1.1.10.2 nathanw ia->ia_ndrq = 0; 131 1.1.10.2 nathanw 132 1.1.10.2 nathanw return (1); 133 1.1.10.2 nathanw } 134 1.1.10.2 nathanw 135 1.1.10.2 nathanw void 136 1.1.10.2 nathanw timer_isa_attach(parent, self, aux) 137 1.1.10.2 nathanw struct device *parent; 138 1.1.10.2 nathanw struct device *self; 139 1.1.10.2 nathanw void *aux; 140 1.1.10.2 nathanw { 141 1.1.10.2 nathanw struct timer_isa_softc *sc = (struct timer_isa_softc *)self; 142 1.1.10.2 nathanw struct isa_attach_args *ia = aux; 143 1.1.10.2 nathanw void *ih; 144 1.1.10.2 nathanw 145 1.1.10.2 nathanw sc->sc_iot = ia->ia_iot; 146 1.1.10.2 nathanw if (bus_space_map(sc->sc_iot, ia->ia_io[0].ir_addr, 147 1.1.10.2 nathanw ia->ia_io[0].ir_size, 0, &sc->sc_ioh)) 148 1.1.10.2 nathanw panic("timer_isa_attach: couldn't map clock I/O space"); 149 1.1.10.2 nathanw 150 1.1.10.2 nathanw ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, IST_PULSE, 151 1.1.10.2 nathanw IPL_CLOCK, (int (*)(void *))hardclock, 152 1.1.10.2 nathanw NULL /* clockframe is hardcoded */); 153 1.1.10.2 nathanw if (ih == NULL) 154 1.1.10.2 nathanw printf("%s: can't establish interrupt\n", sc->sc_dev.dv_xname); 155 1.1.10.2 nathanw 156 1.1.10.2 nathanw timerattach(&sc->sc_dev, &timerfns_isa); 157 1.1.10.2 nathanw } 158 1.1.10.2 nathanw 159 1.1.10.2 nathanw void 160 1.1.10.2 nathanw timer_isa_init(self) 161 1.1.10.2 nathanw struct device *self; 162 1.1.10.2 nathanw { 163 1.1.10.2 nathanw struct timer_isa_softc *sc = (struct timer_isa_softc *)self; 164 1.1.10.2 nathanw 165 1.1.10.2 nathanw bus_space_write_1(sc->sc_iot, sc->sc_ioh, TIMER_MODE, 166 1.1.10.2 nathanw TIMER_SEL0 | TIMER_16BIT | TIMER_RATEGEN); 167 1.1.10.2 nathanw bus_space_write_1(sc->sc_iot, sc->sc_ioh, TIMER_CNTR0, 168 1.1.10.2 nathanw TIMER_DIV(hz) % 256); 169 1.1.10.2 nathanw bus_space_write_1(sc->sc_iot, sc->sc_ioh, TIMER_CNTR0, 170 1.1.10.2 nathanw TIMER_DIV(hz) / 256); 171 1.1.10.2 nathanw } 172
Indexes created Sat Oct 11 19:10:01 GMT 2025