Home | History | Annotate | Line # | Download | only in jazz
fdc_jazzio.c revision 1.9
      1 /*	$NetBSD: fdc_jazzio.c,v 1.9 2003/08/07 16:26:50 agc Exp $	*/
      2 /*	$OpenBSD: fd.c,v 1.6 1998/10/03 21:18:57 millert Exp $	*/
      3 /*	NetBSD: fd.c,v 1.78 1995/07/04 07:23:09 mycroft Exp 	*/
      4 
      5 /*-
      6  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      7  * All rights reserved.
      8  *
      9  * This code is derived from software contributed to The NetBSD Foundation
     10  * by Charles M. Hannum.
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  * 3. All advertising materials mentioning features or use of this software
     21  *    must display the following acknowledgement:
     22  *        This product includes software developed by the NetBSD
     23  *        Foundation, Inc. and its contributors.
     24  * 4. Neither the name of The NetBSD Foundation nor the names of its
     25  *    contributors may be used to endorse or promote products derived
     26  *    from this software without specific prior written permission.
     27  *
     28  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     29  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     30  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     31  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     32  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     33  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     34  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     35  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     36  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     37  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     38  * POSSIBILITY OF SUCH DAMAGE.
     39  */
     40 
     41 /*-
     42  * Copyright (c) 1990 The Regents of the University of California.
     43  * All rights reserved.
     44  *
     45  * This code is derived from software contributed to Berkeley by
     46  * Don Ahn.
     47  *
     48  * Redistribution and use in source and binary forms, with or without
     49  * modification, are permitted provided that the following conditions
     50  * are met:
     51  * 1. Redistributions of source code must retain the above copyright
     52  *    notice, this list of conditions and the following disclaimer.
     53  * 2. Redistributions in binary form must reproduce the above copyright
     54  *    notice, this list of conditions and the following disclaimer in the
     55  *    documentation and/or other materials provided with the distribution.
     56  * 3. Neither the name of the University nor the names of its contributors
     57  *    may be used to endorse or promote products derived from this software
     58  *    without specific prior written permission.
     59  *
     60  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     61  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     62  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     63  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     64  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     65  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     66  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     67  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     68  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     69  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     70  * SUCH DAMAGE.
     71  *
     72  *	@(#)fd.c	7.4 (Berkeley) 5/25/91
     73  */
     74 
     75 #include <sys/cdefs.h>
     76 __KERNEL_RCSID(0, "$NetBSD: fdc_jazzio.c,v 1.9 2003/08/07 16:26:50 agc Exp $");
     77 
     78 #include <sys/param.h>
     79 #include <sys/systm.h>
     80 #include <sys/callout.h>
     81 #include <sys/device.h>
     82 
     83 #include <machine/autoconf.h>
     84 #include <machine/bus.h>
     85 
     86 #include <arc/jazz/jazzdmatlbreg.h>
     87 #include <arc/jazz/fdreg.h>
     88 #include <arc/jazz/fdcvar.h>
     89 #include <arc/jazz/jazziovar.h>
     90 #include <arc/jazz/dma.h>
     91 
     92 /* controller driver configuration */
     93 int fdc_jazzio_probe(struct device *, struct cfdata *, void *);
     94 void fdc_jazzio_attach(struct device *, struct device *, void *);
     95 
     96 /* MD DMA hook functions */
     97 void fdc_jazzio_dma_start(struct fdc_softc *, caddr_t, size_t, int);
     98 void fdc_jazzio_dma_abort(struct fdc_softc *);
     99 void fdc_jazzio_dma_done(struct fdc_softc *);
    100 
    101 /* software state, per controller */
    102 struct fdc_jazzio_softc {
    103 	struct fdc_softc sc_fdc;	/* base fdc device */
    104 
    105 	bus_space_handle_t sc_baseioh;	/* base I/O handle */
    106 	bus_space_handle_t sc_dmaioh;	/* DMA I/O handle */
    107 
    108 	bus_dma_tag_t sc_dmat;		/* bus_dma tag */
    109 	bus_dmamap_t sc_dmamap;		/* bus_dma map */
    110 	int sc_datain;			/* data direction */
    111 };
    112 
    113 CFATTACH_DECL(fdc_jazzio, sizeof(struct fdc_jazzio_softc),
    114     fdc_jazzio_probe, fdc_jazzio_attach, NULL, NULL);
    115 
    116 #define FDC_NPORT 6
    117 #define FDC_OFFSET 2 /* Should we use bus_space_subregion() or not? */
    118 
    119 int
    120 fdc_jazzio_probe(parent, match, aux)
    121 	struct device *parent;
    122 	struct cfdata *match;
    123 	void *aux;
    124 {
    125 	struct jazzio_attach_args *ja = aux;
    126 	bus_space_tag_t iot;
    127 	bus_space_handle_t base_ioh, ioh;
    128 	int rv;
    129 
    130 	if (strcmp(ja->ja_name, "I82077") != 0)
    131 		return 0;
    132 
    133 	iot = ja->ja_bust;
    134 	rv = 0;
    135 
    136 	/* Map the I/O space. */
    137 	if (bus_space_map(iot, ja->ja_addr,
    138 	    FDC_OFFSET + FDC_NPORT, 0, &base_ioh))
    139 		return 0;
    140 
    141 	if (bus_space_subregion(iot, base_ioh, FDC_OFFSET, FDC_NPORT, &ioh))
    142 		goto out;
    143 
    144 	/* reset */
    145 	bus_space_write_1(iot, ioh, FDOUT, 0);
    146 	delay(100);
    147 	bus_space_write_1(iot, ioh, FDOUT, FDO_FRST);
    148 
    149 	/* see if it can handle a command */
    150 	if (out_fdc(iot, ioh, NE7CMD_SPECIFY) < 0)
    151 		goto out;
    152 	out_fdc(iot, ioh, 0xdf); /* XXX */
    153 	out_fdc(iot, ioh, 2); /* XXX */
    154 
    155 	rv = 1;
    156 
    157  out:
    158 	bus_space_unmap(iot, base_ioh, FDC_OFFSET + FDC_NPORT);
    159 	return rv;
    160 }
    161 
    162 void
    163 fdc_jazzio_attach(parent, self, aux)
    164 	struct device *parent, *self;
    165 	void *aux;
    166 {
    167 	struct fdc_jazzio_softc *jsc = (struct fdc_jazzio_softc *)self;
    168 	struct fdc_softc *fdc = &jsc->sc_fdc;
    169 	struct jazzio_attach_args *ja = aux;
    170 
    171 	fdc->sc_iot = ja->ja_bust;
    172 
    173 	fdc->sc_maxiosize = MAXPHYS;
    174 	fdc->sc_dma_start = fdc_jazzio_dma_start;
    175 	fdc->sc_dma_abort = fdc_jazzio_dma_abort;
    176 	fdc->sc_dma_done = fdc_jazzio_dma_done;
    177 
    178 	jsc->sc_dmat = ja->ja_dmat;
    179 
    180 	if (bus_space_map(fdc->sc_iot, ja->ja_addr,
    181 	    FDC_OFFSET + FDC_NPORT, 0, &jsc->sc_baseioh)) {
    182 		printf(": unable to map I/O space\n");
    183 		return;
    184 	}
    185 
    186 	if (bus_space_subregion(fdc->sc_iot, jsc->sc_baseioh,
    187 	    FDC_OFFSET, FDC_NPORT, &fdc->sc_ioh)) {
    188 		printf(": unable to subregion I/O space\n");
    189 		goto out_unmap1;
    190 	}
    191 
    192 	if (bus_space_map(fdc->sc_iot, jazzio_conf->jc_fdcdmareg,
    193 	    R4030_DMA_RANGE, 0, &jsc->sc_dmaioh)) {
    194 		printf(": unable to map DMA I/O space\n");
    195 		goto out_unmap1;
    196 	}
    197 
    198 	if (bus_dmamap_create(jsc->sc_dmat, MAXPHYS, 1, MAXPHYS, 0,
    199 	    BUS_DMA_ALLOCNOW|BUS_DMA_NOWAIT, &jsc->sc_dmamap)) {
    200 		printf(": unable to create DMA map\n");
    201 		goto out_unmap2;
    202 	}
    203 
    204 	printf("\n");
    205 
    206 	jazzio_intr_establish(ja->ja_intr, fdcintr, fdc);
    207 
    208 	fdcattach(fdc);
    209 	return;
    210 
    211  out_unmap2:
    212 	bus_space_unmap(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_RANGE);
    213  out_unmap1:
    214 	bus_space_unmap(fdc->sc_iot, jsc->sc_baseioh, FDC_OFFSET + FDC_NPORT);
    215 }
    216 
    217 void
    218 fdc_jazzio_dma_start(fdc, addr, size, datain)
    219 	struct fdc_softc *fdc;
    220 	caddr_t addr;
    221 	size_t size;
    222 	int datain;
    223 {
    224 	struct fdc_jazzio_softc *jsc = (void *)fdc;
    225 
    226 	/* halt DMA */
    227 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
    228 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
    229 
    230 	jsc->sc_datain = datain;
    231 
    232 	bus_dmamap_load(jsc->sc_dmat, jsc->sc_dmamap, addr, size, NULL,
    233 	    BUS_DMA_NOWAIT | BUS_DMA_STREAMING |
    234 	    (datain ? BUS_DMA_READ : BUS_DMA_WRITE));
    235 	bus_dmamap_sync(jsc->sc_dmat, jsc->sc_dmamap,
    236 	    0, jsc->sc_dmamap->dm_mapsize,
    237 	    datain ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
    238 
    239 	/* load new transfer parameters */
    240 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
    241 	    R4030_DMA_ADDR, jsc->sc_dmamap->dm_segs[0].ds_addr);
    242 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
    243 	    R4030_DMA_COUNT, jsc->sc_dmamap->dm_segs[0].ds_len);
    244 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
    245 	    R4030_DMA_MODE, R4030_DMA_MODE_160NS | R4030_DMA_MODE_8);
    246 
    247 	/* start DMA */
    248 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh,
    249 	    R4030_DMA_ENAB, R4030_DMA_ENAB_RUN |
    250 	    (datain ? R4030_DMA_ENAB_READ : R4030_DMA_ENAB_WRITE));
    251 }
    252 
    253 void
    254 fdc_jazzio_dma_abort(fdc)
    255 	struct fdc_softc *fdc;
    256 {
    257 	struct fdc_jazzio_softc *jsc = (void *)fdc;
    258 
    259 	/* halt DMA */
    260 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
    261 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
    262 }
    263 
    264 void
    265 fdc_jazzio_dma_done(fdc)
    266 	struct fdc_softc *fdc;
    267 {
    268 	struct fdc_jazzio_softc *jsc = (void *)fdc;
    269 
    270 	/* halt DMA */
    271 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_COUNT, 0);
    272 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_ENAB, 0);
    273 	bus_space_write_4(fdc->sc_iot, jsc->sc_dmaioh, R4030_DMA_MODE, 0);
    274 
    275 	bus_dmamap_sync(jsc->sc_dmat, jsc->sc_dmamap,
    276 	    0, jsc->sc_dmamap->dm_mapsize,
    277 	    jsc->sc_datain ? BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
    278 	bus_dmamap_unload(jsc->sc_dmat, jsc->sc_dmamap);
    279 }
    280