necpb.c revision 1.30.4.1
1 /* $NetBSD: necpb.c,v 1.30.4.1 2008/05/16 02:21:55 yamt Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 35 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Charles M. Hannum. 48 * 4. The name of the author may not be used to endorse or promote products 49 * derived from this software without specific prior written permission. 50 * 51 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 52 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 53 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 54 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 55 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 56 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 57 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 58 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 59 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 60 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 61 */ 62 63 #include <sys/cdefs.h> 64 __KERNEL_RCSID(0, "$NetBSD: necpb.c,v 1.30.4.1 2008/05/16 02:21:55 yamt Exp $"); 65 66 #include "opt_pci.h" 67 68 #include <sys/types.h> 69 #include <sys/param.h> 70 #include <sys/time.h> 71 #include <sys/systm.h> 72 #include <sys/errno.h> 73 #include <sys/device.h> 74 #include <sys/malloc.h> 75 #include <sys/extent.h> 76 77 #include <uvm/uvm_extern.h> 78 79 #define _ARC_BUS_DMA_PRIVATE 80 #include <machine/bus.h> 81 82 #include <machine/pio.h> 83 84 #include <machine/autoconf.h> 85 #include <machine/cpu.h> 86 #include <machine/platform.h> 87 88 #include <mips/cache.h> 89 90 #include <dev/pci/pcivar.h> 91 #include <dev/pci/pcireg.h> 92 #include <dev/pci/pcidevs.h> 93 #ifdef PCI_NETBSD_CONFIGURE 94 #include <dev/pci/pciconf.h> 95 #endif 96 97 #include <arc/jazz/rd94.h> 98 #include <arc/pci/necpbvar.h> 99 100 #include "ioconf.h" 101 102 int necpbmatch(struct device *, struct cfdata *, void *); 103 void necpbattach(struct device *, struct device *, void *); 104 105 void necpb_attach_hook(struct device *, struct device *, 106 struct pcibus_attach_args *); 107 int necpb_bus_maxdevs(pci_chipset_tag_t, int); 108 pcitag_t necpb_make_tag(pci_chipset_tag_t, int, int, int); 109 void necpb_decompose_tag(pci_chipset_tag_t, pcitag_t, int *, 110 int *, int *); 111 pcireg_t necpb_conf_read(pci_chipset_tag_t, pcitag_t, int); 112 void necpb_conf_write(pci_chipset_tag_t, pcitag_t, int, pcireg_t); 113 int necpb_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 114 const char * necpb_intr_string(pci_chipset_tag_t, pci_intr_handle_t); 115 void * necpb_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, 116 int, int (*func)(void *), void *); 117 void necpb_intr_disestablish(pci_chipset_tag_t, void *); 118 #ifdef PCI_NETBSD_CONFIGURE 119 void necpb_conf_interrupt(pci_chipset_tag_t, int, int, int, int, 120 int *); 121 int necpb_conf_hook(pci_chipset_tag_t, int, int, int, pcireg_t); 122 #endif 123 124 uint32_t necpb_intr(uint32_t, struct clockframe *); 125 126 127 CFATTACH_DECL(necpb, sizeof(struct necpb_softc), 128 necpbmatch, necpbattach, NULL, NULL); 129 130 static struct necpb_intrhand *necpb_inttbl[4]; 131 132 /* There can be only one. */ 133 int necpbfound; 134 struct necpb_context necpb_main_context; 135 static long necpb_mem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)]; 136 static long necpb_io_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)]; 137 138 int 139 necpbmatch(struct device *parent, struct cfdata *match, void *aux) 140 { 141 struct confargs *ca = aux; 142 143 if (strcmp(ca->ca_name, necpb_cd.cd_name) != 0) 144 return 0; 145 146 if (necpbfound) 147 return 0; 148 149 return 1; 150 } 151 152 /* 153 * Set up the chipset's function pointers. 154 */ 155 void 156 necpb_init(struct necpb_context *ncp) 157 { 158 pci_chipset_tag_t pc; 159 #ifndef PCI_NETBSD_CONFIGURE 160 pcitag_t tag; 161 pcireg_t id, class, csr; 162 u_int dev; 163 #endif 164 165 if (ncp->nc_initialized) 166 return; 167 168 arc_large_bus_space_init(&ncp->nc_memt, "necpcimem", 169 RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM); 170 arc_bus_space_init_extent(&ncp->nc_memt, (void *)necpb_mem_ex_storage, 171 sizeof(necpb_mem_ex_storage)); 172 173 arc_bus_space_init(&ncp->nc_iot, "necpciio", 174 RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO); 175 arc_bus_space_init_extent(&ncp->nc_iot, (void *)necpb_io_ex_storage, 176 sizeof(necpb_io_ex_storage)); 177 178 jazz_bus_dma_tag_init(&ncp->nc_dmat); 179 180 pc = &ncp->nc_pc; 181 pc->pc_attach_hook = necpb_attach_hook; 182 pc->pc_bus_maxdevs = necpb_bus_maxdevs; 183 pc->pc_make_tag = necpb_make_tag; 184 pc->pc_decompose_tag = necpb_decompose_tag; 185 pc->pc_conf_read = necpb_conf_read; 186 pc->pc_conf_write = necpb_conf_write; 187 pc->pc_intr_map = necpb_intr_map; 188 pc->pc_intr_string = necpb_intr_string; 189 pc->pc_intr_establish = necpb_intr_establish; 190 pc->pc_intr_disestablish = necpb_intr_disestablish; 191 #ifdef PCI_NETBSD_CONFIGURE 192 pc->pc_conf_interrupt = necpb_conf_interrupt; 193 pc->pc_conf_hook = necpb_conf_hook; 194 #endif 195 196 #ifndef PCI_NETBSD_CONFIGURE 197 /* 198 * XXX: 199 * NEC's firmware does not configure PCI devices completely. 200 * We need to disable expansion ROM and enable mem/io/busmaster 201 * bits here. 202 */ 203 for (dev = 3; dev <= 5; dev++) { 204 tag = necpb_make_tag(pc, 0, dev, 0); 205 id = necpb_conf_read(pc, tag, PCI_ID_REG); 206 207 if (PCI_VENDOR(id) == PCI_VENDOR_INVALID) 208 continue; 209 210 class = necpb_conf_read(pc, tag, PCI_CLASS_REG); 211 csr = necpb_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 212 if (PCI_CLASS(class) != PCI_CLASS_BRIDGE || 213 PCI_SUBCLASS(class) != PCI_SUBCLASS_BRIDGE_PCI) { 214 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE; 215 necpb_conf_write(pc, tag, PCI_MAPREG_ROM, 0); 216 } 217 csr |= PCI_COMMAND_MASTER_ENABLE; 218 necpb_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 219 } 220 #endif 221 222 ncp->nc_initialized = 1; 223 } 224 225 void 226 necpbattach(struct device *parent, struct device *self, void *aux) 227 { 228 struct necpb_softc *sc = (struct necpb_softc *)self; 229 struct pcibus_attach_args pba; 230 pci_chipset_tag_t pc; 231 int i; 232 233 necpbfound = 1; 234 235 printf("\n"); 236 237 sc->sc_ncp = &necpb_main_context; 238 necpb_init(sc->sc_ncp); 239 240 pc = &sc->sc_ncp->nc_pc; 241 #ifdef PCI_NETBSD_CONFIGURE 242 pc->pc_ioext = extent_create("necpbio", 0x00100000, 0x01ffffff, 243 M_DEVBUF, NULL, 0, EX_NOWAIT); 244 pc->pc_memext = extent_create("necpbmem", 0x08000000, 0x3fffffff, 245 M_DEVBUF, NULL, 0, EX_NOWAIT); 246 pci_configure_bus(pc, pc->pc_ioext, pc->pc_memext, NULL, 0, 247 mips_dcache_align); 248 #endif 249 250 out32(RD94_SYS_PCI_INTMASK, 0xf); 251 252 for (i = 0; i < 4; i++) 253 necpb_inttbl[i] = NULL; 254 255 (*platform->set_intr)(MIPS_INT_MASK_2, necpb_intr, ARC_INTPRI_PCIISA); 256 257 pba.pba_iot = &sc->sc_ncp->nc_iot; 258 pba.pba_memt = &sc->sc_ncp->nc_memt; 259 pba.pba_dmat = &sc->sc_ncp->nc_dmat; 260 pba.pba_dmat64 = NULL; 261 pba.pba_pc = pc; 262 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 263 pba.pba_bus = 0; 264 pba.pba_bridgetag = NULL; 265 266 config_found_ia(self, "pcibus", &pba, pcibusprint); 267 } 268 269 void 270 necpb_attach_hook(struct device *parent, struct device *self, 271 struct pcibus_attach_args *pba) 272 { 273 } 274 275 int 276 necpb_bus_maxdevs(pci_chipset_tag_t pc, int busno) 277 { 278 279 return 32; 280 } 281 282 pcitag_t 283 necpb_make_tag(pci_chipset_tag_t pc, int bus, int device, int function) 284 { 285 pcitag_t tag; 286 287 if (bus >= 256 || device >= 32 || function >= 8) 288 panic("necpb_make_tag: bad request"); 289 290 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8); 291 return tag; 292 } 293 294 void 295 necpb_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, 296 int *fp) 297 { 298 299 if (bp != NULL) 300 *bp = (tag >> 16) & 0xff; 301 if (dp != NULL) 302 *dp = (tag >> 11) & 0x1f; 303 if (fp != NULL) 304 *fp = (tag >> 8) & 0x07; 305 } 306 307 pcireg_t 308 necpb_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 309 { 310 pcireg_t data; 311 int s; 312 313 s = splhigh(); 314 out32(RD94_SYS_PCI_CONFADDR, tag | reg); 315 data = in32(RD94_SYS_PCI_CONFDATA); 316 out32(RD94_SYS_PCI_CONFADDR, 0); 317 splx(s); 318 319 return data; 320 } 321 322 void 323 necpb_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 324 { 325 int s; 326 327 s = splhigh(); 328 out32(RD94_SYS_PCI_CONFADDR, tag | reg); 329 out32(RD94_SYS_PCI_CONFDATA, data); 330 out32(RD94_SYS_PCI_CONFADDR, 0); 331 splx(s); 332 } 333 334 int 335 necpb_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 336 { 337 pci_chipset_tag_t pc = pa->pa_pc; 338 pcitag_t intrtag = pa->pa_intrtag; 339 int pin = pa->pa_intrpin; 340 int swiz = pa->pa_intrswiz % 4; 341 int bus, dev; 342 343 if (pin == 0) { 344 /* No IRQ used. */ 345 *ihp = -1; 346 return 1; 347 } 348 349 if (pin > 4) { 350 printf("necpb_intr_map: bad interrupt pin %d\n", pin); 351 *ihp = -1; 352 return 1; 353 } 354 355 necpb_decompose_tag(pc, intrtag, &bus, &dev, NULL); 356 if (bus != 0) { 357 printf("necpb_intr_map: unknown bus %d\n", bus); 358 *ihp = -1; 359 return 1; 360 } 361 362 switch (dev) { 363 case 3: 364 *ihp = (pin - swiz + 2) % 4; 365 break; 366 case 4: 367 *ihp = (pin - swiz + 1) % 4; 368 break; 369 case 5: 370 *ihp = (pin - swiz + 0) % 4; 371 break; 372 default: 373 *ihp = -1; 374 return 1; 375 } 376 377 return 0; 378 } 379 380 const char * 381 necpb_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih) 382 { 383 static char str[8]; 384 385 if (ih >= 4) 386 panic("necpb_intr_string: bogus handle %ld", ih); 387 sprintf(str, "int %c", 'A' + (int)ih); 388 return str; 389 } 390 391 void * 392 necpb_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, 393 int (*func)(void *), void *arg) 394 { 395 struct necpb_intrhand *n, *p; 396 uint32_t mask; 397 398 if (ih >= 4) 399 panic("necpb_intr_establish: bogus handle"); 400 401 n = malloc(sizeof(struct necpb_intrhand), M_DEVBUF, M_NOWAIT); 402 if (n == NULL) 403 panic("necpb_intr_establish: can't malloc interrupt handle"); 404 405 n->ih_func = func; 406 n->ih_arg = arg; 407 n->ih_next = NULL; 408 n->ih_intn = ih; 409 strlcpy(n->ih_evname, necpb_intr_string(pc, ih), sizeof(n->ih_evname)); 410 evcnt_attach_dynamic(&n->ih_evcnt, EVCNT_TYPE_INTR, NULL, "necpb", 411 n->ih_evname); 412 413 if (necpb_inttbl[ih] == NULL) { 414 necpb_inttbl[ih] = n; 415 mask = in32(RD94_SYS_PCI_INTMASK); 416 mask |= 1 << ih; 417 out32(RD94_SYS_PCI_INTMASK, mask); 418 } else { 419 p = necpb_inttbl[ih]; 420 while (p->ih_next != NULL) 421 p = p->ih_next; 422 p->ih_next = n; 423 } 424 425 return n; 426 } 427 428 void 429 necpb_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 430 { 431 struct necpb_intrhand *n, *p, *q; 432 uint32_t mask; 433 434 n = cookie; 435 436 q = NULL; 437 p = necpb_inttbl[n->ih_intn]; 438 while (p != n) { 439 if (p == NULL) 440 panic("necpb_intr_disestablish: broken intr table"); 441 q = p; 442 p = p->ih_next; 443 } 444 445 if (q == NULL) { 446 necpb_inttbl[n->ih_intn] = n->ih_next; 447 if (n->ih_next == NULL) { 448 mask = in32(RD94_SYS_PCI_INTMASK); 449 mask &= ~(1 << n->ih_intn); 450 out32(RD94_SYS_PCI_INTMASK, mask); 451 } 452 } else 453 q->ih_next = n->ih_next; 454 455 evcnt_detach(&n->ih_evcnt); 456 457 free(n, M_DEVBUF); 458 } 459 460 /* 461 * Handle PCI/EISA interrupt. 462 */ 463 uint32_t 464 necpb_intr(uint32_t mask, struct clockframe *cf) 465 { 466 uint32_t vector, stat; 467 struct necpb_intrhand *p; 468 int i, handled; 469 470 handled = 0; 471 vector = in32(RD94_SYS_INTSTAT2) & 0xffff; 472 473 if (vector == 0x4000) { 474 stat = in32(RD94_SYS_PCI_INTSTAT); 475 stat &= in32(RD94_SYS_PCI_INTMASK); 476 for (i = 0; i < 4; i++) { 477 if (stat & (1 << i)) { 478 #if 0 479 printf("pint %d\n", i); 480 #endif 481 p = necpb_inttbl[i]; 482 while (p != NULL) { 483 if ((*p->ih_func)(p->ih_arg)) { 484 p->ih_evcnt.ev_count++; 485 handled |= 1; 486 } 487 p = p->ih_next; 488 } 489 } 490 } 491 } else if (vector == 0x8000) { 492 printf("eisa_nmi\n"); 493 } else { 494 printf("eint %d\n", vector & 0xff); 495 #if 0 496 if (eisa_intr(vector & 0xff)) { 497 handled |= 1; 498 } 499 #endif 500 } 501 502 return handled ? MIPS_INT_MASK_2 : 0; 503 } 504 505 #ifdef PCI_NETBSD_CONFIGURE 506 void 507 necpb_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int func, 508 int swiz, int *iline) 509 { 510 511 return; 512 } 513 514 int 515 necpb_conf_hook(pci_chipset_tag_t pc, int bus, int dev, int func, 516 pcireg_t id) 517 { 518 519 /* ignore bogus IDs */ 520 if (id == 0) 521 return 0; 522 523 /* don't configure bridges */ 524 if (bus == 0 && (dev == 1 || dev == 2)) 525 return 0; 526 527 return PCI_CONF_DEFAULT; 528 } 529 #endif 530
Indexes created Wed Oct 22 13:09:56 GMT 2025