necpb.c revision 1.8.2.1
1 /* $NetBSD: necpb.c,v 1.8.2.1 2001/08/25 06:15:08 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 42 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice, this list of conditions and the following disclaimer. 49 * 2. Redistributions in binary form must reproduce the above copyright 50 * notice, this list of conditions and the following disclaimer in the 51 * documentation and/or other materials provided with the distribution. 52 * 3. All advertising materials mentioning features or use of this software 53 * must display the following acknowledgement: 54 * This product includes software developed by Charles M. Hannum. 55 * 4. The name of the author may not be used to endorse or promote products 56 * derived from this software without specific prior written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 59 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 60 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 61 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 62 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 63 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 64 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 65 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 66 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 67 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 68 */ 69 70 #include <sys/types.h> 71 #include <sys/param.h> 72 #include <sys/time.h> 73 #include <sys/systm.h> 74 #include <sys/errno.h> 75 #include <sys/device.h> 76 #include <sys/malloc.h> 77 #include <sys/extent.h> 78 79 #include <uvm/uvm_extern.h> 80 81 #define _ARC_BUS_DMA_PRIVATE 82 #include <machine/bus.h> 83 84 #include <machine/pio.h> 85 86 #include <machine/autoconf.h> 87 #include <machine/cpu.h> 88 #include <machine/platform.h> 89 90 #include <dev/pci/pcivar.h> 91 #include <dev/pci/pcireg.h> 92 93 #include <arc/jazz/rd94.h> 94 #include <arc/pci/necpbvar.h> 95 96 int necpbmatch __P((struct device *, struct cfdata *, void *)); 97 void necpbattach __P((struct device *, struct device *, void *)); 98 99 static int necpbprint __P((void *, const char *)); 100 101 void necpb_attach_hook __P((struct device *, struct device *, 102 struct pcibus_attach_args *)); 103 int necpb_bus_maxdevs __P((pci_chipset_tag_t, int)); 104 pcitag_t necpb_make_tag __P((pci_chipset_tag_t, int, int, int)); 105 void necpb_decompose_tag __P((pci_chipset_tag_t, pcitag_t, int *, 106 int *, int *)); 107 pcireg_t necpb_conf_read __P((pci_chipset_tag_t, pcitag_t, int)); 108 void necpb_conf_write __P((pci_chipset_tag_t, pcitag_t, int, 109 pcireg_t)); 110 int necpb_intr_map __P((struct pci_attach_args *, 111 pci_intr_handle_t *)); 112 const char * necpb_intr_string __P((pci_chipset_tag_t, pci_intr_handle_t)); 113 void * necpb_intr_establish __P((pci_chipset_tag_t, pci_intr_handle_t, 114 int, int (*func)(void *), void *)); 115 void necpb_intr_disestablish __P((pci_chipset_tag_t, void *)); 116 117 int necpb_intr(unsigned, struct clockframe *); 118 119 120 struct cfattach necpb_ca = { 121 sizeof(struct necpb_softc), necpbmatch, necpbattach, 122 }; 123 124 extern struct cfdriver necpb_cd; 125 126 static struct necpb_intrhand *necpb_inttbl[4]; 127 128 /* There can be only one. */ 129 int necpbfound; 130 struct necpb_context necpb_main_context; 131 static long necpb_mem_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)]; 132 static long necpb_io_ex_storage[EXTENT_FIXED_STORAGE_SIZE(10) / sizeof(long)]; 133 134 int 135 necpbmatch(parent, match, aux) 136 struct device *parent; 137 struct cfdata *match; 138 void *aux; 139 { 140 struct confargs *ca = aux; 141 142 if (strcmp(ca->ca_name, necpb_cd.cd_name) != 0) 143 return (0); 144 145 if (necpbfound) 146 return (0); 147 148 return (1); 149 } 150 151 /* 152 * Set up the chipset's function pointers. 153 */ 154 void 155 necpb_init(ncp) 156 struct necpb_context *ncp; 157 { 158 pcitag_t tag; 159 pcireg_t csr; 160 161 if (ncp->nc_initialized) 162 return; 163 164 arc_large_bus_space_init(&ncp->nc_memt, "necpcimem", 165 RD94_P_PCI_MEM, 0, RD94_S_PCI_MEM); 166 arc_bus_space_init_extent(&ncp->nc_memt, (caddr_t)necpb_mem_ex_storage, 167 sizeof(necpb_mem_ex_storage)); 168 169 arc_bus_space_init(&ncp->nc_iot, "necpciio", 170 RD94_P_PCI_IO, RD94_V_PCI_IO, 0, RD94_S_PCI_IO); 171 arc_bus_space_init_extent(&ncp->nc_iot, (caddr_t)necpb_io_ex_storage, 172 sizeof(necpb_io_ex_storage)); 173 174 jazz_bus_dma_tag_init(&ncp->nc_dmat); 175 176 ncp->nc_pc.pc_attach_hook = necpb_attach_hook; 177 ncp->nc_pc.pc_bus_maxdevs = necpb_bus_maxdevs; 178 ncp->nc_pc.pc_make_tag = necpb_make_tag; 179 ncp->nc_pc.pc_conf_read = necpb_conf_read; 180 ncp->nc_pc.pc_conf_write = necpb_conf_write; 181 ncp->nc_pc.pc_intr_map = necpb_intr_map; 182 ncp->nc_pc.pc_intr_string = necpb_intr_string; 183 ncp->nc_pc.pc_intr_establish = necpb_intr_establish; 184 ncp->nc_pc.pc_intr_disestablish = necpb_intr_disestablish; 185 186 /* 187 * XXX: 188 * NEC's firmware does not configure PCI devices completely. 189 * We need to disable expansion ROM and enable mem/io/busmaster 190 * bits here. 191 */ 192 tag = necpb_make_tag(&ncp->nc_pc, 0, 3, 0); 193 csr = necpb_conf_read(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG); 194 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 195 PCI_COMMAND_MASTER_ENABLE; 196 necpb_conf_write(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG, csr); 197 necpb_conf_write(&ncp->nc_pc, tag, PCI_MAPREG_ROM, 0); 198 199 tag = necpb_make_tag(&ncp->nc_pc, 0, 4, 0); 200 csr = necpb_conf_read(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG); 201 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 202 PCI_COMMAND_MASTER_ENABLE; 203 necpb_conf_write(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG, csr); 204 necpb_conf_write(&ncp->nc_pc, tag, PCI_MAPREG_ROM, 0); 205 206 tag = necpb_make_tag(&ncp->nc_pc, 0, 5, 0); 207 csr = necpb_conf_read(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG); 208 csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 209 PCI_COMMAND_MASTER_ENABLE; 210 necpb_conf_write(&ncp->nc_pc, tag, PCI_COMMAND_STATUS_REG, csr); 211 necpb_conf_write(&ncp->nc_pc, tag, PCI_MAPREG_ROM, 0); 212 213 ncp->nc_initialized = 1; 214 } 215 216 void 217 necpbattach(parent, self, aux) 218 struct device *parent, *self; 219 void *aux; 220 { 221 struct necpb_softc *sc = (struct necpb_softc *)self; 222 struct pcibus_attach_args pba; 223 int i; 224 225 necpbfound = 1; 226 227 printf("\n"); 228 229 sc->sc_ncp = &necpb_main_context; 230 necpb_init(sc->sc_ncp); 231 232 out32(RD94_SYS_PCI_INTMASK, 0xf); 233 234 for (i = 0; i < 4; i++) 235 necpb_inttbl[i] = NULL; 236 237 (*platform->set_intr)(MIPS_INT_MASK_2, necpb_intr, 3); 238 239 pba.pba_busname = "pci"; 240 pba.pba_iot = &sc->sc_ncp->nc_iot; 241 pba.pba_memt = &sc->sc_ncp->nc_memt; 242 pba.pba_dmat = &sc->sc_ncp->nc_dmat; 243 pba.pba_pc = &sc->sc_ncp->nc_pc; 244 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 245 pba.pba_bus = 0; 246 247 config_found(self, &pba, necpbprint); 248 } 249 250 static int 251 necpbprint(aux, pnp) 252 void *aux; 253 const char *pnp; 254 { 255 struct pcibus_attach_args *pba = aux; 256 257 if (pnp) 258 printf("%s at %s", pba->pba_busname, pnp); 259 printf(" bus %d", pba->pba_bus); 260 return (UNCONF); 261 } 262 263 void 264 necpb_attach_hook(parent, self, pba) 265 struct device *parent, *self; 266 struct pcibus_attach_args *pba; 267 { 268 } 269 270 int 271 necpb_bus_maxdevs(pc, busno) 272 pci_chipset_tag_t pc; 273 int busno; 274 { 275 return (32); 276 } 277 278 pcitag_t 279 necpb_make_tag(pc, bus, device, function) 280 pci_chipset_tag_t pc; 281 int bus, device, function; 282 { 283 pcitag_t tag; 284 285 if (bus >= 256 || device >= 32 || function >= 8) 286 panic("necpb_make_tag: bad request"); 287 288 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8); 289 return (tag); 290 } 291 292 void 293 necpb_decompose_tag(pc, tag, bp, dp, fp) 294 pci_chipset_tag_t pc; 295 pcitag_t tag; 296 int *bp, *dp, *fp; 297 { 298 if (bp != NULL) 299 *bp = (tag >> 16) & 0xff; 300 if (dp != NULL) 301 *dp = (tag >> 11) & 0x1f; 302 if (fp != NULL) 303 *fp = (tag >> 8) & 0x07; 304 } 305 306 pcireg_t 307 necpb_conf_read(pc, tag, reg) 308 pci_chipset_tag_t pc; 309 pcitag_t tag; 310 int reg; 311 { 312 pcireg_t data; 313 int s; 314 315 s = splhigh(); 316 out32(RD94_SYS_PCI_CONFADDR, tag | reg); 317 data = in32(RD94_SYS_PCI_CONFDATA); 318 out32(RD94_SYS_PCI_CONFADDR, 0); 319 splx(s); 320 321 return (data); 322 } 323 324 void 325 necpb_conf_write(pc, tag, reg, data) 326 pci_chipset_tag_t pc; 327 pcitag_t tag; 328 int reg; 329 pcireg_t data; 330 { 331 int s; 332 333 s = splhigh(); 334 out32(RD94_SYS_PCI_CONFADDR, tag | reg); 335 out32(RD94_SYS_PCI_CONFDATA, data); 336 out32(RD94_SYS_PCI_CONFADDR, 0); 337 splx(s); 338 } 339 340 int 341 necpb_intr_map(pa, ihp) 342 struct pci_attach_args *pa; 343 pci_intr_handle_t *ihp; 344 { 345 pci_chipset_tag_t pc = pa->pa_pc; 346 pcitag_t intrtag = pa->pa_intrtag; 347 int pin = pa->pa_intrpin; 348 int bus, dev; 349 350 if (pin == 0) { 351 /* No IRQ used. */ 352 *ihp = -1; 353 return (1); 354 } 355 356 if (pin > 4) { 357 printf("necpb_intr_map: bad interrupt pin %d\n", pin); 358 *ihp = -1; 359 return (1); 360 } 361 362 necpb_decompose_tag(pc, intrtag, &bus, &dev, NULL); 363 if (bus != 0) { 364 *ihp = -1; 365 return (1); 366 } 367 368 switch (dev) { 369 case 3: 370 *ihp = (pin+2) % 4; 371 break; 372 case 4: 373 *ihp = (pin+1) % 4; 374 break; 375 case 5: 376 *ihp = (pin) % 4; 377 break; 378 default: 379 *ihp = -1; 380 return (1); 381 } 382 383 return (0); 384 } 385 386 const char * 387 necpb_intr_string(pc, ih) 388 pci_chipset_tag_t pc; 389 pci_intr_handle_t ih; 390 { 391 static char str[8]; 392 393 if (ih >= 4) 394 panic("necpb_intr_string: bogus handle %ld", ih); 395 sprintf(str, "int %c", 'A' + (int)ih); 396 return (str); 397 } 398 399 void * 400 necpb_intr_establish(pc, ih, level, func, arg) 401 pci_chipset_tag_t pc; 402 pci_intr_handle_t ih; 403 int level, (*func) __P((void *)); 404 void *arg; 405 { 406 struct necpb_intrhand *n, *p; 407 u_int32_t mask; 408 409 if (ih >= 4) 410 panic("necpb_intr_establish: bogus handle"); 411 412 n = malloc(sizeof(struct necpb_intrhand), M_DEVBUF, M_NOWAIT); 413 if (n == NULL) 414 panic("necpb_intr_establish: can't malloc interrupt handle"); 415 416 n->ih_func = func; 417 n->ih_arg = arg; 418 n->ih_next = NULL; 419 n->ih_intn = ih; 420 421 if (necpb_inttbl[ih] == NULL) { 422 necpb_inttbl[ih] = n; 423 mask = in32(RD94_SYS_PCI_INTMASK); 424 mask |= 1 << ih; 425 out32(RD94_SYS_PCI_INTMASK, mask); 426 } else { 427 p = necpb_inttbl[ih]; 428 while (p->ih_next != NULL) 429 p = p->ih_next; 430 p->ih_next = n; 431 } 432 433 return n; 434 } 435 436 void 437 necpb_intr_disestablish(pc, cookie) 438 pci_chipset_tag_t pc; 439 void *cookie; 440 { 441 struct necpb_intrhand *n, *p, *q; 442 u_int32_t mask; 443 444 n = cookie; 445 446 q = NULL; 447 p = necpb_inttbl[n->ih_intn]; 448 while (p != n) { 449 if (p == NULL) 450 panic("necpb_intr_disestablish: broken intr table"); 451 q = p; 452 p = p->ih_next; 453 } 454 455 if (q == NULL) { 456 necpb_inttbl[n->ih_intn] = n->ih_next; 457 if (n->ih_next == NULL) { 458 mask = in32(RD94_SYS_PCI_INTMASK); 459 mask &= ~(1 << n->ih_intn); 460 out32(RD94_SYS_PCI_INTMASK, mask); 461 } 462 } else 463 q->ih_next = n->ih_next; 464 465 free(n, M_DEVBUF); 466 } 467 468 /* 469 * Handle PCI/EISA interrupt. 470 */ 471 int 472 necpb_intr(mask, cf) 473 unsigned mask; 474 struct clockframe *cf; 475 { 476 u_int32_t vector, stat; 477 struct necpb_intrhand *p; 478 int a; 479 480 vector = in32(RD94_SYS_INTSTAT2) & 0xffff; 481 482 if (vector == 0x4000) { 483 stat = in32(RD94_SYS_PCI_INTSTAT); 484 stat &= in32(RD94_SYS_PCI_INTMASK); 485 for (a=0; a<4; a++) { 486 if (stat & (1 << a)) { 487 #if 0 488 printf("pint %d\n", a); 489 #endif 490 p = necpb_inttbl[a]; 491 while (p != NULL) { 492 (*p->ih_func)(p->ih_arg); 493 p = p->ih_next; 494 } 495 } 496 } 497 } else if (vector == 0x8000) { 498 printf("eisa_nmi\n"); 499 } else { 500 printf("eint %d\n", vector & 0xff); 501 #if 0 502 eisa_intr(vector & 0xff); 503 #endif 504 } 505 506 return (~0); 507 } 508
Indexes created Wed Oct 22 13:09:56 GMT 2025