acpi_platform.c revision 1.12 1 1.12 ryo /* $NetBSD: acpi_platform.c,v 1.12 2019/05/23 15:54:28 ryo Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Jared McNeill <jmcneill (at) invisible.ca>.
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.4 jmcneill #include "com.h"
33 1.4 jmcneill #include "plcom.h"
34 1.5 jmcneill #include "opt_efi.h"
35 1.12 ryo #include "opt_multiprocessor.h"
36 1.4 jmcneill
37 1.1 jmcneill #include <sys/cdefs.h>
38 1.12 ryo __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.12 2019/05/23 15:54:28 ryo Exp $");
39 1.1 jmcneill
40 1.1 jmcneill #include <sys/param.h>
41 1.1 jmcneill #include <sys/bus.h>
42 1.1 jmcneill #include <sys/cpu.h>
43 1.1 jmcneill #include <sys/device.h>
44 1.1 jmcneill #include <sys/termios.h>
45 1.1 jmcneill
46 1.1 jmcneill #include <dev/fdt/fdtvar.h>
47 1.1 jmcneill #include <arm/fdt/arm_fdtvar.h>
48 1.1 jmcneill
49 1.1 jmcneill #include <uvm/uvm_extern.h>
50 1.1 jmcneill
51 1.1 jmcneill #include <machine/bootconfig.h>
52 1.1 jmcneill #include <arm/cpufunc.h>
53 1.1 jmcneill #include <arm/locore.h>
54 1.1 jmcneill
55 1.1 jmcneill #include <arm/cortex/gtmr_var.h>
56 1.1 jmcneill
57 1.1 jmcneill #include <arm/arm/psci.h>
58 1.1 jmcneill #include <arm/fdt/psci_fdtvar.h>
59 1.1 jmcneill
60 1.1 jmcneill #include <evbarm/fdt/platform.h>
61 1.1 jmcneill
62 1.1 jmcneill #include <evbarm/dev/plcomreg.h>
63 1.1 jmcneill #include <evbarm/dev/plcomvar.h>
64 1.1 jmcneill #include <dev/ic/ns16550reg.h>
65 1.1 jmcneill #include <dev/ic/comreg.h>
66 1.4 jmcneill #include <dev/ic/comvar.h>
67 1.1 jmcneill
68 1.10 jmcneill #if NCOM > 0
69 1.10 jmcneill #include <dev/pci/pcireg.h>
70 1.10 jmcneill #include <dev/pci/pcivar.h>
71 1.10 jmcneill #include <dev/pci/pucvar.h>
72 1.10 jmcneill #endif
73 1.10 jmcneill
74 1.5 jmcneill #ifdef EFI_RUNTIME
75 1.5 jmcneill #include <arm/arm/efi_runtime.h>
76 1.5 jmcneill #endif
77 1.5 jmcneill
78 1.1 jmcneill #include <dev/acpi/acpireg.h>
79 1.1 jmcneill #include <dev/acpi/acpivar.h>
80 1.5 jmcneill #include <arm/acpi/acpi_table.h>
81 1.5 jmcneill
82 1.5 jmcneill #include <libfdt.h>
83 1.1 jmcneill
84 1.3 jmcneill #define SPCR_BAUD_UNKNOWN 0
85 1.3 jmcneill #define SPCR_BAUD_9600 3
86 1.3 jmcneill #define SPCR_BAUD_19200 4
87 1.3 jmcneill #define SPCR_BAUD_57600 6
88 1.3 jmcneill #define SPCR_BAUD_115200 7
89 1.1 jmcneill
90 1.1 jmcneill extern struct bus_space arm_generic_bs_tag;
91 1.4 jmcneill extern struct bus_space arm_generic_a4x_bs_tag;
92 1.1 jmcneill
93 1.7 rjs #if NPLCOM > 0
94 1.1 jmcneill static struct plcom_instance plcom_console;
95 1.7 rjs #endif
96 1.1 jmcneill
97 1.1 jmcneill static const struct pmap_devmap *
98 1.1 jmcneill acpi_platform_devmap(void)
99 1.1 jmcneill {
100 1.1 jmcneill static const struct pmap_devmap devmap[] = {
101 1.1 jmcneill DEVMAP_ENTRY_END
102 1.1 jmcneill };
103 1.1 jmcneill
104 1.1 jmcneill return devmap;
105 1.1 jmcneill }
106 1.1 jmcneill
107 1.1 jmcneill static void
108 1.1 jmcneill acpi_platform_bootstrap(void)
109 1.1 jmcneill {
110 1.1 jmcneill }
111 1.1 jmcneill
112 1.1 jmcneill static void
113 1.1 jmcneill acpi_platform_startup(void)
114 1.1 jmcneill {
115 1.1 jmcneill ACPI_TABLE_SPCR *spcr;
116 1.1 jmcneill ACPI_TABLE_FADT *fadt;
117 1.12 ryo #ifdef MULTIPROCESSOR
118 1.1 jmcneill ACPI_TABLE_MADT *madt;
119 1.12 ryo #endif
120 1.3 jmcneill int baud_rate;
121 1.1 jmcneill
122 1.1 jmcneill /*
123 1.1 jmcneill * Setup serial console device
124 1.1 jmcneill */
125 1.1 jmcneill if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) {
126 1.4 jmcneill
127 1.4 jmcneill switch (spcr->BaudRate) {
128 1.4 jmcneill case SPCR_BAUD_9600:
129 1.4 jmcneill baud_rate = 9600;
130 1.4 jmcneill break;
131 1.4 jmcneill case SPCR_BAUD_19200:
132 1.4 jmcneill baud_rate = 19200;
133 1.4 jmcneill break;
134 1.4 jmcneill case SPCR_BAUD_57600:
135 1.4 jmcneill baud_rate = 57600;
136 1.4 jmcneill break;
137 1.4 jmcneill case SPCR_BAUD_115200:
138 1.4 jmcneill case SPCR_BAUD_UNKNOWN:
139 1.4 jmcneill default:
140 1.4 jmcneill baud_rate = 115200;
141 1.4 jmcneill break;
142 1.4 jmcneill }
143 1.4 jmcneill
144 1.3 jmcneill if (spcr->SerialPort.SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY &&
145 1.1 jmcneill spcr->SerialPort.Address != 0) {
146 1.3 jmcneill switch (spcr->InterfaceType) {
147 1.4 jmcneill #if NPLCOM > 0
148 1.9 jmcneill case ACPI_DBG2_ARM_PL011:
149 1.9 jmcneill case ACPI_DBG2_ARM_SBSA_32BIT:
150 1.9 jmcneill case ACPI_DBG2_ARM_SBSA_GENERIC:
151 1.3 jmcneill plcom_console.pi_type = PLCOM_TYPE_PL011;
152 1.3 jmcneill plcom_console.pi_iot = &arm_generic_bs_tag;
153 1.3 jmcneill plcom_console.pi_iobase = spcr->SerialPort.Address;
154 1.3 jmcneill plcom_console.pi_size = PL011COM_UART_SIZE;
155 1.9 jmcneill if (spcr->InterfaceType == ACPI_DBG2_ARM_SBSA_32BIT) {
156 1.3 jmcneill plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS;
157 1.3 jmcneill } else {
158 1.3 jmcneill plcom_console.pi_flags = ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8 ?
159 1.3 jmcneill 0 : PLC_FLAG_32BIT_ACCESS;
160 1.3 jmcneill }
161 1.1 jmcneill
162 1.3 jmcneill plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1);
163 1.3 jmcneill break;
164 1.4 jmcneill #endif
165 1.4 jmcneill #if NCOM > 0
166 1.9 jmcneill case ACPI_DBG2_16550_COMPATIBLE:
167 1.9 jmcneill case ACPI_DBG2_16550_SUBSET:
168 1.8 jmcneill if (ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8) {
169 1.8 jmcneill comcnattach(&arm_generic_bs_tag, spcr->SerialPort.Address, baud_rate, -1,
170 1.8 jmcneill COM_TYPE_NORMAL, TTYDEF_CFLAG);
171 1.8 jmcneill } else {
172 1.8 jmcneill comcnattach(&arm_generic_a4x_bs_tag, spcr->SerialPort.Address, baud_rate, -1,
173 1.8 jmcneill COM_TYPE_NORMAL, TTYDEF_CFLAG);
174 1.8 jmcneill }
175 1.8 jmcneill break;
176 1.9 jmcneill case ACPI_DBG2_BCM2835:
177 1.4 jmcneill comcnattach(&arm_generic_a4x_bs_tag, spcr->SerialPort.Address + 0x40, baud_rate, -1,
178 1.4 jmcneill COM_TYPE_BCMAUXUART, TTYDEF_CFLAG);
179 1.4 jmcneill cn_set_magic("+++++");
180 1.4 jmcneill break;
181 1.4 jmcneill #endif
182 1.4 jmcneill default:
183 1.4 jmcneill printf("SPCR: kernel does not support interface type %#x\n", spcr->InterfaceType);
184 1.4 jmcneill break;
185 1.3 jmcneill }
186 1.1 jmcneill }
187 1.1 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
188 1.1 jmcneill }
189 1.1 jmcneill
190 1.1 jmcneill /*
191 1.1 jmcneill * Initialize PSCI 0.2+ if implemented
192 1.1 jmcneill */
193 1.1 jmcneill if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) {
194 1.1 jmcneill if (fadt->ArmBootFlags & ACPI_FADT_PSCI_COMPLIANT) {
195 1.1 jmcneill if (fadt->ArmBootFlags & ACPI_FADT_PSCI_USE_HVC) {
196 1.1 jmcneill psci_init(psci_call_hvc);
197 1.1 jmcneill } else {
198 1.1 jmcneill psci_init(psci_call_smc);
199 1.1 jmcneill }
200 1.1 jmcneill }
201 1.1 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)fadt);
202 1.1 jmcneill }
203 1.1 jmcneill
204 1.12 ryo #ifdef MULTIPROCESSOR
205 1.1 jmcneill /*
206 1.1 jmcneill * Count CPUs
207 1.1 jmcneill */
208 1.1 jmcneill if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) {
209 1.1 jmcneill char *end = (char *)madt + madt->Header.Length;
210 1.1 jmcneill char *where = (char *)madt + sizeof(ACPI_TABLE_MADT);
211 1.1 jmcneill while (where < end) {
212 1.1 jmcneill ACPI_SUBTABLE_HEADER *subtable = (ACPI_SUBTABLE_HEADER *)where;
213 1.1 jmcneill if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT)
214 1.1 jmcneill arm_cpu_max++;
215 1.1 jmcneill where += subtable->Length;
216 1.1 jmcneill }
217 1.1 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)madt);
218 1.1 jmcneill }
219 1.12 ryo #endif /* MULTIPROCESSOR */
220 1.1 jmcneill }
221 1.1 jmcneill
222 1.1 jmcneill static void
223 1.1 jmcneill acpi_platform_init_attach_args(struct fdt_attach_args *faa)
224 1.1 jmcneill {
225 1.1 jmcneill extern struct arm32_bus_dma_tag arm_generic_dma_tag;
226 1.1 jmcneill extern struct bus_space arm_generic_bs_tag;
227 1.1 jmcneill extern struct bus_space arm_generic_a4x_bs_tag;
228 1.1 jmcneill
229 1.1 jmcneill faa->faa_bst = &arm_generic_bs_tag;
230 1.1 jmcneill faa->faa_a4x_bst = &arm_generic_a4x_bs_tag;
231 1.1 jmcneill faa->faa_dmat = &arm_generic_dma_tag;
232 1.1 jmcneill }
233 1.1 jmcneill
234 1.1 jmcneill static void
235 1.1 jmcneill acpi_platform_device_register(device_t self, void *aux)
236 1.1 jmcneill {
237 1.10 jmcneill #if NCOM > 0
238 1.10 jmcneill prop_dictionary_t prop = device_properties(self);
239 1.10 jmcneill
240 1.11 jmcneill if (device_is_a(self, "com")) {
241 1.10 jmcneill ACPI_TABLE_SPCR *spcr;
242 1.10 jmcneill
243 1.10 jmcneill if (ACPI_FAILURE(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr)))
244 1.10 jmcneill return;
245 1.11 jmcneill
246 1.10 jmcneill if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY)
247 1.10 jmcneill goto spcr_unmap;
248 1.10 jmcneill if (spcr->SerialPort.Address == 0)
249 1.10 jmcneill goto spcr_unmap;
250 1.10 jmcneill if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE &&
251 1.10 jmcneill spcr->InterfaceType != ACPI_DBG2_16550_SUBSET)
252 1.10 jmcneill goto spcr_unmap;
253 1.10 jmcneill
254 1.11 jmcneill if (device_is_a(device_parent(self), "puc")) {
255 1.11 jmcneill const struct puc_attach_args * const paa = aux;
256 1.11 jmcneill int b, d, f;
257 1.11 jmcneill
258 1.11 jmcneill const int s = pci_get_segment(paa->pc);
259 1.11 jmcneill pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f);
260 1.11 jmcneill
261 1.11 jmcneill if (spcr->PciSegment == s && spcr->PciBus == b &&
262 1.11 jmcneill spcr->PciDevice == d && spcr->PciFunction == f)
263 1.11 jmcneill prop_dictionary_set_bool(prop, "force_console", true);
264 1.11 jmcneill }
265 1.11 jmcneill
266 1.11 jmcneill if (device_is_a(device_parent(self), "acpi")) {
267 1.11 jmcneill struct acpi_attach_args * const aa = aux;
268 1.11 jmcneill struct acpi_resources res;
269 1.11 jmcneill struct acpi_mem *mem;
270 1.11 jmcneill
271 1.11 jmcneill if (ACPI_FAILURE(acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS",
272 1.11 jmcneill &res, &acpi_resource_parse_ops_quiet)))
273 1.11 jmcneill goto spcr_unmap;
274 1.11 jmcneill
275 1.11 jmcneill mem = acpi_res_mem(&res, 0);
276 1.11 jmcneill if (mem == NULL)
277 1.11 jmcneill goto crs_cleanup;
278 1.11 jmcneill
279 1.11 jmcneill if (mem->ar_base == spcr->SerialPort.Address)
280 1.11 jmcneill prop_dictionary_set_bool(prop, "force_console", true);
281 1.11 jmcneill
282 1.11 jmcneill crs_cleanup:
283 1.11 jmcneill acpi_resource_cleanup(&res);
284 1.11 jmcneill }
285 1.10 jmcneill
286 1.10 jmcneill spcr_unmap:
287 1.10 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
288 1.10 jmcneill }
289 1.10 jmcneill #endif
290 1.1 jmcneill }
291 1.1 jmcneill
292 1.2 jmcneill static void
293 1.2 jmcneill acpi_platform_reset(void)
294 1.2 jmcneill {
295 1.5 jmcneill #ifdef EFI_RUNTIME
296 1.5 jmcneill if (arm_efirt_reset(EFI_RESET_COLD) == 0)
297 1.5 jmcneill return;
298 1.5 jmcneill #endif
299 1.2 jmcneill if (psci_available())
300 1.2 jmcneill psci_system_reset();
301 1.2 jmcneill }
302 1.2 jmcneill
303 1.1 jmcneill static u_int
304 1.1 jmcneill acpi_platform_uart_freq(void)
305 1.1 jmcneill {
306 1.1 jmcneill return 0;
307 1.1 jmcneill }
308 1.1 jmcneill
309 1.1 jmcneill static const struct arm_platform acpi_platform = {
310 1.1 jmcneill .ap_devmap = acpi_platform_devmap,
311 1.1 jmcneill .ap_bootstrap = acpi_platform_bootstrap,
312 1.1 jmcneill .ap_startup = acpi_platform_startup,
313 1.1 jmcneill .ap_init_attach_args = acpi_platform_init_attach_args,
314 1.1 jmcneill .ap_device_register = acpi_platform_device_register,
315 1.2 jmcneill .ap_reset = acpi_platform_reset,
316 1.1 jmcneill .ap_delay = gtmr_delay,
317 1.1 jmcneill .ap_uart_freq = acpi_platform_uart_freq,
318 1.1 jmcneill };
319 1.1 jmcneill
320 1.1 jmcneill ARM_PLATFORM(virt, "netbsd,generic-acpi", &acpi_platform);
321