acpi_platform.c revision 1.33 1 1.33 skrll /* $NetBSD: acpi_platform.c,v 1.33 2022/09/06 11:55:51 skrll Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Jared McNeill <jmcneill (at) invisible.ca>.
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.4 jmcneill #include "com.h"
33 1.4 jmcneill #include "plcom.h"
34 1.5 jmcneill #include "opt_efi.h"
35 1.12 ryo #include "opt_multiprocessor.h"
36 1.4 jmcneill
37 1.1 jmcneill #include <sys/cdefs.h>
38 1.33 skrll __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.33 2022/09/06 11:55:51 skrll Exp $");
39 1.1 jmcneill
40 1.1 jmcneill #include <sys/param.h>
41 1.1 jmcneill #include <sys/bus.h>
42 1.1 jmcneill #include <sys/cpu.h>
43 1.1 jmcneill #include <sys/device.h>
44 1.1 jmcneill #include <sys/termios.h>
45 1.24 jmcneill #include <sys/kprintf.h>
46 1.1 jmcneill
47 1.1 jmcneill #include <dev/fdt/fdtvar.h>
48 1.1 jmcneill #include <arm/fdt/arm_fdtvar.h>
49 1.1 jmcneill
50 1.1 jmcneill #include <uvm/uvm_extern.h>
51 1.1 jmcneill
52 1.1 jmcneill #include <machine/bootconfig.h>
53 1.1 jmcneill #include <arm/cpufunc.h>
54 1.1 jmcneill #include <arm/locore.h>
55 1.1 jmcneill
56 1.1 jmcneill #include <arm/cortex/gtmr_var.h>
57 1.1 jmcneill
58 1.27 jmcneill #include <arm/arm/smccc.h>
59 1.1 jmcneill #include <arm/arm/psci.h>
60 1.1 jmcneill #include <arm/fdt/psci_fdtvar.h>
61 1.1 jmcneill
62 1.1 jmcneill #include <evbarm/fdt/platform.h>
63 1.1 jmcneill
64 1.1 jmcneill #include <evbarm/dev/plcomreg.h>
65 1.1 jmcneill #include <evbarm/dev/plcomvar.h>
66 1.1 jmcneill #include <dev/ic/ns16550reg.h>
67 1.1 jmcneill #include <dev/ic/comreg.h>
68 1.4 jmcneill #include <dev/ic/comvar.h>
69 1.1 jmcneill
70 1.10 jmcneill #if NCOM > 0
71 1.10 jmcneill #include <dev/pci/pcireg.h>
72 1.10 jmcneill #include <dev/pci/pcivar.h>
73 1.10 jmcneill #include <dev/pci/pucvar.h>
74 1.10 jmcneill #endif
75 1.10 jmcneill
76 1.5 jmcneill #ifdef EFI_RUNTIME
77 1.5 jmcneill #include <arm/arm/efi_runtime.h>
78 1.5 jmcneill #endif
79 1.5 jmcneill
80 1.1 jmcneill #include <dev/acpi/acpireg.h>
81 1.1 jmcneill #include <dev/acpi/acpivar.h>
82 1.5 jmcneill #include <arm/acpi/acpi_table.h>
83 1.5 jmcneill
84 1.5 jmcneill #include <libfdt.h>
85 1.1 jmcneill
86 1.22 jmcneill #define SPCR_BAUD_DEFAULT 0
87 1.3 jmcneill #define SPCR_BAUD_9600 3
88 1.3 jmcneill #define SPCR_BAUD_19200 4
89 1.3 jmcneill #define SPCR_BAUD_57600 6
90 1.3 jmcneill #define SPCR_BAUD_115200 7
91 1.1 jmcneill
92 1.22 jmcneill static const struct acpi_spcr_baud_rate {
93 1.22 jmcneill uint8_t id;
94 1.30 jmcneill int baud_rate;
95 1.22 jmcneill } acpi_spcr_baud_rates[] = {
96 1.32 jmcneill /*
97 1.32 jmcneill * SPCR_BAUD_DEFAULT means:
98 1.32 jmcneill * "As is, operating system relies on the current configuration
99 1.32 jmcneill * of serial port until the full featured driver will be
100 1.32 jmcneill * initialized."
101 1.32 jmcneill *
102 1.32 jmcneill * We don't currently have a good way of telling the UART driver
103 1.32 jmcneill * to detect the currently configured baud rate, so just pick
104 1.32 jmcneill * something sensible here.
105 1.32 jmcneill *
106 1.32 jmcneill * In the past we have tried baud_rate values of 0 and -1, but
107 1.32 jmcneill * these cause problems with the com(4) driver.
108 1.32 jmcneill */
109 1.32 jmcneill { SPCR_BAUD_DEFAULT, 115200 },
110 1.22 jmcneill { SPCR_BAUD_9600, 9600 },
111 1.22 jmcneill { SPCR_BAUD_19200, 19200 },
112 1.22 jmcneill { SPCR_BAUD_57600, 57600 },
113 1.22 jmcneill { SPCR_BAUD_115200, 115200 },
114 1.22 jmcneill };
115 1.22 jmcneill
116 1.1 jmcneill extern struct bus_space arm_generic_bs_tag;
117 1.1 jmcneill
118 1.7 rjs #if NPLCOM > 0
119 1.1 jmcneill static struct plcom_instance plcom_console;
120 1.7 rjs #endif
121 1.1 jmcneill
122 1.14 jmcneill struct arm32_bus_dma_tag acpi_coherent_dma_tag;
123 1.14 jmcneill static struct arm32_dma_range acpi_coherent_ranges[] = {
124 1.13 jmcneill [0] = {
125 1.13 jmcneill .dr_sysbase = 0,
126 1.13 jmcneill .dr_busbase = 0,
127 1.13 jmcneill .dr_len = UINTPTR_MAX,
128 1.13 jmcneill .dr_flags = _BUS_DMAMAP_COHERENT,
129 1.13 jmcneill }
130 1.13 jmcneill };
131 1.13 jmcneill
132 1.1 jmcneill static const struct pmap_devmap *
133 1.1 jmcneill acpi_platform_devmap(void)
134 1.1 jmcneill {
135 1.1 jmcneill static const struct pmap_devmap devmap[] = {
136 1.1 jmcneill DEVMAP_ENTRY_END
137 1.1 jmcneill };
138 1.1 jmcneill
139 1.1 jmcneill return devmap;
140 1.1 jmcneill }
141 1.1 jmcneill
142 1.1 jmcneill static void
143 1.1 jmcneill acpi_platform_bootstrap(void)
144 1.1 jmcneill {
145 1.13 jmcneill extern struct arm32_bus_dma_tag arm_generic_dma_tag;
146 1.13 jmcneill
147 1.14 jmcneill acpi_coherent_dma_tag = arm_generic_dma_tag;
148 1.14 jmcneill acpi_coherent_dma_tag._ranges = acpi_coherent_ranges;
149 1.14 jmcneill acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges);
150 1.1 jmcneill }
151 1.1 jmcneill
152 1.1 jmcneill static void
153 1.22 jmcneill acpi_platform_attach_uart(ACPI_TABLE_SPCR *spcr)
154 1.1 jmcneill {
155 1.22 jmcneill #if NCOM > 0
156 1.22 jmcneill struct com_regs regs;
157 1.22 jmcneill bus_space_handle_t dummy_bsh;
158 1.22 jmcneill u_int reg_shift;
159 1.12 ryo #endif
160 1.22 jmcneill int baud_rate, n;
161 1.1 jmcneill
162 1.1 jmcneill /*
163 1.22 jmcneill * Only MMIO access is supported today.
164 1.1 jmcneill */
165 1.22 jmcneill if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
166 1.22 jmcneill return;
167 1.22 jmcneill }
168 1.22 jmcneill if (le64toh(spcr->SerialPort.Address) == 0) {
169 1.22 jmcneill return;
170 1.22 jmcneill }
171 1.4 jmcneill
172 1.22 jmcneill /*
173 1.22 jmcneill * Lookup SPCR baud rate.
174 1.22 jmcneill */
175 1.22 jmcneill baud_rate = 0;
176 1.22 jmcneill for (n = 0; n < __arraycount(acpi_spcr_baud_rates); n++) {
177 1.22 jmcneill if (acpi_spcr_baud_rates[n].id == spcr->BaudRate) {
178 1.22 jmcneill baud_rate = acpi_spcr_baud_rates[n].baud_rate;
179 1.4 jmcneill break;
180 1.4 jmcneill }
181 1.22 jmcneill }
182 1.4 jmcneill
183 1.22 jmcneill /*
184 1.22 jmcneill * Attach console device.
185 1.22 jmcneill */
186 1.22 jmcneill switch (spcr->InterfaceType) {
187 1.4 jmcneill #if NPLCOM > 0
188 1.22 jmcneill case ACPI_DBG2_ARM_PL011:
189 1.22 jmcneill case ACPI_DBG2_ARM_SBSA_32BIT:
190 1.22 jmcneill case ACPI_DBG2_ARM_SBSA_GENERIC:
191 1.22 jmcneill plcom_console.pi_type = PLCOM_TYPE_PL011;
192 1.22 jmcneill plcom_console.pi_iot = &arm_generic_bs_tag;
193 1.22 jmcneill plcom_console.pi_iobase = le64toh(spcr->SerialPort.Address);
194 1.22 jmcneill plcom_console.pi_size = PL011COM_UART_SIZE;
195 1.22 jmcneill plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS;
196 1.1 jmcneill
197 1.22 jmcneill plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1);
198 1.22 jmcneill break;
199 1.4 jmcneill #endif
200 1.22 jmcneill
201 1.4 jmcneill #if NCOM > 0
202 1.22 jmcneill case ACPI_DBG2_16550_COMPATIBLE:
203 1.22 jmcneill case ACPI_DBG2_16550_SUBSET:
204 1.33 skrll case ACPI_DBG2_16550_WITH_GAS:
205 1.22 jmcneill memset(&dummy_bsh, 0, sizeof(dummy_bsh));
206 1.32 jmcneill switch (spcr->SerialPort.BitWidth) {
207 1.32 jmcneill case 8:
208 1.22 jmcneill reg_shift = 0;
209 1.32 jmcneill break;
210 1.32 jmcneill case 16:
211 1.32 jmcneill reg_shift = 1;
212 1.32 jmcneill break;
213 1.32 jmcneill case 32:
214 1.31 jmcneill reg_shift = 2;
215 1.32 jmcneill break;
216 1.32 jmcneill default:
217 1.32 jmcneill /*
218 1.32 jmcneill * Bit width 0 is possible for types 0 and 1. Otherwise,
219 1.32 jmcneill * possibly buggy firmware.
220 1.32 jmcneill */
221 1.32 jmcneill if (spcr->InterfaceType == ACPI_DBG2_16550_COMPATIBLE) {
222 1.31 jmcneill reg_shift = 0;
223 1.31 jmcneill } else {
224 1.31 jmcneill reg_shift = 2;
225 1.31 jmcneill }
226 1.32 jmcneill break;
227 1.22 jmcneill }
228 1.22 jmcneill com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
229 1.22 jmcneill le64toh(spcr->SerialPort.Address), reg_shift);
230 1.22 jmcneill comcnattach1(®s, baud_rate, -1, COM_TYPE_NORMAL,
231 1.22 jmcneill TTYDEF_CFLAG);
232 1.22 jmcneill break;
233 1.22 jmcneill
234 1.22 jmcneill case ACPI_DBG2_BCM2835:
235 1.22 jmcneill memset(&dummy_bsh, 0, sizeof(dummy_bsh));
236 1.22 jmcneill com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
237 1.22 jmcneill le64toh(spcr->SerialPort.Address) + 0x40, 2);
238 1.22 jmcneill comcnattach1(®s, baud_rate, -1, COM_TYPE_BCMAUXUART,
239 1.22 jmcneill TTYDEF_CFLAG);
240 1.22 jmcneill cn_set_magic("+++++");
241 1.22 jmcneill break;
242 1.22 jmcneill #endif
243 1.22 jmcneill
244 1.22 jmcneill default:
245 1.22 jmcneill printf("SPCR: kernel does not support interface type %#x\n",
246 1.22 jmcneill spcr->InterfaceType);
247 1.22 jmcneill break;
248 1.22 jmcneill }
249 1.22 jmcneill
250 1.24 jmcneill /*
251 1.24 jmcneill * UEFI firmware may leave the console in an undesireable state (wrong
252 1.24 jmcneill * foreground/background colour, etc). Reset the terminal and clear
253 1.24 jmcneill * text from the cursor to the end of the screne.
254 1.24 jmcneill */
255 1.24 jmcneill printf_flags(TOCONS|NOTSTAMP, "\033[0m");
256 1.24 jmcneill printf_flags(TOCONS|NOTSTAMP, "\033[0J");
257 1.22 jmcneill }
258 1.22 jmcneill
259 1.22 jmcneill static void
260 1.22 jmcneill acpi_platform_startup(void)
261 1.22 jmcneill {
262 1.22 jmcneill ACPI_TABLE_SPCR *spcr;
263 1.22 jmcneill ACPI_TABLE_FADT *fadt;
264 1.22 jmcneill #ifdef MULTIPROCESSOR
265 1.22 jmcneill ACPI_TABLE_MADT *madt;
266 1.4 jmcneill #endif
267 1.22 jmcneill
268 1.22 jmcneill /*
269 1.22 jmcneill * Setup serial console device
270 1.22 jmcneill */
271 1.22 jmcneill if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) {
272 1.22 jmcneill acpi_platform_attach_uart(spcr);
273 1.1 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
274 1.1 jmcneill }
275 1.1 jmcneill
276 1.1 jmcneill /*
277 1.1 jmcneill * Initialize PSCI 0.2+ if implemented
278 1.1 jmcneill */
279 1.1 jmcneill if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) {
280 1.22 jmcneill const uint16_t boot_flags = le16toh(fadt->ArmBootFlags);
281 1.22 jmcneill if ((boot_flags & ACPI_FADT_PSCI_COMPLIANT) != 0) {
282 1.22 jmcneill if ((boot_flags & ACPI_FADT_PSCI_USE_HVC) != 0) {
283 1.1 jmcneill psci_init(psci_call_hvc);
284 1.1 jmcneill } else {
285 1.1 jmcneill psci_init(psci_call_smc);
286 1.1 jmcneill }
287 1.28 jmcneill smccc_probe();
288 1.1 jmcneill }
289 1.1 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)fadt);
290 1.1 jmcneill }
291 1.1 jmcneill
292 1.12 ryo #ifdef MULTIPROCESSOR
293 1.1 jmcneill /*
294 1.1 jmcneill * Count CPUs
295 1.1 jmcneill */
296 1.1 jmcneill if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) {
297 1.19 jmcneill char *end = (char *)madt + le32toh(madt->Header.Length);
298 1.1 jmcneill char *where = (char *)madt + sizeof(ACPI_TABLE_MADT);
299 1.1 jmcneill while (where < end) {
300 1.22 jmcneill ACPI_SUBTABLE_HEADER *subtable =
301 1.22 jmcneill (ACPI_SUBTABLE_HEADER *)where;
302 1.1 jmcneill if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT)
303 1.1 jmcneill arm_cpu_max++;
304 1.1 jmcneill where += subtable->Length;
305 1.1 jmcneill }
306 1.1 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)madt);
307 1.1 jmcneill }
308 1.12 ryo #endif /* MULTIPROCESSOR */
309 1.1 jmcneill }
310 1.1 jmcneill
311 1.1 jmcneill static void
312 1.1 jmcneill acpi_platform_init_attach_args(struct fdt_attach_args *faa)
313 1.1 jmcneill {
314 1.1 jmcneill extern struct bus_space arm_generic_bs_tag;
315 1.1 jmcneill
316 1.1 jmcneill faa->faa_bst = &arm_generic_bs_tag;
317 1.14 jmcneill faa->faa_dmat = &acpi_coherent_dma_tag;
318 1.1 jmcneill }
319 1.1 jmcneill
320 1.1 jmcneill static void
321 1.1 jmcneill acpi_platform_device_register(device_t self, void *aux)
322 1.1 jmcneill {
323 1.10 jmcneill #if NCOM > 0
324 1.10 jmcneill prop_dictionary_t prop = device_properties(self);
325 1.22 jmcneill ACPI_STATUS rv;
326 1.10 jmcneill
327 1.11 jmcneill if (device_is_a(self, "com")) {
328 1.10 jmcneill ACPI_TABLE_SPCR *spcr;
329 1.10 jmcneill
330 1.22 jmcneill rv = acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr);
331 1.22 jmcneill if (ACPI_FAILURE(rv)) {
332 1.10 jmcneill return;
333 1.22 jmcneill }
334 1.11 jmcneill
335 1.22 jmcneill if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
336 1.10 jmcneill goto spcr_unmap;
337 1.22 jmcneill }
338 1.22 jmcneill if (le64toh(spcr->SerialPort.Address) == 0) {
339 1.10 jmcneill goto spcr_unmap;
340 1.22 jmcneill }
341 1.10 jmcneill if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE &&
342 1.22 jmcneill spcr->InterfaceType != ACPI_DBG2_16550_SUBSET) {
343 1.10 jmcneill goto spcr_unmap;
344 1.22 jmcneill }
345 1.10 jmcneill
346 1.11 jmcneill if (device_is_a(device_parent(self), "puc")) {
347 1.11 jmcneill const struct puc_attach_args * const paa = aux;
348 1.11 jmcneill int b, d, f;
349 1.11 jmcneill
350 1.11 jmcneill const int s = pci_get_segment(paa->pc);
351 1.11 jmcneill pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f);
352 1.11 jmcneill
353 1.11 jmcneill if (spcr->PciSegment == s && spcr->PciBus == b &&
354 1.22 jmcneill spcr->PciDevice == d && spcr->PciFunction == f) {
355 1.22 jmcneill prop_dictionary_set_bool(prop,
356 1.22 jmcneill "force_console", true);
357 1.22 jmcneill }
358 1.11 jmcneill }
359 1.11 jmcneill
360 1.11 jmcneill if (device_is_a(device_parent(self), "acpi")) {
361 1.11 jmcneill struct acpi_attach_args * const aa = aux;
362 1.11 jmcneill struct acpi_resources res;
363 1.11 jmcneill struct acpi_mem *mem;
364 1.11 jmcneill
365 1.22 jmcneill if (ACPI_FAILURE(acpi_resource_parse(self,
366 1.22 jmcneill aa->aa_node->ad_handle, "_CRS", &res,
367 1.22 jmcneill &acpi_resource_parse_ops_quiet))) {
368 1.11 jmcneill goto spcr_unmap;
369 1.22 jmcneill }
370 1.11 jmcneill
371 1.11 jmcneill mem = acpi_res_mem(&res, 0);
372 1.22 jmcneill if (mem == NULL) {
373 1.11 jmcneill goto crs_cleanup;
374 1.22 jmcneill }
375 1.11 jmcneill
376 1.22 jmcneill if (mem->ar_base == le64toh(spcr->SerialPort.Address)) {
377 1.22 jmcneill prop_dictionary_set_bool(prop,
378 1.22 jmcneill "force_console", true);
379 1.22 jmcneill }
380 1.11 jmcneill
381 1.11 jmcneill crs_cleanup:
382 1.11 jmcneill acpi_resource_cleanup(&res);
383 1.11 jmcneill }
384 1.10 jmcneill
385 1.10 jmcneill spcr_unmap:
386 1.10 jmcneill acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
387 1.10 jmcneill }
388 1.10 jmcneill #endif
389 1.1 jmcneill }
390 1.1 jmcneill
391 1.2 jmcneill static void
392 1.2 jmcneill acpi_platform_reset(void)
393 1.2 jmcneill {
394 1.5 jmcneill #ifdef EFI_RUNTIME
395 1.5 jmcneill if (arm_efirt_reset(EFI_RESET_COLD) == 0)
396 1.5 jmcneill return;
397 1.5 jmcneill #endif
398 1.2 jmcneill if (psci_available())
399 1.2 jmcneill psci_system_reset();
400 1.2 jmcneill }
401 1.2 jmcneill
402 1.1 jmcneill static u_int
403 1.1 jmcneill acpi_platform_uart_freq(void)
404 1.1 jmcneill {
405 1.1 jmcneill return 0;
406 1.1 jmcneill }
407 1.1 jmcneill
408 1.1 jmcneill static const struct arm_platform acpi_platform = {
409 1.1 jmcneill .ap_devmap = acpi_platform_devmap,
410 1.1 jmcneill .ap_bootstrap = acpi_platform_bootstrap,
411 1.1 jmcneill .ap_startup = acpi_platform_startup,
412 1.1 jmcneill .ap_init_attach_args = acpi_platform_init_attach_args,
413 1.1 jmcneill .ap_device_register = acpi_platform_device_register,
414 1.2 jmcneill .ap_reset = acpi_platform_reset,
415 1.1 jmcneill .ap_delay = gtmr_delay,
416 1.1 jmcneill .ap_uart_freq = acpi_platform_uart_freq,
417 1.1 jmcneill };
418 1.1 jmcneill
419 1.17 jmcneill ARM_PLATFORM(acpi, "netbsd,generic-acpi", &acpi_platform);
420