acpi_platform.c revision 1.14
1 /* $NetBSD: acpi_platform.c,v 1.14 2019/06/22 19:47:27 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill (at) invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "com.h" 33 #include "plcom.h" 34 #include "opt_efi.h" 35 #include "opt_multiprocessor.h" 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.14 2019/06/22 19:47:27 jmcneill Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/bus.h> 42 #include <sys/cpu.h> 43 #include <sys/device.h> 44 #include <sys/termios.h> 45 46 #include <dev/fdt/fdtvar.h> 47 #include <arm/fdt/arm_fdtvar.h> 48 49 #include <uvm/uvm_extern.h> 50 51 #include <machine/bootconfig.h> 52 #include <arm/cpufunc.h> 53 #include <arm/locore.h> 54 55 #include <arm/cortex/gtmr_var.h> 56 57 #include <arm/arm/psci.h> 58 #include <arm/fdt/psci_fdtvar.h> 59 60 #include <evbarm/fdt/platform.h> 61 62 #include <evbarm/dev/plcomreg.h> 63 #include <evbarm/dev/plcomvar.h> 64 #include <dev/ic/ns16550reg.h> 65 #include <dev/ic/comreg.h> 66 #include <dev/ic/comvar.h> 67 68 #if NCOM > 0 69 #include <dev/pci/pcireg.h> 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pucvar.h> 72 #endif 73 74 #ifdef EFI_RUNTIME 75 #include <arm/arm/efi_runtime.h> 76 #endif 77 78 #include <dev/acpi/acpireg.h> 79 #include <dev/acpi/acpivar.h> 80 #include <arm/acpi/acpi_table.h> 81 82 #include <libfdt.h> 83 84 #define SPCR_BAUD_UNKNOWN 0 85 #define SPCR_BAUD_9600 3 86 #define SPCR_BAUD_19200 4 87 #define SPCR_BAUD_57600 6 88 #define SPCR_BAUD_115200 7 89 90 extern struct bus_space arm_generic_bs_tag; 91 extern struct bus_space arm_generic_a4x_bs_tag; 92 93 #if NPLCOM > 0 94 static struct plcom_instance plcom_console; 95 #endif 96 97 struct arm32_bus_dma_tag acpi_coherent_dma_tag; 98 static struct arm32_dma_range acpi_coherent_ranges[] = { 99 [0] = { 100 .dr_sysbase = 0, 101 .dr_busbase = 0, 102 .dr_len = UINTPTR_MAX, 103 .dr_flags = _BUS_DMAMAP_COHERENT, 104 } 105 }; 106 107 static const struct pmap_devmap * 108 acpi_platform_devmap(void) 109 { 110 static const struct pmap_devmap devmap[] = { 111 DEVMAP_ENTRY_END 112 }; 113 114 return devmap; 115 } 116 117 static void 118 acpi_platform_bootstrap(void) 119 { 120 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 121 122 acpi_coherent_dma_tag = arm_generic_dma_tag; 123 acpi_coherent_dma_tag._ranges = acpi_coherent_ranges; 124 acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges); 125 } 126 127 static void 128 acpi_platform_startup(void) 129 { 130 ACPI_TABLE_SPCR *spcr; 131 ACPI_TABLE_FADT *fadt; 132 #ifdef MULTIPROCESSOR 133 ACPI_TABLE_MADT *madt; 134 #endif 135 int baud_rate; 136 137 /* 138 * Setup serial console device 139 */ 140 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) { 141 142 switch (spcr->BaudRate) { 143 case SPCR_BAUD_9600: 144 baud_rate = 9600; 145 break; 146 case SPCR_BAUD_19200: 147 baud_rate = 19200; 148 break; 149 case SPCR_BAUD_57600: 150 baud_rate = 57600; 151 break; 152 case SPCR_BAUD_115200: 153 case SPCR_BAUD_UNKNOWN: 154 default: 155 baud_rate = 115200; 156 break; 157 } 158 159 if (spcr->SerialPort.SpaceId == ACPI_ADR_SPACE_SYSTEM_MEMORY && 160 spcr->SerialPort.Address != 0) { 161 switch (spcr->InterfaceType) { 162 #if NPLCOM > 0 163 case ACPI_DBG2_ARM_PL011: 164 case ACPI_DBG2_ARM_SBSA_32BIT: 165 case ACPI_DBG2_ARM_SBSA_GENERIC: 166 plcom_console.pi_type = PLCOM_TYPE_PL011; 167 plcom_console.pi_iot = &arm_generic_bs_tag; 168 plcom_console.pi_iobase = spcr->SerialPort.Address; 169 plcom_console.pi_size = PL011COM_UART_SIZE; 170 if (spcr->InterfaceType == ACPI_DBG2_ARM_SBSA_32BIT) { 171 plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS; 172 } else { 173 plcom_console.pi_flags = ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8 ? 174 0 : PLC_FLAG_32BIT_ACCESS; 175 } 176 177 plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1); 178 break; 179 #endif 180 #if NCOM > 0 181 case ACPI_DBG2_16550_COMPATIBLE: 182 case ACPI_DBG2_16550_SUBSET: 183 if (ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8) { 184 comcnattach(&arm_generic_bs_tag, spcr->SerialPort.Address, baud_rate, -1, 185 COM_TYPE_NORMAL, TTYDEF_CFLAG); 186 } else { 187 comcnattach(&arm_generic_a4x_bs_tag, spcr->SerialPort.Address, baud_rate, -1, 188 COM_TYPE_NORMAL, TTYDEF_CFLAG); 189 } 190 break; 191 case ACPI_DBG2_BCM2835: 192 comcnattach(&arm_generic_a4x_bs_tag, spcr->SerialPort.Address + 0x40, baud_rate, -1, 193 COM_TYPE_BCMAUXUART, TTYDEF_CFLAG); 194 cn_set_magic("+++++"); 195 break; 196 #endif 197 default: 198 printf("SPCR: kernel does not support interface type %#x\n", spcr->InterfaceType); 199 break; 200 } 201 } 202 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr); 203 } 204 205 /* 206 * Initialize PSCI 0.2+ if implemented 207 */ 208 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) { 209 if (fadt->ArmBootFlags & ACPI_FADT_PSCI_COMPLIANT) { 210 if (fadt->ArmBootFlags & ACPI_FADT_PSCI_USE_HVC) { 211 psci_init(psci_call_hvc); 212 } else { 213 psci_init(psci_call_smc); 214 } 215 } 216 acpi_table_unmap((ACPI_TABLE_HEADER *)fadt); 217 } 218 219 #ifdef MULTIPROCESSOR 220 /* 221 * Count CPUs 222 */ 223 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) { 224 char *end = (char *)madt + madt->Header.Length; 225 char *where = (char *)madt + sizeof(ACPI_TABLE_MADT); 226 while (where < end) { 227 ACPI_SUBTABLE_HEADER *subtable = (ACPI_SUBTABLE_HEADER *)where; 228 if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) 229 arm_cpu_max++; 230 where += subtable->Length; 231 } 232 acpi_table_unmap((ACPI_TABLE_HEADER *)madt); 233 } 234 #endif /* MULTIPROCESSOR */ 235 } 236 237 static void 238 acpi_platform_init_attach_args(struct fdt_attach_args *faa) 239 { 240 extern struct bus_space arm_generic_bs_tag; 241 extern struct bus_space arm_generic_a4x_bs_tag; 242 243 faa->faa_bst = &arm_generic_bs_tag; 244 faa->faa_a4x_bst = &arm_generic_a4x_bs_tag; 245 faa->faa_dmat = &acpi_coherent_dma_tag; 246 } 247 248 static void 249 acpi_platform_device_register(device_t self, void *aux) 250 { 251 #if NCOM > 0 252 prop_dictionary_t prop = device_properties(self); 253 254 if (device_is_a(self, "com")) { 255 ACPI_TABLE_SPCR *spcr; 256 257 if (ACPI_FAILURE(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) 258 return; 259 260 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) 261 goto spcr_unmap; 262 if (spcr->SerialPort.Address == 0) 263 goto spcr_unmap; 264 if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE && 265 spcr->InterfaceType != ACPI_DBG2_16550_SUBSET) 266 goto spcr_unmap; 267 268 if (device_is_a(device_parent(self), "puc")) { 269 const struct puc_attach_args * const paa = aux; 270 int b, d, f; 271 272 const int s = pci_get_segment(paa->pc); 273 pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f); 274 275 if (spcr->PciSegment == s && spcr->PciBus == b && 276 spcr->PciDevice == d && spcr->PciFunction == f) 277 prop_dictionary_set_bool(prop, "force_console", true); 278 } 279 280 if (device_is_a(device_parent(self), "acpi")) { 281 struct acpi_attach_args * const aa = aux; 282 struct acpi_resources res; 283 struct acpi_mem *mem; 284 285 if (ACPI_FAILURE(acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS", 286 &res, &acpi_resource_parse_ops_quiet))) 287 goto spcr_unmap; 288 289 mem = acpi_res_mem(&res, 0); 290 if (mem == NULL) 291 goto crs_cleanup; 292 293 if (mem->ar_base == spcr->SerialPort.Address) 294 prop_dictionary_set_bool(prop, "force_console", true); 295 296 crs_cleanup: 297 acpi_resource_cleanup(&res); 298 } 299 300 spcr_unmap: 301 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr); 302 } 303 #endif 304 } 305 306 static void 307 acpi_platform_reset(void) 308 { 309 #ifdef EFI_RUNTIME 310 if (arm_efirt_reset(EFI_RESET_COLD) == 0) 311 return; 312 #endif 313 if (psci_available()) 314 psci_system_reset(); 315 } 316 317 static u_int 318 acpi_platform_uart_freq(void) 319 { 320 return 0; 321 } 322 323 static const struct arm_platform acpi_platform = { 324 .ap_devmap = acpi_platform_devmap, 325 .ap_bootstrap = acpi_platform_bootstrap, 326 .ap_startup = acpi_platform_startup, 327 .ap_init_attach_args = acpi_platform_init_attach_args, 328 .ap_device_register = acpi_platform_device_register, 329 .ap_reset = acpi_platform_reset, 330 .ap_delay = gtmr_delay, 331 .ap_uart_freq = acpi_platform_uart_freq, 332 }; 333 334 ARM_PLATFORM(virt, "netbsd,generic-acpi", &acpi_platform); 335
Indexes created Tue Sep 23 14:10:03 GMT 2025