acpi_platform.c revision 1.25 1 /* $NetBSD: acpi_platform.c,v 1.25 2021/04/24 23:36:25 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill (at) invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "com.h"
33 #include "plcom.h"
34 #include "opt_efi.h"
35 #include "opt_multiprocessor.h"
36
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.25 2021/04/24 23:36:25 thorpej Exp $");
39
40 #include <sys/param.h>
41 #include <sys/bus.h>
42 #include <sys/cpu.h>
43 #include <sys/device.h>
44 #include <sys/termios.h>
45 #include <sys/kprintf.h>
46
47 #include <dev/fdt/fdtvar.h>
48 #include <arm/fdt/arm_fdtvar.h>
49
50 #include <uvm/uvm_extern.h>
51
52 #include <machine/bootconfig.h>
53 #include <arm/cpufunc.h>
54 #include <arm/locore.h>
55
56 #include <arm/cortex/gtmr_var.h>
57
58 #include <arm/arm/psci.h>
59 #include <arm/fdt/psci_fdtvar.h>
60
61 #include <evbarm/fdt/platform.h>
62
63 #include <evbarm/dev/plcomreg.h>
64 #include <evbarm/dev/plcomvar.h>
65 #include <dev/ic/ns16550reg.h>
66 #include <dev/ic/comreg.h>
67 #include <dev/ic/comvar.h>
68
69 #if NCOM > 0
70 #include <dev/pci/pcireg.h>
71 #include <dev/pci/pcivar.h>
72 #include <dev/pci/pucvar.h>
73 #endif
74
75 #ifdef EFI_RUNTIME
76 #include <arm/arm/efi_runtime.h>
77 #endif
78
79 #include <dev/acpi/acpireg.h>
80 #include <dev/acpi/acpivar.h>
81 #include <arm/acpi/acpi_table.h>
82
83 #include <libfdt.h>
84
85 #define SPCR_BAUD_DEFAULT 0
86 #define SPCR_BAUD_9600 3
87 #define SPCR_BAUD_19200 4
88 #define SPCR_BAUD_57600 6
89 #define SPCR_BAUD_115200 7
90
91 static const struct acpi_spcr_baud_rate {
92 uint8_t id;
93 uint32_t baud_rate;
94 } acpi_spcr_baud_rates[] = {
95 { SPCR_BAUD_DEFAULT, 0 },
96 { SPCR_BAUD_9600, 9600 },
97 { SPCR_BAUD_19200, 19200 },
98 { SPCR_BAUD_57600, 57600 },
99 { SPCR_BAUD_115200, 115200 },
100 };
101
102 extern struct bus_space arm_generic_bs_tag;
103
104 #if NPLCOM > 0
105 static struct plcom_instance plcom_console;
106 #endif
107
108 struct arm32_bus_dma_tag acpi_coherent_dma_tag;
109 static struct arm32_dma_range acpi_coherent_ranges[] = {
110 [0] = {
111 .dr_sysbase = 0,
112 .dr_busbase = 0,
113 .dr_len = UINTPTR_MAX,
114 .dr_flags = _BUS_DMAMAP_COHERENT,
115 }
116 };
117
118 static const struct pmap_devmap *
119 acpi_platform_devmap(void)
120 {
121 static const struct pmap_devmap devmap[] = {
122 DEVMAP_ENTRY_END
123 };
124
125 return devmap;
126 }
127
128 static void
129 acpi_platform_bootstrap(void)
130 {
131 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
132
133 acpi_coherent_dma_tag = arm_generic_dma_tag;
134 acpi_coherent_dma_tag._ranges = acpi_coherent_ranges;
135 acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges);
136 }
137
138 static void
139 acpi_platform_attach_uart(ACPI_TABLE_SPCR *spcr)
140 {
141 #if NCOM > 0
142 struct com_regs regs;
143 bus_space_handle_t dummy_bsh;
144 u_int reg_shift;
145 #endif
146 int baud_rate, n;
147
148 /*
149 * Only MMIO access is supported today.
150 */
151 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
152 return;
153 }
154 if (le64toh(spcr->SerialPort.Address) == 0) {
155 return;
156 }
157
158 /*
159 * Lookup SPCR baud rate.
160 */
161 baud_rate = 0;
162 for (n = 0; n < __arraycount(acpi_spcr_baud_rates); n++) {
163 if (acpi_spcr_baud_rates[n].id == spcr->BaudRate) {
164 baud_rate = acpi_spcr_baud_rates[n].baud_rate;
165 break;
166 }
167 }
168
169 /*
170 * Attach console device.
171 */
172 switch (spcr->InterfaceType) {
173 #if NPLCOM > 0
174 case ACPI_DBG2_ARM_PL011:
175 case ACPI_DBG2_ARM_SBSA_32BIT:
176 case ACPI_DBG2_ARM_SBSA_GENERIC:
177 plcom_console.pi_type = PLCOM_TYPE_PL011;
178 plcom_console.pi_iot = &arm_generic_bs_tag;
179 plcom_console.pi_iobase = le64toh(spcr->SerialPort.Address);
180 plcom_console.pi_size = PL011COM_UART_SIZE;
181 plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS;
182
183 plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1);
184 break;
185 #endif
186
187 #if NCOM > 0
188 case ACPI_DBG2_16550_COMPATIBLE:
189 case ACPI_DBG2_16550_SUBSET:
190 memset(&dummy_bsh, 0, sizeof(dummy_bsh));
191 if (ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8) {
192 reg_shift = 0;
193 } else {
194 reg_shift = 2;
195 }
196 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
197 le64toh(spcr->SerialPort.Address), reg_shift);
198 comcnattach1(®s, baud_rate, -1, COM_TYPE_NORMAL,
199 TTYDEF_CFLAG);
200 break;
201
202 case ACPI_DBG2_BCM2835:
203 memset(&dummy_bsh, 0, sizeof(dummy_bsh));
204 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
205 le64toh(spcr->SerialPort.Address) + 0x40, 2);
206 comcnattach1(®s, baud_rate, -1, COM_TYPE_BCMAUXUART,
207 TTYDEF_CFLAG);
208 cn_set_magic("+++++");
209 break;
210 #endif
211
212 default:
213 printf("SPCR: kernel does not support interface type %#x\n",
214 spcr->InterfaceType);
215 break;
216 }
217
218 /*
219 * UEFI firmware may leave the console in an undesireable state (wrong
220 * foreground/background colour, etc). Reset the terminal and clear
221 * text from the cursor to the end of the screne.
222 */
223 printf_flags(TOCONS|NOTSTAMP, "\033[0m");
224 printf_flags(TOCONS|NOTSTAMP, "\033[0J");
225 }
226
227 static void
228 acpi_platform_startup(void)
229 {
230 ACPI_TABLE_SPCR *spcr;
231 ACPI_TABLE_FADT *fadt;
232 #ifdef MULTIPROCESSOR
233 ACPI_TABLE_MADT *madt;
234 #endif
235
236 /*
237 * Setup serial console device
238 */
239 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) {
240 acpi_platform_attach_uart(spcr);
241 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
242 }
243
244 /*
245 * Initialize PSCI 0.2+ if implemented
246 */
247 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) {
248 const uint16_t boot_flags = le16toh(fadt->ArmBootFlags);
249 if ((boot_flags & ACPI_FADT_PSCI_COMPLIANT) != 0) {
250 if ((boot_flags & ACPI_FADT_PSCI_USE_HVC) != 0) {
251 psci_init(psci_call_hvc);
252 } else {
253 psci_init(psci_call_smc);
254 }
255 }
256 acpi_table_unmap((ACPI_TABLE_HEADER *)fadt);
257 }
258
259 #ifdef MULTIPROCESSOR
260 /*
261 * Count CPUs
262 */
263 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) {
264 char *end = (char *)madt + le32toh(madt->Header.Length);
265 char *where = (char *)madt + sizeof(ACPI_TABLE_MADT);
266 while (where < end) {
267 ACPI_SUBTABLE_HEADER *subtable =
268 (ACPI_SUBTABLE_HEADER *)where;
269 if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT)
270 arm_cpu_max++;
271 where += subtable->Length;
272 }
273 acpi_table_unmap((ACPI_TABLE_HEADER *)madt);
274 }
275 #endif /* MULTIPROCESSOR */
276 }
277
278 static void
279 acpi_platform_init_attach_args(struct fdt_attach_args *faa)
280 {
281 extern struct bus_space arm_generic_bs_tag;
282
283 faa->faa_bst = &arm_generic_bs_tag;
284 faa->faa_dmat = &acpi_coherent_dma_tag;
285 }
286
287 static void
288 acpi_platform_device_register(device_t self, void *aux)
289 {
290 acpi_device_register(self, aux);
291
292 #if NCOM > 0
293 prop_dictionary_t prop = device_properties(self);
294 ACPI_STATUS rv;
295
296 if (device_is_a(self, "com")) {
297 ACPI_TABLE_SPCR *spcr;
298
299 rv = acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr);
300 if (ACPI_FAILURE(rv)) {
301 return;
302 }
303
304 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
305 goto spcr_unmap;
306 }
307 if (le64toh(spcr->SerialPort.Address) == 0) {
308 goto spcr_unmap;
309 }
310 if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE &&
311 spcr->InterfaceType != ACPI_DBG2_16550_SUBSET) {
312 goto spcr_unmap;
313 }
314
315 if (device_is_a(device_parent(self), "puc")) {
316 const struct puc_attach_args * const paa = aux;
317 int b, d, f;
318
319 const int s = pci_get_segment(paa->pc);
320 pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f);
321
322 if (spcr->PciSegment == s && spcr->PciBus == b &&
323 spcr->PciDevice == d && spcr->PciFunction == f) {
324 prop_dictionary_set_bool(prop,
325 "force_console", true);
326 }
327 }
328
329 if (device_is_a(device_parent(self), "acpi")) {
330 struct acpi_attach_args * const aa = aux;
331 struct acpi_resources res;
332 struct acpi_mem *mem;
333
334 if (ACPI_FAILURE(acpi_resource_parse(self,
335 aa->aa_node->ad_handle, "_CRS", &res,
336 &acpi_resource_parse_ops_quiet))) {
337 goto spcr_unmap;
338 }
339
340 mem = acpi_res_mem(&res, 0);
341 if (mem == NULL) {
342 goto crs_cleanup;
343 }
344
345 if (mem->ar_base == le64toh(spcr->SerialPort.Address)) {
346 prop_dictionary_set_bool(prop,
347 "force_console", true);
348 }
349
350 crs_cleanup:
351 acpi_resource_cleanup(&res);
352 }
353
354 spcr_unmap:
355 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
356 }
357 #endif
358 }
359
360 static void
361 acpi_platform_reset(void)
362 {
363 #ifdef EFI_RUNTIME
364 if (arm_efirt_reset(EFI_RESET_COLD) == 0)
365 return;
366 #endif
367 if (psci_available())
368 psci_system_reset();
369 }
370
371 static u_int
372 acpi_platform_uart_freq(void)
373 {
374 return 0;
375 }
376
377 static const struct arm_platform acpi_platform = {
378 .ap_devmap = acpi_platform_devmap,
379 .ap_bootstrap = acpi_platform_bootstrap,
380 .ap_startup = acpi_platform_startup,
381 .ap_init_attach_args = acpi_platform_init_attach_args,
382 .ap_device_register = acpi_platform_device_register,
383 .ap_reset = acpi_platform_reset,
384 .ap_delay = gtmr_delay,
385 .ap_uart_freq = acpi_platform_uart_freq,
386 };
387
388 ARM_PLATFORM(acpi, "netbsd,generic-acpi", &acpi_platform);
389