acpi_platform.c revision 1.27 1 /* $NetBSD: acpi_platform.c,v 1.27 2021/08/06 19:38:53 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill (at) invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "com.h"
33 #include "plcom.h"
34 #include "opt_efi.h"
35 #include "opt_multiprocessor.h"
36
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.27 2021/08/06 19:38:53 jmcneill Exp $");
39
40 #include <sys/param.h>
41 #include <sys/bus.h>
42 #include <sys/cpu.h>
43 #include <sys/device.h>
44 #include <sys/termios.h>
45 #include <sys/kprintf.h>
46
47 #include <dev/fdt/fdtvar.h>
48 #include <arm/fdt/arm_fdtvar.h>
49
50 #include <uvm/uvm_extern.h>
51
52 #include <machine/bootconfig.h>
53 #include <arm/cpufunc.h>
54 #include <arm/locore.h>
55
56 #include <arm/cortex/gtmr_var.h>
57
58 #include <arm/arm/smccc.h>
59 #include <arm/arm/psci.h>
60 #include <arm/fdt/psci_fdtvar.h>
61
62 #include <evbarm/fdt/platform.h>
63
64 #include <evbarm/dev/plcomreg.h>
65 #include <evbarm/dev/plcomvar.h>
66 #include <dev/ic/ns16550reg.h>
67 #include <dev/ic/comreg.h>
68 #include <dev/ic/comvar.h>
69
70 #if NCOM > 0
71 #include <dev/pci/pcireg.h>
72 #include <dev/pci/pcivar.h>
73 #include <dev/pci/pucvar.h>
74 #endif
75
76 #ifdef EFI_RUNTIME
77 #include <arm/arm/efi_runtime.h>
78 #endif
79
80 #include <dev/acpi/acpireg.h>
81 #include <dev/acpi/acpivar.h>
82 #include <arm/acpi/acpi_table.h>
83
84 #include <libfdt.h>
85
86 #define SPCR_BAUD_DEFAULT 0
87 #define SPCR_BAUD_9600 3
88 #define SPCR_BAUD_19200 4
89 #define SPCR_BAUD_57600 6
90 #define SPCR_BAUD_115200 7
91
92 static const struct acpi_spcr_baud_rate {
93 uint8_t id;
94 uint32_t baud_rate;
95 } acpi_spcr_baud_rates[] = {
96 { SPCR_BAUD_DEFAULT, 0 },
97 { SPCR_BAUD_9600, 9600 },
98 { SPCR_BAUD_19200, 19200 },
99 { SPCR_BAUD_57600, 57600 },
100 { SPCR_BAUD_115200, 115200 },
101 };
102
103 extern struct bus_space arm_generic_bs_tag;
104
105 #if NPLCOM > 0
106 static struct plcom_instance plcom_console;
107 #endif
108
109 struct arm32_bus_dma_tag acpi_coherent_dma_tag;
110 static struct arm32_dma_range acpi_coherent_ranges[] = {
111 [0] = {
112 .dr_sysbase = 0,
113 .dr_busbase = 0,
114 .dr_len = UINTPTR_MAX,
115 .dr_flags = _BUS_DMAMAP_COHERENT,
116 }
117 };
118
119 static const struct pmap_devmap *
120 acpi_platform_devmap(void)
121 {
122 static const struct pmap_devmap devmap[] = {
123 DEVMAP_ENTRY_END
124 };
125
126 return devmap;
127 }
128
129 static void
130 acpi_platform_bootstrap(void)
131 {
132 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
133
134 acpi_coherent_dma_tag = arm_generic_dma_tag;
135 acpi_coherent_dma_tag._ranges = acpi_coherent_ranges;
136 acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges);
137 }
138
139 static void
140 acpi_platform_attach_uart(ACPI_TABLE_SPCR *spcr)
141 {
142 #if NCOM > 0
143 struct com_regs regs;
144 bus_space_handle_t dummy_bsh;
145 u_int reg_shift;
146 #endif
147 int baud_rate, n;
148
149 /*
150 * Only MMIO access is supported today.
151 */
152 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
153 return;
154 }
155 if (le64toh(spcr->SerialPort.Address) == 0) {
156 return;
157 }
158
159 /*
160 * Lookup SPCR baud rate.
161 */
162 baud_rate = 0;
163 for (n = 0; n < __arraycount(acpi_spcr_baud_rates); n++) {
164 if (acpi_spcr_baud_rates[n].id == spcr->BaudRate) {
165 baud_rate = acpi_spcr_baud_rates[n].baud_rate;
166 break;
167 }
168 }
169
170 /*
171 * Attach console device.
172 */
173 switch (spcr->InterfaceType) {
174 #if NPLCOM > 0
175 case ACPI_DBG2_ARM_PL011:
176 case ACPI_DBG2_ARM_SBSA_32BIT:
177 case ACPI_DBG2_ARM_SBSA_GENERIC:
178 plcom_console.pi_type = PLCOM_TYPE_PL011;
179 plcom_console.pi_iot = &arm_generic_bs_tag;
180 plcom_console.pi_iobase = le64toh(spcr->SerialPort.Address);
181 plcom_console.pi_size = PL011COM_UART_SIZE;
182 plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS;
183
184 plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1);
185 break;
186 #endif
187
188 #if NCOM > 0
189 case ACPI_DBG2_16550_COMPATIBLE:
190 case ACPI_DBG2_16550_SUBSET:
191 memset(&dummy_bsh, 0, sizeof(dummy_bsh));
192 if (ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8) {
193 reg_shift = 0;
194 } else {
195 reg_shift = 2;
196 }
197 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
198 le64toh(spcr->SerialPort.Address), reg_shift);
199 comcnattach1(®s, baud_rate, -1, COM_TYPE_NORMAL,
200 TTYDEF_CFLAG);
201 break;
202
203 case ACPI_DBG2_BCM2835:
204 memset(&dummy_bsh, 0, sizeof(dummy_bsh));
205 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
206 le64toh(spcr->SerialPort.Address) + 0x40, 2);
207 comcnattach1(®s, baud_rate, -1, COM_TYPE_BCMAUXUART,
208 TTYDEF_CFLAG);
209 cn_set_magic("+++++");
210 break;
211 #endif
212
213 default:
214 printf("SPCR: kernel does not support interface type %#x\n",
215 spcr->InterfaceType);
216 break;
217 }
218
219 /*
220 * UEFI firmware may leave the console in an undesireable state (wrong
221 * foreground/background colour, etc). Reset the terminal and clear
222 * text from the cursor to the end of the screne.
223 */
224 printf_flags(TOCONS|NOTSTAMP, "\033[0m");
225 printf_flags(TOCONS|NOTSTAMP, "\033[0J");
226 }
227
228 static void
229 acpi_platform_startup(void)
230 {
231 ACPI_TABLE_SPCR *spcr;
232 ACPI_TABLE_FADT *fadt;
233 #ifdef MULTIPROCESSOR
234 ACPI_TABLE_MADT *madt;
235 #endif
236
237 /*
238 * Setup serial console device
239 */
240 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) {
241 acpi_platform_attach_uart(spcr);
242 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
243 }
244
245 /*
246 * Initialize PSCI 0.2+ if implemented
247 */
248 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) {
249 const uint16_t boot_flags = le16toh(fadt->ArmBootFlags);
250 if ((boot_flags & ACPI_FADT_PSCI_COMPLIANT) != 0) {
251 if ((boot_flags & ACPI_FADT_PSCI_USE_HVC) != 0) {
252 psci_init(psci_call_hvc);
253 } else {
254 psci_init(psci_call_smc);
255 }
256 }
257 acpi_table_unmap((ACPI_TABLE_HEADER *)fadt);
258 }
259
260 #ifdef MULTIPROCESSOR
261 /*
262 * Count CPUs
263 */
264 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) {
265 char *end = (char *)madt + le32toh(madt->Header.Length);
266 char *where = (char *)madt + sizeof(ACPI_TABLE_MADT);
267 while (where < end) {
268 ACPI_SUBTABLE_HEADER *subtable =
269 (ACPI_SUBTABLE_HEADER *)where;
270 if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT)
271 arm_cpu_max++;
272 where += subtable->Length;
273 }
274 acpi_table_unmap((ACPI_TABLE_HEADER *)madt);
275 }
276 #endif /* MULTIPROCESSOR */
277 }
278
279 static void
280 acpi_platform_init_attach_args(struct fdt_attach_args *faa)
281 {
282 extern struct bus_space arm_generic_bs_tag;
283
284 faa->faa_bst = &arm_generic_bs_tag;
285 faa->faa_dmat = &acpi_coherent_dma_tag;
286 }
287
288 static void
289 acpi_platform_device_register(device_t self, void *aux)
290 {
291 #if NCOM > 0
292 prop_dictionary_t prop = device_properties(self);
293 ACPI_STATUS rv;
294
295 if (device_is_a(self, "com")) {
296 ACPI_TABLE_SPCR *spcr;
297
298 rv = acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr);
299 if (ACPI_FAILURE(rv)) {
300 return;
301 }
302
303 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
304 goto spcr_unmap;
305 }
306 if (le64toh(spcr->SerialPort.Address) == 0) {
307 goto spcr_unmap;
308 }
309 if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE &&
310 spcr->InterfaceType != ACPI_DBG2_16550_SUBSET) {
311 goto spcr_unmap;
312 }
313
314 if (device_is_a(device_parent(self), "puc")) {
315 const struct puc_attach_args * const paa = aux;
316 int b, d, f;
317
318 const int s = pci_get_segment(paa->pc);
319 pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f);
320
321 if (spcr->PciSegment == s && spcr->PciBus == b &&
322 spcr->PciDevice == d && spcr->PciFunction == f) {
323 prop_dictionary_set_bool(prop,
324 "force_console", true);
325 }
326 }
327
328 if (device_is_a(device_parent(self), "acpi")) {
329 struct acpi_attach_args * const aa = aux;
330 struct acpi_resources res;
331 struct acpi_mem *mem;
332
333 if (ACPI_FAILURE(acpi_resource_parse(self,
334 aa->aa_node->ad_handle, "_CRS", &res,
335 &acpi_resource_parse_ops_quiet))) {
336 goto spcr_unmap;
337 }
338
339 mem = acpi_res_mem(&res, 0);
340 if (mem == NULL) {
341 goto crs_cleanup;
342 }
343
344 if (mem->ar_base == le64toh(spcr->SerialPort.Address)) {
345 prop_dictionary_set_bool(prop,
346 "force_console", true);
347 }
348
349 crs_cleanup:
350 acpi_resource_cleanup(&res);
351 }
352
353 spcr_unmap:
354 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
355 }
356 #endif
357 }
358
359 static void
360 acpi_platform_reset(void)
361 {
362 #ifdef EFI_RUNTIME
363 if (arm_efirt_reset(EFI_RESET_COLD) == 0)
364 return;
365 #endif
366 if (psci_available())
367 psci_system_reset();
368 }
369
370 static u_int
371 acpi_platform_uart_freq(void)
372 {
373 return 0;
374 }
375
376 static const struct arm_platform acpi_platform = {
377 .ap_devmap = acpi_platform_devmap,
378 .ap_bootstrap = acpi_platform_bootstrap,
379 .ap_startup = acpi_platform_startup,
380 .ap_init_attach_args = acpi_platform_init_attach_args,
381 .ap_device_register = acpi_platform_device_register,
382 .ap_reset = acpi_platform_reset,
383 .ap_delay = gtmr_delay,
384 .ap_uart_freq = acpi_platform_uart_freq,
385 };
386
387 ARM_PLATFORM(acpi, "netbsd,generic-acpi", &acpi_platform);
388