acpi_platform.c revision 1.31 1 /* $NetBSD: acpi_platform.c,v 1.31 2021/10/23 17:45:55 jmcneill Exp $ */
2
3 /*-
4 * Copyright (c) 2018 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jared McNeill <jmcneill (at) invisible.ca>.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include "com.h"
33 #include "plcom.h"
34 #include "opt_efi.h"
35 #include "opt_multiprocessor.h"
36
37 #include <sys/cdefs.h>
38 __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.31 2021/10/23 17:45:55 jmcneill Exp $");
39
40 #include <sys/param.h>
41 #include <sys/bus.h>
42 #include <sys/cpu.h>
43 #include <sys/device.h>
44 #include <sys/termios.h>
45 #include <sys/kprintf.h>
46
47 #include <dev/fdt/fdtvar.h>
48 #include <arm/fdt/arm_fdtvar.h>
49
50 #include <uvm/uvm_extern.h>
51
52 #include <machine/bootconfig.h>
53 #include <arm/cpufunc.h>
54 #include <arm/locore.h>
55
56 #include <arm/cortex/gtmr_var.h>
57
58 #include <arm/arm/smccc.h>
59 #include <arm/arm/psci.h>
60 #include <arm/fdt/psci_fdtvar.h>
61
62 #include <evbarm/fdt/platform.h>
63
64 #include <evbarm/dev/plcomreg.h>
65 #include <evbarm/dev/plcomvar.h>
66 #include <dev/ic/ns16550reg.h>
67 #include <dev/ic/comreg.h>
68 #include <dev/ic/comvar.h>
69
70 #if NCOM > 0
71 #include <dev/pci/pcireg.h>
72 #include <dev/pci/pcivar.h>
73 #include <dev/pci/pucvar.h>
74 #endif
75
76 #ifdef EFI_RUNTIME
77 #include <arm/arm/efi_runtime.h>
78 #endif
79
80 #include <dev/acpi/acpireg.h>
81 #include <dev/acpi/acpivar.h>
82 #include <arm/acpi/acpi_table.h>
83
84 #include <libfdt.h>
85
86 #define ACPI_DBG2_16550_GAS 0x0012
87
88 #define SPCR_BAUD_DEFAULT 0
89 #define SPCR_BAUD_9600 3
90 #define SPCR_BAUD_19200 4
91 #define SPCR_BAUD_57600 6
92 #define SPCR_BAUD_115200 7
93
94 static const struct acpi_spcr_baud_rate {
95 uint8_t id;
96 int baud_rate;
97 } acpi_spcr_baud_rates[] = {
98 { SPCR_BAUD_DEFAULT, -1 },
99 { SPCR_BAUD_9600, 9600 },
100 { SPCR_BAUD_19200, 19200 },
101 { SPCR_BAUD_57600, 57600 },
102 { SPCR_BAUD_115200, 115200 },
103 };
104
105 extern struct bus_space arm_generic_bs_tag;
106
107 #if NPLCOM > 0
108 static struct plcom_instance plcom_console;
109 #endif
110
111 struct arm32_bus_dma_tag acpi_coherent_dma_tag;
112 static struct arm32_dma_range acpi_coherent_ranges[] = {
113 [0] = {
114 .dr_sysbase = 0,
115 .dr_busbase = 0,
116 .dr_len = UINTPTR_MAX,
117 .dr_flags = _BUS_DMAMAP_COHERENT,
118 }
119 };
120
121 static const struct pmap_devmap *
122 acpi_platform_devmap(void)
123 {
124 static const struct pmap_devmap devmap[] = {
125 DEVMAP_ENTRY_END
126 };
127
128 return devmap;
129 }
130
131 static void
132 acpi_platform_bootstrap(void)
133 {
134 extern struct arm32_bus_dma_tag arm_generic_dma_tag;
135
136 acpi_coherent_dma_tag = arm_generic_dma_tag;
137 acpi_coherent_dma_tag._ranges = acpi_coherent_ranges;
138 acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges);
139 }
140
141 static void
142 acpi_platform_attach_uart(ACPI_TABLE_SPCR *spcr)
143 {
144 #if NCOM > 0
145 struct com_regs regs;
146 bus_space_handle_t dummy_bsh;
147 u_int reg_shift;
148 #endif
149 int baud_rate, n;
150
151 /*
152 * Only MMIO access is supported today.
153 */
154 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
155 return;
156 }
157 if (le64toh(spcr->SerialPort.Address) == 0) {
158 return;
159 }
160
161 /*
162 * Lookup SPCR baud rate.
163 */
164 baud_rate = 0;
165 for (n = 0; n < __arraycount(acpi_spcr_baud_rates); n++) {
166 if (acpi_spcr_baud_rates[n].id == spcr->BaudRate) {
167 baud_rate = acpi_spcr_baud_rates[n].baud_rate;
168 break;
169 }
170 }
171
172 /*
173 * Attach console device.
174 */
175 switch (spcr->InterfaceType) {
176 #if NPLCOM > 0
177 case ACPI_DBG2_ARM_PL011:
178 case ACPI_DBG2_ARM_SBSA_32BIT:
179 case ACPI_DBG2_ARM_SBSA_GENERIC:
180 plcom_console.pi_type = PLCOM_TYPE_PL011;
181 plcom_console.pi_iot = &arm_generic_bs_tag;
182 plcom_console.pi_iobase = le64toh(spcr->SerialPort.Address);
183 plcom_console.pi_size = PL011COM_UART_SIZE;
184 plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS;
185
186 plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1);
187 break;
188 #endif
189
190 #if NCOM > 0
191 case ACPI_DBG2_16550_COMPATIBLE:
192 case ACPI_DBG2_16550_SUBSET:
193 case ACPI_DBG2_16550_GAS:
194 memset(&dummy_bsh, 0, sizeof(dummy_bsh));
195 if (spcr->InterfaceType == ACPI_DBG2_16550_COMPATIBLE) {
196 reg_shift = 0;
197 } else if (spcr->InterfaceType == ACPI_DBG2_16550_SUBSET) {
198 reg_shift = 2;
199 } else {
200 if (ACPI_ACCESS_BIT_WIDTH(spcr->SerialPort.AccessWidth) == 8) {
201 reg_shift = 0;
202 } else {
203 reg_shift = 2;
204 }
205 }
206 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
207 le64toh(spcr->SerialPort.Address), reg_shift);
208 comcnattach1(®s, baud_rate, -1, COM_TYPE_NORMAL,
209 TTYDEF_CFLAG);
210 break;
211
212 case ACPI_DBG2_BCM2835:
213 memset(&dummy_bsh, 0, sizeof(dummy_bsh));
214 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh,
215 le64toh(spcr->SerialPort.Address) + 0x40, 2);
216 comcnattach1(®s, baud_rate, -1, COM_TYPE_BCMAUXUART,
217 TTYDEF_CFLAG);
218 cn_set_magic("+++++");
219 break;
220 #endif
221
222 default:
223 printf("SPCR: kernel does not support interface type %#x\n",
224 spcr->InterfaceType);
225 break;
226 }
227
228 /*
229 * UEFI firmware may leave the console in an undesireable state (wrong
230 * foreground/background colour, etc). Reset the terminal and clear
231 * text from the cursor to the end of the screne.
232 */
233 printf_flags(TOCONS|NOTSTAMP, "\033[0m");
234 printf_flags(TOCONS|NOTSTAMP, "\033[0J");
235 }
236
237 static void
238 acpi_platform_startup(void)
239 {
240 ACPI_TABLE_SPCR *spcr;
241 ACPI_TABLE_FADT *fadt;
242 #ifdef MULTIPROCESSOR
243 ACPI_TABLE_MADT *madt;
244 #endif
245
246 /*
247 * Setup serial console device
248 */
249 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) {
250 acpi_platform_attach_uart(spcr);
251 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
252 }
253
254 /*
255 * Initialize PSCI 0.2+ if implemented
256 */
257 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) {
258 const uint16_t boot_flags = le16toh(fadt->ArmBootFlags);
259 if ((boot_flags & ACPI_FADT_PSCI_COMPLIANT) != 0) {
260 if ((boot_flags & ACPI_FADT_PSCI_USE_HVC) != 0) {
261 psci_init(psci_call_hvc);
262 } else {
263 psci_init(psci_call_smc);
264 }
265 smccc_probe();
266 }
267 acpi_table_unmap((ACPI_TABLE_HEADER *)fadt);
268 }
269
270 #ifdef MULTIPROCESSOR
271 /*
272 * Count CPUs
273 */
274 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) {
275 char *end = (char *)madt + le32toh(madt->Header.Length);
276 char *where = (char *)madt + sizeof(ACPI_TABLE_MADT);
277 while (where < end) {
278 ACPI_SUBTABLE_HEADER *subtable =
279 (ACPI_SUBTABLE_HEADER *)where;
280 if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT)
281 arm_cpu_max++;
282 where += subtable->Length;
283 }
284 acpi_table_unmap((ACPI_TABLE_HEADER *)madt);
285 }
286 #endif /* MULTIPROCESSOR */
287 }
288
289 static void
290 acpi_platform_init_attach_args(struct fdt_attach_args *faa)
291 {
292 extern struct bus_space arm_generic_bs_tag;
293
294 faa->faa_bst = &arm_generic_bs_tag;
295 faa->faa_dmat = &acpi_coherent_dma_tag;
296 }
297
298 static void
299 acpi_platform_device_register(device_t self, void *aux)
300 {
301 #if NCOM > 0
302 prop_dictionary_t prop = device_properties(self);
303 ACPI_STATUS rv;
304
305 if (device_is_a(self, "com")) {
306 ACPI_TABLE_SPCR *spcr;
307
308 rv = acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr);
309 if (ACPI_FAILURE(rv)) {
310 return;
311 }
312
313 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) {
314 goto spcr_unmap;
315 }
316 if (le64toh(spcr->SerialPort.Address) == 0) {
317 goto spcr_unmap;
318 }
319 if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE &&
320 spcr->InterfaceType != ACPI_DBG2_16550_SUBSET) {
321 goto spcr_unmap;
322 }
323
324 if (device_is_a(device_parent(self), "puc")) {
325 const struct puc_attach_args * const paa = aux;
326 int b, d, f;
327
328 const int s = pci_get_segment(paa->pc);
329 pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f);
330
331 if (spcr->PciSegment == s && spcr->PciBus == b &&
332 spcr->PciDevice == d && spcr->PciFunction == f) {
333 prop_dictionary_set_bool(prop,
334 "force_console", true);
335 }
336 }
337
338 if (device_is_a(device_parent(self), "acpi")) {
339 struct acpi_attach_args * const aa = aux;
340 struct acpi_resources res;
341 struct acpi_mem *mem;
342
343 if (ACPI_FAILURE(acpi_resource_parse(self,
344 aa->aa_node->ad_handle, "_CRS", &res,
345 &acpi_resource_parse_ops_quiet))) {
346 goto spcr_unmap;
347 }
348
349 mem = acpi_res_mem(&res, 0);
350 if (mem == NULL) {
351 goto crs_cleanup;
352 }
353
354 if (mem->ar_base == le64toh(spcr->SerialPort.Address)) {
355 prop_dictionary_set_bool(prop,
356 "force_console", true);
357 }
358
359 crs_cleanup:
360 acpi_resource_cleanup(&res);
361 }
362
363 spcr_unmap:
364 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr);
365 }
366 #endif
367 }
368
369 static void
370 acpi_platform_reset(void)
371 {
372 #ifdef EFI_RUNTIME
373 if (arm_efirt_reset(EFI_RESET_COLD) == 0)
374 return;
375 #endif
376 if (psci_available())
377 psci_system_reset();
378 }
379
380 static u_int
381 acpi_platform_uart_freq(void)
382 {
383 return 0;
384 }
385
386 static const struct arm_platform acpi_platform = {
387 .ap_devmap = acpi_platform_devmap,
388 .ap_bootstrap = acpi_platform_bootstrap,
389 .ap_startup = acpi_platform_startup,
390 .ap_init_attach_args = acpi_platform_init_attach_args,
391 .ap_device_register = acpi_platform_device_register,
392 .ap_reset = acpi_platform_reset,
393 .ap_delay = gtmr_delay,
394 .ap_uart_freq = acpi_platform_uart_freq,
395 };
396
397 ARM_PLATFORM(acpi, "netbsd,generic-acpi", &acpi_platform);
398