acpi_platform.c revision 1.39
1 /* $NetBSD: acpi_platform.c,v 1.39 2025/09/06 21:02:39 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jared McNeill <jmcneill (at) invisible.ca>. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include "com.h" 33 #include "plcom.h" 34 #include "opt_efi.h" 35 #include "opt_multiprocessor.h" 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: acpi_platform.c,v 1.39 2025/09/06 21:02:39 thorpej Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/bus.h> 42 #include <sys/cpu.h> 43 #include <sys/device.h> 44 #include <sys/termios.h> 45 #include <sys/kprintf.h> 46 47 #include <dev/fdt/fdtvar.h> 48 #include <dev/fdt/fdt_platform.h> 49 50 #include <uvm/uvm_extern.h> 51 52 #include <machine/bootconfig.h> 53 #include <arm/cpufunc.h> 54 #include <arm/locore.h> 55 56 #include <arm/cortex/gtmr_var.h> 57 58 #include <arm/arm/smccc.h> 59 #include <arm/arm/psci.h> 60 #include <arm/fdt/psci_fdtvar.h> 61 62 #include <evbarm/fdt/platform.h> 63 64 #include <evbarm/dev/plcomreg.h> 65 #include <evbarm/dev/plcomvar.h> 66 #include <dev/ic/ns16550reg.h> 67 #include <dev/ic/comreg.h> 68 #include <dev/ic/comvar.h> 69 70 #if NCOM > 0 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcivar.h> 73 #include <dev/pci/pucvar.h> 74 #endif 75 76 #ifdef EFI_RUNTIME 77 #include <arm/arm/efi_runtime.h> 78 #endif 79 80 #include <dev/acpi/acpireg.h> 81 #include <dev/acpi/acpivar.h> 82 #include <arm/acpi/acpi_table.h> 83 #include <dev/acpi/acpi_srat.h> 84 85 #include <libfdt.h> 86 87 #define SPCR_BAUD_DEFAULT 0 88 #define SPCR_BAUD_9600 3 89 #define SPCR_BAUD_19200 4 90 #define SPCR_BAUD_57600 6 91 #define SPCR_BAUD_115200 7 92 93 static const struct acpi_spcr_baud_rate { 94 uint8_t id; 95 int baud_rate; 96 } acpi_spcr_baud_rates[] = { 97 /* 98 * SPCR_BAUD_DEFAULT means: 99 * "As is, operating system relies on the current configuration 100 * of serial port until the full featured driver will be 101 * initialized." 102 * 103 * We don't currently have a good way of telling the UART driver 104 * to detect the currently configured baud rate, so just pick 105 * something sensible here. 106 * 107 * In the past we have tried baud_rate values of 0 and -1, but 108 * these cause problems with the com(4) driver. 109 */ 110 { SPCR_BAUD_DEFAULT, 115200 }, 111 { SPCR_BAUD_9600, 9600 }, 112 { SPCR_BAUD_19200, 19200 }, 113 { SPCR_BAUD_57600, 57600 }, 114 { SPCR_BAUD_115200, 115200 }, 115 }; 116 117 extern struct bus_space arm_generic_bs_tag; 118 119 #if NPLCOM > 0 120 static struct plcom_instance plcom_console; 121 #endif 122 123 struct arm32_bus_dma_tag acpi_coherent_dma_tag; 124 static struct arm32_dma_range acpi_coherent_ranges[] = { 125 [0] = { 126 .dr_sysbase = 0, 127 .dr_busbase = 0, 128 .dr_len = UINTPTR_MAX, 129 .dr_flags = _BUS_DMAMAP_COHERENT, 130 } 131 }; 132 133 static const struct pmap_devmap * 134 acpi_platform_devmap(void) 135 { 136 static const struct pmap_devmap devmap[] = { 137 DEVMAP_ENTRY_END 138 }; 139 140 return devmap; 141 } 142 143 static void 144 acpi_platform_bootstrap(void) 145 { 146 extern struct arm32_bus_dma_tag arm_generic_dma_tag; 147 148 acpi_coherent_dma_tag = arm_generic_dma_tag; 149 acpi_coherent_dma_tag._ranges = acpi_coherent_ranges; 150 acpi_coherent_dma_tag._nranges = __arraycount(acpi_coherent_ranges); 151 } 152 153 static void 154 acpi_platform_attach_uart(ACPI_TABLE_SPCR *spcr) 155 { 156 #if NCOM > 0 157 struct com_regs regs; 158 bus_space_handle_t dummy_bsh; 159 u_int reg_shift; 160 #endif 161 int baud_rate, n; 162 163 /* 164 * Only MMIO access is supported today. 165 */ 166 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) { 167 return; 168 } 169 if (le64toh(spcr->SerialPort.Address) == 0) { 170 return; 171 } 172 173 /* 174 * Lookup SPCR baud rate. 175 */ 176 baud_rate = 0; 177 for (n = 0; n < __arraycount(acpi_spcr_baud_rates); n++) { 178 if (acpi_spcr_baud_rates[n].id == spcr->BaudRate) { 179 baud_rate = acpi_spcr_baud_rates[n].baud_rate; 180 break; 181 } 182 } 183 184 /* 185 * Attach console device. 186 */ 187 switch (spcr->InterfaceType) { 188 #if NPLCOM > 0 189 case ACPI_DBG2_ARM_PL011: 190 case ACPI_DBG2_ARM_SBSA_32BIT: 191 case ACPI_DBG2_ARM_SBSA_GENERIC: 192 if (spcr->InterfaceType == ACPI_DBG2_ARM_PL011) 193 plcom_console.pi_type = PLCOM_TYPE_PL011; 194 else 195 plcom_console.pi_type = PLCOM_TYPE_GENERIC_UART; 196 plcom_console.pi_iot = &arm_generic_bs_tag; 197 plcom_console.pi_iobase = le64toh(spcr->SerialPort.Address); 198 plcom_console.pi_size = PL011COM_UART_SIZE; 199 plcom_console.pi_flags = PLC_FLAG_32BIT_ACCESS; 200 201 plcomcnattach(&plcom_console, baud_rate, 0, TTYDEF_CFLAG, -1); 202 break; 203 #endif 204 205 #if NCOM > 0 206 case ACPI_DBG2_16550_COMPATIBLE: 207 case ACPI_DBG2_16550_SUBSET: 208 case ACPI_DBG2_16550_WITH_GAS: 209 memset(&dummy_bsh, 0, sizeof(dummy_bsh)); 210 switch (spcr->SerialPort.BitWidth) { 211 case 8: 212 reg_shift = 0; 213 break; 214 case 16: 215 reg_shift = 1; 216 break; 217 case 32: 218 reg_shift = 2; 219 break; 220 default: 221 /* 222 * Bit width 0 is possible for types 0 and 1. Otherwise, 223 * possibly buggy firmware. 224 */ 225 if (spcr->InterfaceType == ACPI_DBG2_16550_COMPATIBLE) { 226 reg_shift = 0; 227 } else { 228 reg_shift = 2; 229 } 230 break; 231 } 232 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh, 233 le64toh(spcr->SerialPort.Address), reg_shift); 234 comcnattach1(®s, baud_rate, -1, COM_TYPE_NORMAL, 235 TTYDEF_CFLAG); 236 break; 237 238 case ACPI_DBG2_BCM2835: 239 memset(&dummy_bsh, 0, sizeof(dummy_bsh)); 240 com_init_regs_stride(®s, &arm_generic_bs_tag, dummy_bsh, 241 le64toh(spcr->SerialPort.Address) + 0x40, 2); 242 comcnattach1(®s, baud_rate, -1, COM_TYPE_BCMAUXUART, 243 TTYDEF_CFLAG); 244 cn_set_magic("+++++"); 245 break; 246 #endif 247 248 default: 249 printf("SPCR: kernel does not support interface type %#x\n", 250 spcr->InterfaceType); 251 break; 252 } 253 254 /* 255 * UEFI firmware may leave the console in an undesireable state (wrong 256 * foreground/background colour, etc). Reset the terminal and clear 257 * text from the cursor to the end of the screen. 258 */ 259 printf_flags(TOCONS|NOTSTAMP, "\033[0m"); 260 printf_flags(TOCONS|NOTSTAMP, "\033[0J"); 261 } 262 263 static void 264 acpi_platform_startup(void) 265 { 266 ACPI_TABLE_SPCR *spcr; 267 ACPI_TABLE_FADT *fadt; 268 #ifdef MULTIPROCESSOR 269 ACPI_TABLE_MADT *madt; 270 #endif 271 272 /* 273 * Setup serial console device 274 */ 275 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr))) { 276 acpi_platform_attach_uart(spcr); 277 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr); 278 } 279 280 /* 281 * Initialize PSCI 0.2+ if implemented 282 */ 283 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_FADT, (void **)&fadt))) { 284 const uint16_t boot_flags = le16toh(fadt->ArmBootFlags); 285 if ((boot_flags & ACPI_FADT_PSCI_COMPLIANT) != 0) { 286 if ((boot_flags & ACPI_FADT_PSCI_USE_HVC) != 0) { 287 psci_init(psci_call_hvc); 288 } else { 289 psci_init(psci_call_smc); 290 } 291 smccc_probe(); 292 } 293 acpi_table_unmap((ACPI_TABLE_HEADER *)fadt); 294 } 295 296 #ifdef MULTIPROCESSOR 297 /* 298 * Count CPUs 299 */ 300 if (ACPI_SUCCESS(acpi_table_find(ACPI_SIG_MADT, (void **)&madt))) { 301 char *end = (char *)madt + le32toh(madt->Header.Length); 302 char *where = (char *)madt + sizeof(ACPI_TABLE_MADT); 303 while (where < end) { 304 ACPI_SUBTABLE_HEADER *subtable = 305 (ACPI_SUBTABLE_HEADER *)where; 306 if (subtable->Type == ACPI_MADT_TYPE_GENERIC_INTERRUPT) 307 arm_cpu_max++; 308 where += subtable->Length; 309 } 310 acpi_table_unmap((ACPI_TABLE_HEADER *)madt); 311 } 312 #endif /* MULTIPROCESSOR */ 313 } 314 315 static void 316 acpi_platform_init_attach_args(struct fdt_attach_args *faa) 317 { 318 extern struct bus_space arm_generic_bs_tag; 319 320 faa->faa_bst = &arm_generic_bs_tag; 321 faa->faa_dmat = &acpi_coherent_dma_tag; 322 } 323 324 static void 325 acpi_platform_device_register(device_t self, void *aux) 326 { 327 #if NCOM > 0 328 prop_dictionary_t prop = device_properties(self); 329 ACPI_STATUS rv; 330 331 if (device_is_a(self, "com")) { 332 ACPI_TABLE_SPCR *spcr; 333 334 rv = acpi_table_find(ACPI_SIG_SPCR, (void **)&spcr); 335 if (ACPI_FAILURE(rv)) { 336 return; 337 } 338 339 if (spcr->SerialPort.SpaceId != ACPI_ADR_SPACE_SYSTEM_MEMORY) { 340 goto spcr_unmap; 341 } 342 if (le64toh(spcr->SerialPort.Address) == 0) { 343 goto spcr_unmap; 344 } 345 if (spcr->InterfaceType != ACPI_DBG2_16550_COMPATIBLE && 346 spcr->InterfaceType != ACPI_DBG2_16550_SUBSET) { 347 goto spcr_unmap; 348 } 349 350 if (device_is_a(device_parent(self), "puc")) { 351 const struct puc_attach_args * const paa = aux; 352 int b, d, f; 353 354 const int s = pci_get_segment(paa->pc); 355 pci_decompose_tag(paa->pc, paa->tag, &b, &d, &f); 356 357 if (spcr->PciSegment == s && spcr->PciBus == b && 358 spcr->PciDevice == d && spcr->PciFunction == f) { 359 prop_dictionary_set_bool(prop, 360 "force_console", true); 361 } 362 } 363 364 if (device_is_a(device_parent(self), "acpi")) { 365 struct acpi_attach_args * const aa = aux; 366 struct acpi_resources res; 367 struct acpi_mem *mem; 368 369 if (ACPI_FAILURE(acpi_resource_parse(self, 370 aa->aa_node->ad_handle, "_CRS", &res, 371 &acpi_resource_parse_ops_quiet))) { 372 goto spcr_unmap; 373 } 374 375 mem = acpi_res_mem(&res, 0); 376 if (mem == NULL) { 377 goto crs_cleanup; 378 } 379 380 if (mem->ar_base == le64toh(spcr->SerialPort.Address)) { 381 prop_dictionary_set_bool(prop, 382 "force_console", true); 383 } 384 385 crs_cleanup: 386 acpi_resource_cleanup(&res); 387 } 388 389 spcr_unmap: 390 acpi_table_unmap((ACPI_TABLE_HEADER *)spcr); 391 } 392 #endif 393 } 394 395 static void 396 acpi_platform_device_register_post_config(device_t self, void *aux) 397 { 398 if (device_is_a(self, "acpi")) { 399 acpisrat_load_uvm(); 400 } 401 } 402 403 static void 404 acpi_platform_reset(void) 405 { 406 if (psci_available()) { 407 psci_system_reset(); 408 } 409 410 #ifdef EFI_RUNTIME 411 arm_efirt_reset(EFI_RESET_COLD); 412 #endif 413 } 414 415 static u_int 416 acpi_platform_uart_freq(void) 417 { 418 return 0; 419 } 420 421 static const struct fdt_platform acpi_platform = { 422 .fp_devmap = acpi_platform_devmap, 423 .fp_bootstrap = acpi_platform_bootstrap, 424 .fp_startup = acpi_platform_startup, 425 .fp_init_attach_args = acpi_platform_init_attach_args, 426 .fp_device_register = acpi_platform_device_register, 427 .fp_device_register_post_config = acpi_platform_device_register_post_config, 428 .fp_reset = acpi_platform_reset, 429 .fp_delay = gtmr_delay, 430 .fp_uart_freq = acpi_platform_uart_freq, 431 }; 432 433 FDT_PLATFORM(acpi, "netbsd,generic-acpi", &acpi_platform); 434
Indexes created Wed Sep 24 02:09:48 GMT 2025