cycv_dwcmmc.c revision 1.1.2.2
1 /* $NetBSD: cycv_dwcmmc.c,v 1.1.2.2 2018/09/30 01:45:37 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2015 Jared D. McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: cycv_dwcmmc.c,v 1.1.2.2 2018/09/30 01:45:37 pgoyette Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/mutex.h> 39 #include <sys/condvar.h> 40 41 #include <dev/ic/dwc_mmc_reg.h> 42 #include <dev/ic/dwc_mmc_var.h> 43 #include <dev/fdt/fdtvar.h> 44 45 #define FIFO_REG 0x200 46 47 static int cycv_dwcmmc_match(device_t, cfdata_t, void *); 48 static void cycv_dwcmmc_attach(device_t, device_t, void *); 49 50 static int cycv_dwcmmc_card_detect(struct dwc_mmc_softc *); 51 52 struct cycv_dwcmmc_softc { 53 struct dwc_mmc_softc sc; 54 struct clk *sc_clk_biu; 55 struct clk *sc_clk_ciu; 56 }; 57 58 CFATTACH_DECL_NEW(cycv_dwcmmc, sizeof(struct dwc_mmc_softc), 59 cycv_dwcmmc_match, cycv_dwcmmc_attach, NULL, NULL); 60 61 static const char * const cycv_dwcmmc_compat[] = { 62 "altr,socfpga-dw-mshc", 63 NULL 64 }; 65 66 static int 67 cycv_dwcmmc_match(device_t parent, cfdata_t cf, void *aux) 68 { 69 struct fdt_attach_args * const faa = aux; 70 71 return of_match_compatible(faa->faa_phandle, cycv_dwcmmc_compat); 72 } 73 74 static void 75 cycv_dwcmmc_attach(device_t parent, device_t self, void *aux) 76 { 77 struct cycv_dwcmmc_softc *esc = device_private(self); 78 struct dwc_mmc_softc *sc = &esc->sc; 79 struct fdt_attach_args * const faa = aux; 80 const int phandle = faa->faa_phandle; 81 char intrstr[128]; 82 bus_addr_t addr; 83 bus_size_t size; 84 u_int fifo_depth; 85 int error; 86 87 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 88 aprint_error(": couldn't get registers\n"); 89 return; 90 } 91 92 if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) { 93 fifo_depth = 64; 94 } 95 96 esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu"); 97 if (esc->sc_clk_biu == NULL) { 98 aprint_error(": couldn't get clock biu\n"); 99 return; 100 } 101 esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu"); 102 if (esc->sc_clk_ciu == NULL) { 103 aprint_error(": couldn't get clock ciu\n"); 104 return; 105 } 106 107 error = clk_enable(esc->sc_clk_biu); 108 if (error) { 109 aprint_error(": couldn't enable clock biu: %d\n", error); 110 return; 111 } 112 error = clk_enable(esc->sc_clk_ciu); 113 if (error) { 114 aprint_error(": couldn't enable clock ciu: %d\n", error); 115 return; 116 } 117 118 sc->sc_dev = self; 119 sc->sc_bst = faa->faa_bst; 120 sc->sc_dmat = faa->faa_dmat; 121 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 122 if (error) { 123 aprint_error(": couldn't map %#llx: %d\n", 124 (uint64_t)addr, error); 125 return; 126 } 127 128 sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu); 129 sc->sc_fifo_depth = fifo_depth; 130 sc->sc_fifo_reg = FIFO_REG; 131 sc->sc_flags = DWC_MMC_F_USE_HOLD_REG | DWC_MMC_F_DMA; 132 133 sc->sc_card_detect = cycv_dwcmmc_card_detect; 134 sc->sc_write_protect = NULL; 135 136 aprint_naive("\n"); 137 aprint_normal(": MHS (%u Hz)\n", sc->sc_clock_freq); 138 139 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 140 aprint_error_dev(self, "failed to decode interrupt\n"); 141 return; 142 } 143 144 if (dwc_mmc_init(sc) != 0) 145 return; 146 147 sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0, 148 dwc_mmc_intr, sc); 149 if (sc->sc_ih == NULL) { 150 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 151 intrstr); 152 return; 153 } 154 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 155 } 156 157 static int 158 cycv_dwcmmc_card_detect(struct dwc_mmc_softc *sc) 159 { 160 /* Card detection is broken on the nanosoc. Pretend it's present. */ 161 162 return 0; 163 } 164
Indexes created Sun Oct 19 02:09:48 GMT 2025