meson_dwmac.c revision 1.3
1 /* $NetBSD: meson_dwmac.c,v 1.3 2019/02/25 19:30:17 jmcneill Exp $ */ 2 3 /*- 4 * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 31 __KERNEL_RCSID(0, "$NetBSD: meson_dwmac.c,v 1.3 2019/02/25 19:30:17 jmcneill Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/bus.h> 35 #include <sys/device.h> 36 #include <sys/intr.h> 37 #include <sys/systm.h> 38 #include <sys/gpio.h> 39 40 #include <net/if.h> 41 #include <net/if_ether.h> 42 #include <net/if_media.h> 43 44 #include <dev/mii/miivar.h> 45 46 #include <dev/ic/dwc_gmac_var.h> 47 #include <dev/ic/dwc_gmac_reg.h> 48 49 #include <dev/fdt/fdtvar.h> 50 51 #define GMAC_TX_RATE_MII 25000000 52 #define GMAC_TX_RATE_RGMII 125000000 53 54 static const char * compatible[] = { 55 "amlogic,meson8b-dwmac", 56 "amlogic,meson-gx-dwmac", 57 NULL 58 }; 59 60 static int 61 meson_dwmac_reset(const int phandle) 62 { 63 struct fdtbus_gpio_pin *pin_reset; 64 const u_int *reset_delay_us; 65 bool reset_active_low; 66 int len, val; 67 68 pin_reset = fdtbus_gpio_acquire(phandle, "snps,reset-gpio", GPIO_PIN_OUTPUT); 69 if (pin_reset == NULL) 70 return 0; 71 72 reset_delay_us = fdtbus_get_prop(phandle, "snps,reset-delays-us", &len); 73 if (reset_delay_us == NULL || len != 12) 74 return ENXIO; 75 76 reset_active_low = of_hasprop(phandle, "snps,reset-active-low"); 77 78 val = reset_active_low ? 1 : 0; 79 80 fdtbus_gpio_write(pin_reset, val); 81 delay(be32toh(reset_delay_us[0])); 82 fdtbus_gpio_write(pin_reset, !val); 83 delay(be32toh(reset_delay_us[1])); 84 fdtbus_gpio_write(pin_reset, val); 85 delay(be32toh(reset_delay_us[2])); 86 87 return 0; 88 } 89 90 static int 91 meson_dwmac_intr(void *arg) 92 { 93 struct dwc_gmac_softc * const sc = arg; 94 95 return dwc_gmac_intr(sc); 96 } 97 98 static int 99 meson_dwmac_match(device_t parent, cfdata_t cf, void *aux) 100 { 101 struct fdt_attach_args * const faa = aux; 102 103 return of_match_compatible(faa->faa_phandle, compatible); 104 } 105 106 static void 107 meson_dwmac_attach(device_t parent, device_t self, void *aux) 108 { 109 struct dwc_gmac_softc * const sc = device_private(self); 110 struct fdt_attach_args * const faa = aux; 111 const int phandle = faa->faa_phandle; 112 struct fdtbus_reset *rst_gmac; 113 struct clk *clk_gmac; 114 const char *phy_mode; 115 char intrstr[128]; 116 bus_addr_t addr; 117 bus_size_t size; 118 119 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 120 aprint_error(": couldn't get registers\n"); 121 return; 122 } 123 124 sc->sc_dev = self; 125 sc->sc_bst = faa->faa_bst; 126 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 127 aprint_error(": couldn't map registers\n"); 128 return; 129 } 130 sc->sc_dmat = faa->faa_dmat; 131 132 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 133 aprint_error(": failed to decode interrupt\n"); 134 return; 135 } 136 137 clk_gmac = fdtbus_clock_get(phandle, "stmmaceth"); 138 if (clk_gmac == NULL) { 139 aprint_error(": couldn't get clocks\n"); 140 return; 141 } 142 143 rst_gmac = fdtbus_reset_get(phandle, "stmmaceth"); 144 145 phy_mode = fdtbus_get_string(phandle, "phy-mode"); 146 if (phy_mode == NULL) { 147 aprint_error(": missing 'phy-mode' property\n"); 148 return; 149 } 150 #if notyet 151 if (strcmp(phy_mode, "mii") == 0) { 152 if (clk_set_rate(clk_gmac_tx, GMAC_TX_RATE_MII) != 0) { 153 aprint_error(": failed to set TX clock rate (MII)\n"); 154 return; 155 } 156 } else if (strcmp(phy_mode, "rgmii") == 0) { 157 if (clk_set_rate(clk_gmac_tx, GMAC_TX_RATE_RGMII) != 0) { 158 aprint_error(": failed to set TX clock rate (RGMII)\n"); 159 return; 160 } 161 } else { 162 aprint_error(": unsupported phy-mode '%s'\n", phy_mode); 163 return; 164 } 165 #endif 166 167 if (clk_enable(clk_gmac) != 0) { 168 aprint_error(": couldn't enable clock\n"); 169 return; 170 } 171 172 if (rst_gmac != NULL && fdtbus_reset_deassert(rst_gmac) != 0) { 173 aprint_error(": couldn't de-assert reset\n"); 174 return; 175 } 176 177 aprint_naive("\n"); 178 aprint_normal(": Gigabit Ethernet Controller\n"); 179 180 if (fdtbus_intr_establish(phandle, 0, IPL_NET, 0, meson_dwmac_intr, sc) == NULL) { 181 aprint_error_dev(self, "failed to establish interrupt on %s\n", intrstr); 182 return; 183 } 184 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 185 186 if (meson_dwmac_reset(phandle) != 0) 187 aprint_error_dev(self, "PHY reset failed\n"); 188 189 dwc_gmac_attach(sc, MII_PHY_ANY, GMAC_MII_CLK_100_150M_DIV62); 190 } 191 192 CFATTACH_DECL_NEW(meson_dwmac, sizeof(struct dwc_gmac_softc), 193 meson_dwmac_match, meson_dwmac_attach, NULL, NULL); 194
Indexes created Wed Oct 01 19:09:53 GMT 2025