meson_resets.c revision 1.1
1/* $NetBSD: meson_resets.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $ */ 2 3/*- 4 * Copyright (c) 2017-2019 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29#include <sys/cdefs.h> 30__KERNEL_RCSID(0, "$NetBSD: meson_resets.c,v 1.1 2019/01/19 20:56:03 jmcneill Exp $"); 31 32#include <sys/param.h> 33#include <sys/bus.h> 34#include <sys/cpu.h> 35#include <sys/device.h> 36 37#include <dev/fdt/fdtvar.h> 38 39#include <dev/clk/clk_backend.h> 40 41#define RESET_REG(index) (((index) / 32) * 4) 42#define RESET_MASK(index) __BIT((index) % 32) 43 44#define LEVEL_OFFSET 0x7c 45 46static const char * compatible[] = { 47 "amlogic,meson8b-reset", 48 NULL 49}; 50 51struct meson_resets_softc { 52 device_t sc_dev; 53 bus_space_tag_t sc_bst; 54 bus_space_handle_t sc_bsh; 55}; 56 57#define RESET_READ(sc, reg) \ 58 bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg)) 59#define RESET_WRITE(sc, reg, val) \ 60 bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val)) 61 62static void * 63meson_resets_acquire(device_t dev, const void *data, size_t len) 64{ 65 if (len != 4) 66 return NULL; 67 68 /* Specifier is an index. Just return it. */ 69 return (void *)(uintptr_t)be32dec(data); 70} 71 72static void 73meson_resets_release(device_t dev, void *priv) 74{ 75} 76 77static int 78meson_resets_assert(device_t dev, void *priv) 79{ 80 struct meson_resets_softc * const sc = device_private(dev); 81 const uintptr_t index = (uintptr_t)priv; 82 83 const bus_size_t reset_reg = RESET_REG(index) + LEVEL_OFFSET; 84 const uint32_t reset_mask = RESET_MASK(index); 85 86 const uint32_t val = RESET_READ(sc, reset_reg); 87 RESET_WRITE(sc, reset_reg, val & ~reset_mask); 88 89 return 0; 90} 91 92static int 93meson_resets_deassert(device_t dev, void *priv) 94{ 95 struct meson_resets_softc * const sc = device_private(dev); 96 const uintptr_t index = (uintptr_t)priv; 97 98 const bus_size_t reset_reg = RESET_REG(index) + LEVEL_OFFSET; 99 const uint32_t reset_mask = RESET_MASK(index); 100 101 const uint32_t val = RESET_READ(sc, reset_reg); 102 RESET_WRITE(sc, reset_reg, val | reset_mask); 103 104 return 0; 105} 106 107static const struct fdtbus_reset_controller_func meson_fdtreset_funcs = { 108 .acquire = meson_resets_acquire, 109 .release = meson_resets_release, 110 .reset_assert = meson_resets_assert, 111 .reset_deassert = meson_resets_deassert, 112}; 113 114static int 115meson_resets_match(device_t parent, cfdata_t cf, void *aux) 116{ 117 struct fdt_attach_args * const faa = aux; 118 119 return of_match_compatible(faa->faa_phandle, compatible); 120} 121 122static void 123meson_resets_attach(device_t parent, device_t self, void *aux) 124{ 125 struct meson_resets_softc * const sc = device_private(self); 126 struct fdt_attach_args * const faa = aux; 127 const int phandle = faa->faa_phandle; 128 bus_addr_t addr; 129 bus_size_t size; 130 131 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 132 aprint_error(": couldn't get registers\n"); 133 return; 134 } 135 136 sc->sc_dev = self; 137 sc->sc_bst = faa->faa_bst; 138 if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) { 139 aprint_error(": couldn't map registers\n"); 140 return; 141 } 142 143 aprint_naive("\n"); 144 aprint_normal("\n"); 145 146 fdtbus_register_reset_controller(sc->sc_dev, phandle, 147 &meson_fdtreset_funcs); 148} 149 150CFATTACH_DECL_NEW(meson_resets, sizeof(struct meson_resets_softc), 151 meson_resets_match, meson_resets_attach, NULL, NULL); 152