11.5Sriastrad/* $NetBSD: meson_rng.c,v 1.5 2022/03/19 11:36:43 riastradh Exp $ */
21.1Sjmcneill
31.1Sjmcneill/*-
41.1Sjmcneill * Copyright (c) 2015-2019 Jared D. McNeill <jmcneill@invisible.ca>
51.1Sjmcneill * All rights reserved.
61.1Sjmcneill *
71.1Sjmcneill * Redistribution and use in source and binary forms, with or without
81.1Sjmcneill * modification, are permitted provided that the following conditions
91.1Sjmcneill * are met:
101.1Sjmcneill * 1. Redistributions of source code must retain the above copyright
111.1Sjmcneill *    notice, this list of conditions and the following disclaimer.
121.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright
131.1Sjmcneill *    notice, this list of conditions and the following disclaimer in the
141.1Sjmcneill *    documentation and/or other materials provided with the distribution.
151.1Sjmcneill *
161.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
171.1Sjmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
181.1Sjmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
191.1Sjmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
201.1Sjmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
211.1Sjmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
221.1Sjmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
231.1Sjmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
241.1Sjmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
251.1Sjmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
261.1Sjmcneill * SUCH DAMAGE.
271.1Sjmcneill */
281.1Sjmcneill
291.1Sjmcneill#include <sys/cdefs.h>
301.5Sriastrad__KERNEL_RCSID(0, "$NetBSD: meson_rng.c,v 1.5 2022/03/19 11:36:43 riastradh Exp $");
311.1Sjmcneill
321.1Sjmcneill#include <sys/param.h>
331.1Sjmcneill#include <sys/bus.h>
341.1Sjmcneill#include <sys/device.h>
351.1Sjmcneill#include <sys/systm.h>
361.1Sjmcneill#include <sys/kernel.h>
371.1Sjmcneill#include <sys/mutex.h>
381.1Sjmcneill#include <sys/rndsource.h>
391.1Sjmcneill
401.1Sjmcneill#include <dev/fdt/fdtvar.h>
411.1Sjmcneill
421.1Sjmcneillstatic int	meson_rng_match(device_t, cfdata_t, void *);
431.1Sjmcneillstatic void	meson_rng_attach(device_t, device_t, void *);
441.1Sjmcneill
451.1Sjmcneillstatic void	meson_rng_get(size_t, void *);
461.1Sjmcneill
471.1Sjmcneillstruct meson_rng_softc {
481.1Sjmcneill	device_t		sc_dev;
491.1Sjmcneill	bus_space_tag_t		sc_bst;
501.1Sjmcneill	bus_space_handle_t	sc_bsh;
511.1Sjmcneill
521.1Sjmcneill	krndsource_t		sc_rndsource;
531.1Sjmcneill};
541.1Sjmcneill
551.4Sthorpejstatic const struct device_compatible_entry compat_data[] = {
561.4Sthorpej	{ .compat = "amlogic,meson-rng" },
571.4Sthorpej	DEVICE_COMPAT_EOL
581.1Sjmcneill};
591.1Sjmcneill
601.1SjmcneillCFATTACH_DECL_NEW(meson_rng, sizeof(struct meson_rng_softc),
611.1Sjmcneill	meson_rng_match, meson_rng_attach, NULL, NULL);
621.1Sjmcneill
631.1Sjmcneillstatic int
641.1Sjmcneillmeson_rng_match(device_t parent, cfdata_t cf, void *aux)
651.1Sjmcneill{
661.1Sjmcneill	struct fdt_attach_args * const faa = aux;
671.1Sjmcneill
681.4Sthorpej	return of_compatible_match(faa->faa_phandle, compat_data);
691.1Sjmcneill}
701.1Sjmcneill
711.1Sjmcneillstatic void
721.1Sjmcneillmeson_rng_attach(device_t parent, device_t self, void *aux)
731.1Sjmcneill{
741.1Sjmcneill	struct meson_rng_softc * const sc = device_private(self);
751.1Sjmcneill	struct fdt_attach_args * const faa = aux;
761.1Sjmcneill	const int phandle = faa->faa_phandle;
771.1Sjmcneill	struct clk *clk;
781.1Sjmcneill	bus_addr_t addr;
791.1Sjmcneill	bus_size_t size;
801.1Sjmcneill
811.1Sjmcneill	if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
821.1Sjmcneill		aprint_error(": couldn't get registers\n");
831.1Sjmcneill		return;
841.1Sjmcneill	}
851.1Sjmcneill
861.1Sjmcneill	sc->sc_dev = self;
871.1Sjmcneill	sc->sc_bst = faa->faa_bst;
881.1Sjmcneill	if (bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh) != 0) {
891.1Sjmcneill		aprint_error(": couldn't map registers\n");
901.1Sjmcneill		return;
911.1Sjmcneill	}
921.1Sjmcneill
931.2Sjmcneill	/* Core clock is optional */
941.1Sjmcneill	clk = fdtbus_clock_get(phandle, "core");
951.2Sjmcneill	if (clk != NULL && clk_enable(clk) != 0) {
961.1Sjmcneill		aprint_error(": couldn't enable core clock\n");
971.1Sjmcneill		return;
981.1Sjmcneill	}
991.1Sjmcneill
1001.1Sjmcneill	aprint_naive("\n");
1011.1Sjmcneill	aprint_normal(": Hardware RNG\n");
1021.1Sjmcneill
1031.1Sjmcneill	rndsource_setcb(&sc->sc_rndsource, meson_rng_get, sc);
1041.1Sjmcneill	rnd_attach_source(&sc->sc_rndsource, device_xname(self), RND_TYPE_RNG,
1051.1Sjmcneill	    RND_FLAG_COLLECT_VALUE|RND_FLAG_HASCB);
1061.1Sjmcneill}
1071.1Sjmcneill
1081.1Sjmcneillstatic void
1091.1Sjmcneillmeson_rng_get(size_t bytes_wanted, void *priv)
1101.1Sjmcneill{
1111.1Sjmcneill	struct meson_rng_softc * const sc = priv;
1121.2Sjmcneill	uint32_t data;
1131.1Sjmcneill
1141.1Sjmcneill	while (bytes_wanted) {
1151.2Sjmcneill		data = bus_space_read_4(sc->sc_bst, sc->sc_bsh, 0);
1161.2Sjmcneill		rnd_add_data_sync(&sc->sc_rndsource, &data, sizeof(data),
1171.1Sjmcneill		    sizeof(data) * NBBY);
1181.1Sjmcneill		bytes_wanted -= MIN(bytes_wanted, sizeof(data));
1191.1Sjmcneill	}
1201.2Sjmcneill	explicit_memset(&data, 0, sizeof(data));
1211.1Sjmcneill}
122