meson_sdhcreg.h revision 1.1.6.2 1 /* $NetBSD: meson_sdhcreg.h,v 1.1.6.2 2019/06/10 22:05:51 christos Exp $ */
2
3 /*-
4 * Copyright (c) 2015 Jared McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #ifndef _MESON_SDHCREG_H
30 #define _MESON_SDHCREG_H
31
32 #define SD_ARGU_REG 0x00
33 #define SD_SEND_REG 0x04
34 #define SD_CNTL_REG 0x08
35 #define SD_STAT_REG 0x0c
36 #define SD_CLKC_REG 0x10
37 #define SD_ADDR_REG 0x14
38 #define SD_PDMA_REG 0x18
39 #define SD_MISC_REG 0x1c
40 #define SD_DATA_REG 0x20
41 #define SD_ICTL_REG 0x24
42 #define SD_ISTA_REG 0x28
43 #define SD_SRST_REG 0x2c
44 #define SD_ESTA_REG 0x30
45 #define SD_ENHC_REG 0x34
46 #define SD_CLK2_REG 0x38
47
48 #define SD_SEND_TOTAL_PACK __BITS(31,16)
49 #define SD_SEND_R1B __BIT(12)
50 #define SD_SEND_DATA_STOP __BIT(11)
51 #define SD_SEND_DATA_DIRECTION __BIT(10)
52 #define SD_SEND_RESPONSE_NO_CRC __BIT(9)
53 #define SD_SEND_RESPONSE_LENGTH __BIT(8)
54 #define SD_SEND_COMMAND_HAS_DATA __BIT(7)
55 #define SD_SEND_COMMAND_HAS_RESP __BIT(6)
56 #define SD_SEND_COMMAND_INDEX __BITS(5,0)
57
58 #define SD_CNTL_TX_ENDIAN_CTRL __BITS(31,29)
59 #define SD_CNTL_DAT0_INT_SEL __BIT(28)
60 #define SD_CNTL_SDIO_IRQ_MODE __BIT(27)
61 #define SD_CNTL_RX_ENDIAN_CTRL __BITS(26,24)
62 #define SD_CNTL_RX_PERIOD __BITS(23,20)
63 #define SD_CNTL_RX_TIMEOUT __BITS(19,13)
64 #define SD_CNTL_PACK_LEN __BITS(12,4)
65 #define SD_CNTL_TX_CRC_CHECK __BIT(3)
66 #define SD_CNTL_DDR_MODE __BIT(2)
67 #define SD_CNTL_DAT_TYPE __BITS(1,0)
68
69 #define SD_STAT_DAT_HI __BITS(23,20)
70 #define SD_STAT_TXFIFO_COUNT __BITS(19,13)
71 #define SD_STAT_RXFIFO_COUNT __BITS(12,6)
72 #define SD_STAT_CMD __BIT(5)
73 #define SD_STAT_DAT_LO __BITS(4,1)
74 #define SD_STAT_BUSY __BIT(0)
75
76 #define SD_CLKC_MEM_PWR __BITS(26,25)
77 #define SD_CLKC_MEM_PWR_ON 0
78 #define SD_CLKC_MEM_PWR_OFF 3
79 #define SD_CLKC_CLK_JIC __BIT(24)
80 #define SD_CLKC_CLK_IN_SEL __BITS(17,16)
81 #define SD_CLKC_CLK_IN_SEL_OSC 0
82 #define SD_CLKC_CLK_IN_SEL_FCLK_DIV4 1
83 #define SD_CLKC_CLK_IN_SEL_FCLK_DIV3 2
84 #define SD_CLKC_CLK_IN_SEL_FCLK_DIV5 3
85 #define SD_CLKC_MOD_CLK_ENABLE __BIT(15)
86 #define SD_CLKC_SD_CLK_ENABLE __BIT(14)
87 #define SD_CLKC_RX_CLK_ENABLE __BIT(13)
88 #define SD_CLKC_TX_CLK_ENABLE __BIT(12)
89 #define SD_CLKC_CLK_DIV __BITS(11,0)
90
91 #define SD_PDMA_TXFIFO_FILL __BIT(31)
92 #define SD_PDMA_RXFIFO_MANUAL_FLUSH __BITS(30,29)
93 #define SD_PDMA_TXFIFO_THRESHOLD __BITS(28,22)
94 #define SD_PDMA_RXFIFO_THRESHOLD __BITS(21,15)
95 #define SD_PDMA_RX_BURST_LEN __BITS(14,10)
96 #define SD_PDMA_TX_BURST_LEN __BITS(9,5)
97 #define SD_PDMA_DMA_URGENT __BIT(4)
98 #define SD_PDMA_PIO_RDRESP __BITS(3,1)
99 #define SD_PDMA_DMA_MODE __BIT(0)
100
101 #define SD_MISC_TXSTART_THRESHOLD __BITS(31,29)
102 #define SD_MISC_STOP_MODE __BIT(28)
103 #define SD_MISC_THREAD_ID __BITS(27,22)
104 #define SD_MISC_BURST_NUMBER __BITS(21,16)
105 #define SD_MISC_WCRC_OK_PATTERN __BITS(9,7)
106 #define SD_MISC_WCRC_ERR_PATTERN __BITS(6,4)
107
108 #define SD_ICTL_SDIO_DAT1 __BITS(17,16)
109
110 #define SD_INT_ADDL_SDIO_DAT1 __BIT(14)
111 #define SD_INT_TXFIFO __BIT(13)
112 #define SD_INT_RXFIFO __BIT(12)
113 #define SD_INT_DMA_DONE __BIT(11)
114 #define SD_INT_SDIO_DAT1 __BIT(10)
115 #define SD_INT_TXFIFO_THRES __BIT(9)
116 #define SD_INT_RXFIFO_THRES __BIT(8)
117 #define SD_INT_DATA_COMPLETE __BIT(7)
118 #define SD_INT_PACK_CRC_ERROR __BIT(6)
119 #define SD_INT_PACK_TIMEOUT __BIT(5)
120 #define SD_INT_PACK_COMPLETE __BIT(4)
121 #define SD_INT_DATA_BIT0_CHG __BIT(3)
122 #define SD_INT_RESP_CRC_ERROR __BIT(2)
123 #define SD_INT_RESP_TIMEOUT __BIT(1)
124 #define SD_INT_RESP_COMPLETE __BIT(0)
125
126 #define SD_INT_TIMEOUT (SD_INT_PACK_TIMEOUT | SD_INT_RESP_TIMEOUT)
127 #define SD_INT_CRC_ERROR (SD_INT_PACK_CRC_ERROR | SD_INT_RESP_CRC_ERROR)
128 #define SD_INT_ERROR (SD_INT_TIMEOUT | SD_INT_CRC_ERROR)
129 #define SD_INT_CLEAR 0x7fff
130
131 #define SD_SRST_DMA_IF __BIT(5)
132 #define SD_SRST_DPHY_TX __BIT(4)
133 #define SD_SRST_DPHY_RX __BIT(3)
134 #define SD_SRST_TX_FIFO __BIT(2)
135 #define SD_SRST_RX_FIFO __BIT(1)
136 #define SD_SRST_MAIN_CTRL __BIT(0)
137
138 #define SD_ENHC_RX_TIMEOUT __BITS(7,0)
139 #define SD_ENHC_SDIO_IRQ_PERIOD __BITS(15,8)
140 #define SD_ENHC_DMA_RX_RESP __BIT(16)
141 #define SD_ENHC_DMA_TX_RESP __BIT(17)
142 #define SD_ENHC_RXFIFO_THRESHOLD __BITS(24,18)
143 #define SD_ENHC_TXFIFO_THRESHOLD __BITS(31,25)
144
145 #define SD_ESTA_BUSY __BITS(13,11) /* XXX ??? */
146
147 #define SD_CLK2_RX_CLK_PHASE __BITS(11,0)
148 #define SD_CLK2_SD_CLK_PHASE __BITS(23,12)
149
150 #endif /* _MESON_SDHCREG_H */
151