meson_uart.c revision 1.8 1 1.8 thorpej /* $NetBSD: meson_uart.c,v 1.8 2025/09/06 22:53:47 thorpej Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2013 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Matt Thomas of 3am Software Foundry.
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.1 jmcneill #include "opt_console.h"
33 1.1 jmcneill #include "locators.h"
34 1.1 jmcneill
35 1.1 jmcneill #include <sys/cdefs.h>
36 1.1 jmcneill
37 1.8 thorpej __KERNEL_RCSID(1, "$NetBSD: meson_uart.c,v 1.8 2025/09/06 22:53:47 thorpej Exp $");
38 1.1 jmcneill
39 1.1 jmcneill #define cn_trap() \
40 1.1 jmcneill do { \
41 1.1 jmcneill console_debugger(); \
42 1.1 jmcneill cn_trapped = 1; \
43 1.1 jmcneill } while (/* CONSTCOND */ 0)
44 1.1 jmcneill
45 1.1 jmcneill #include <sys/param.h>
46 1.1 jmcneill #include <sys/bus.h>
47 1.1 jmcneill #include <sys/device.h>
48 1.1 jmcneill #include <sys/conf.h>
49 1.1 jmcneill #include <sys/intr.h>
50 1.1 jmcneill #include <sys/systm.h>
51 1.1 jmcneill #include <sys/time.h>
52 1.1 jmcneill #include <sys/termios.h>
53 1.1 jmcneill #include <sys/kauth.h>
54 1.1 jmcneill #include <sys/lwp.h>
55 1.1 jmcneill #include <sys/tty.h>
56 1.1 jmcneill
57 1.7 riastrad #include <ddb/db_active.h>
58 1.7 riastrad
59 1.1 jmcneill #include <dev/cons.h>
60 1.1 jmcneill
61 1.1 jmcneill #include <dev/fdt/fdtvar.h>
62 1.8 thorpej #include <dev/fdt/fdt_console.h>
63 1.1 jmcneill
64 1.1 jmcneill #include <arm/amlogic/meson_uart.h>
65 1.1 jmcneill
66 1.1 jmcneill static int meson_uart_match(device_t, cfdata_t, void *);
67 1.1 jmcneill static void meson_uart_attach(device_t, device_t, void *);
68 1.1 jmcneill
69 1.1 jmcneill static int meson_uart_intr(void *);
70 1.3 ryo static void meson_uart_rxsoft(void *);
71 1.1 jmcneill
72 1.1 jmcneill static int meson_uart_cngetc(dev_t);
73 1.1 jmcneill static void meson_uart_cnputc(dev_t, int);
74 1.1 jmcneill static void meson_uart_cnpollc(dev_t, int);
75 1.1 jmcneill
76 1.1 jmcneill static void meson_uart_start(struct tty *);
77 1.1 jmcneill static int meson_uart_param(struct tty *, struct termios *);
78 1.1 jmcneill
79 1.1 jmcneill extern struct cfdriver mesonuart_cd;
80 1.1 jmcneill
81 1.5 thorpej static const struct device_compatible_entry compat_data[] = {
82 1.5 thorpej { .compat = "amlogic,meson6-uart" },
83 1.5 thorpej { .compat = "amlogic,meson8-uart" },
84 1.5 thorpej { .compat = "amlogic,meson8b-uart" },
85 1.5 thorpej { .compat = "amlogic,meson-gx-uart" },
86 1.5 thorpej DEVICE_COMPAT_EOL
87 1.1 jmcneill };
88 1.1 jmcneill
89 1.1 jmcneill struct meson_uart_softc {
90 1.1 jmcneill device_t sc_dev;
91 1.1 jmcneill bus_space_tag_t sc_bst;
92 1.1 jmcneill bus_space_handle_t sc_bsh;
93 1.3 ryo kmutex_t sc_intr_lock;
94 1.1 jmcneill void *sc_ih;
95 1.3 ryo void *sc_sih;
96 1.1 jmcneill
97 1.1 jmcneill struct tty *sc_tty;
98 1.1 jmcneill
99 1.1 jmcneill int sc_ospeed;
100 1.3 ryo unsigned int sc_rbuf_w; /* write ptr of sc_rbuf[] */
101 1.3 ryo unsigned int sc_rbuf_r; /* read ptr of sc_rbuf[] */
102 1.1 jmcneill tcflag_t sc_cflag;
103 1.1 jmcneill
104 1.1 jmcneill u_char sc_buf[1024];
105 1.3 ryo #define MESON_RBUFSZ 128 /* must be 2^n */
106 1.3 ryo u_char sc_rbuf[MESON_RBUFSZ]; /* good enough for sizeof RXFIFO */
107 1.1 jmcneill };
108 1.1 jmcneill
109 1.1 jmcneill static int meson_uart_console_phandle = -1;
110 1.1 jmcneill
111 1.1 jmcneill static struct meson_uart_softc meson_uart_cnsc;
112 1.1 jmcneill
113 1.1 jmcneill static struct cnm_state meson_uart_cnm_state;
114 1.1 jmcneill
115 1.1 jmcneill struct consdev meson_uart_consdev = {
116 1.1 jmcneill .cn_getc = meson_uart_cngetc,
117 1.1 jmcneill .cn_putc = meson_uart_cnputc,
118 1.1 jmcneill .cn_pollc = meson_uart_cnpollc,
119 1.1 jmcneill .cn_dev = NODEV,
120 1.1 jmcneill .cn_pri = CN_NORMAL,
121 1.1 jmcneill };
122 1.1 jmcneill
123 1.1 jmcneill static dev_type_open(meson_uart_open);
124 1.1 jmcneill static dev_type_open(meson_uart_close);
125 1.1 jmcneill static dev_type_read(meson_uart_read);
126 1.1 jmcneill static dev_type_write(meson_uart_write);
127 1.1 jmcneill static dev_type_ioctl(meson_uart_ioctl);
128 1.1 jmcneill static dev_type_tty(meson_uart_tty);
129 1.1 jmcneill static dev_type_poll(meson_uart_poll);
130 1.1 jmcneill static dev_type_stop(meson_uart_stop);
131 1.1 jmcneill
132 1.1 jmcneill const struct cdevsw mesonuart_cdevsw = {
133 1.1 jmcneill .d_open = meson_uart_open,
134 1.1 jmcneill .d_close = meson_uart_close,
135 1.1 jmcneill .d_read = meson_uart_read,
136 1.1 jmcneill .d_write = meson_uart_write,
137 1.1 jmcneill .d_ioctl = meson_uart_ioctl,
138 1.1 jmcneill .d_stop = meson_uart_stop,
139 1.1 jmcneill .d_tty = meson_uart_tty,
140 1.1 jmcneill .d_poll = meson_uart_poll,
141 1.1 jmcneill .d_mmap = nommap,
142 1.1 jmcneill .d_kqfilter = ttykqfilter,
143 1.1 jmcneill .d_discard = nodiscard,
144 1.1 jmcneill .d_flag = D_TTY
145 1.1 jmcneill };
146 1.1 jmcneill
147 1.1 jmcneill static int meson_uart_cmajor = -1;
148 1.1 jmcneill
149 1.1 jmcneill CFATTACH_DECL_NEW(meson_uart, sizeof(struct meson_uart_softc),
150 1.1 jmcneill meson_uart_match, meson_uart_attach, NULL, NULL);
151 1.1 jmcneill
152 1.1 jmcneill static int
153 1.1 jmcneill meson_uart_match(device_t parent, cfdata_t cf, void *aux)
154 1.1 jmcneill {
155 1.1 jmcneill struct fdt_attach_args * const faa = aux;
156 1.1 jmcneill
157 1.5 thorpej return of_compatible_match(faa->faa_phandle, compat_data);
158 1.1 jmcneill }
159 1.1 jmcneill
160 1.1 jmcneill static void
161 1.1 jmcneill meson_uart_attach(device_t parent, device_t self, void *aux)
162 1.1 jmcneill {
163 1.1 jmcneill struct meson_uart_softc * const sc = device_private(self);
164 1.1 jmcneill struct fdt_attach_args * const faa = aux;
165 1.1 jmcneill const int phandle = faa->faa_phandle;
166 1.1 jmcneill char intrstr[128];
167 1.1 jmcneill bus_addr_t addr;
168 1.1 jmcneill bus_size_t size;
169 1.1 jmcneill struct tty *tp;
170 1.1 jmcneill int major, minor, error;
171 1.1 jmcneill uint32_t misc, control;
172 1.1 jmcneill
173 1.1 jmcneill if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
174 1.1 jmcneill aprint_error(": couldn't get registers\n");
175 1.1 jmcneill return;
176 1.1 jmcneill }
177 1.1 jmcneill
178 1.1 jmcneill sc->sc_dev = self;
179 1.1 jmcneill sc->sc_bst = faa->faa_bst;
180 1.1 jmcneill
181 1.1 jmcneill error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
182 1.1 jmcneill if (error != 0) {
183 1.1 jmcneill aprint_error(": couldn't map registers\n");
184 1.1 jmcneill return;
185 1.1 jmcneill }
186 1.1 jmcneill
187 1.1 jmcneill if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
188 1.1 jmcneill aprint_error(": failed to decode interrupt\n");
189 1.1 jmcneill return;
190 1.1 jmcneill }
191 1.1 jmcneill
192 1.3 ryo mutex_init(&sc->sc_intr_lock, MUTEX_DEFAULT, IPL_SERIAL);
193 1.4 ryo sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_SERIAL,
194 1.4 ryo FDT_INTR_MPSAFE, meson_uart_intr, sc, device_xname(self));
195 1.1 jmcneill if (sc->sc_ih == NULL) {
196 1.1 jmcneill aprint_error(": failed to establish interrupt on %s\n",
197 1.1 jmcneill intrstr);
198 1.1 jmcneill return;
199 1.1 jmcneill }
200 1.1 jmcneill
201 1.3 ryo sc->sc_sih = softint_establish(SOFTINT_SERIAL, meson_uart_rxsoft, sc);
202 1.3 ryo if (sc->sc_sih == NULL) {
203 1.3 ryo aprint_error(": failed to establish softint\n");
204 1.3 ryo return;
205 1.3 ryo }
206 1.3 ryo
207 1.1 jmcneill if (meson_uart_cmajor == -1) {
208 1.1 jmcneill /* allocate a major number */
209 1.1 jmcneill int bmajor = -1, cmajor = -1;
210 1.1 jmcneill error = devsw_attach("mesonuart", NULL, &bmajor,
211 1.1 jmcneill &mesonuart_cdevsw, &cmajor);
212 1.1 jmcneill if (error) {
213 1.1 jmcneill aprint_error(": couldn't allocate major number\n");
214 1.1 jmcneill return;
215 1.1 jmcneill }
216 1.1 jmcneill meson_uart_cmajor = cmajor;
217 1.1 jmcneill }
218 1.1 jmcneill
219 1.1 jmcneill major = cdevsw_lookup_major(&mesonuart_cdevsw);
220 1.1 jmcneill minor = device_unit(self);
221 1.1 jmcneill
222 1.1 jmcneill tp = sc->sc_tty = tty_alloc();
223 1.1 jmcneill tp->t_oproc = meson_uart_start;
224 1.1 jmcneill tp->t_param = meson_uart_param;
225 1.1 jmcneill tp->t_dev = makedev(major, minor);
226 1.1 jmcneill tp->t_sc = sc;
227 1.1 jmcneill tty_attach(tp);
228 1.1 jmcneill
229 1.1 jmcneill aprint_naive("\n");
230 1.1 jmcneill if (meson_uart_console_phandle == phandle) {
231 1.1 jmcneill cn_tab->cn_dev = tp->t_dev;
232 1.1 jmcneill aprint_normal(": console");
233 1.1 jmcneill }
234 1.1 jmcneill aprint_normal("\n");
235 1.1 jmcneill
236 1.1 jmcneill aprint_normal_dev(self, "interrupting on %s\n", intrstr);
237 1.1 jmcneill
238 1.1 jmcneill misc = bus_space_read_4(sc->sc_bst, sc->sc_bsh, UART_MISC_REG);
239 1.1 jmcneill misc &= ~UART_MISC_TX_IRQ_CNT;
240 1.1 jmcneill misc |= __SHIFTIN(0, UART_MISC_TX_IRQ_CNT);
241 1.1 jmcneill misc &= ~UART_MISC_RX_IRQ_CNT;
242 1.1 jmcneill misc |= __SHIFTIN(1, UART_MISC_RX_IRQ_CNT);
243 1.1 jmcneill bus_space_write_4(sc->sc_bst, sc->sc_bsh, UART_MISC_REG, misc);
244 1.1 jmcneill
245 1.1 jmcneill control = bus_space_read_4(sc->sc_bst, sc->sc_bsh, UART_CONTROL_REG);
246 1.2 jmcneill control &= ~(UART_CONTROL_TX_INT_EN|UART_CONTROL_RX_INT_EN);
247 1.1 jmcneill bus_space_write_4(sc->sc_bst, sc->sc_bsh, UART_CONTROL_REG, control);
248 1.1 jmcneill }
249 1.1 jmcneill
250 1.1 jmcneill static int
251 1.1 jmcneill meson_uart_cngetc(dev_t dev)
252 1.1 jmcneill {
253 1.1 jmcneill bus_space_tag_t bst = meson_uart_cnsc.sc_bst;
254 1.1 jmcneill bus_space_handle_t bsh = meson_uart_cnsc.sc_bsh;
255 1.1 jmcneill uint32_t status;
256 1.1 jmcneill int s, c;
257 1.1 jmcneill
258 1.1 jmcneill s = splserial();
259 1.1 jmcneill
260 1.1 jmcneill status = bus_space_read_4(bst, bsh, UART_STATUS_REG);
261 1.1 jmcneill if (status & UART_STATUS_RX_EMPTY) {
262 1.1 jmcneill splx(s);
263 1.1 jmcneill return -1;
264 1.1 jmcneill }
265 1.1 jmcneill
266 1.6 ryo c = bus_space_read_4(bst, bsh, UART_RFIFO_REG) & 0xff;
267 1.7 riastrad if (!db_active) {
268 1.1 jmcneill int cn_trapped __unused = 0;
269 1.1 jmcneill cn_check_magic(dev, c, meson_uart_cnm_state);
270 1.1 jmcneill }
271 1.1 jmcneill
272 1.1 jmcneill splx(s);
273 1.1 jmcneill
274 1.6 ryo return c;
275 1.1 jmcneill }
276 1.1 jmcneill
277 1.1 jmcneill static void
278 1.1 jmcneill meson_uart_cnputc(dev_t dev, int c)
279 1.1 jmcneill {
280 1.1 jmcneill bus_space_tag_t bst = meson_uart_cnsc.sc_bst;
281 1.1 jmcneill bus_space_handle_t bsh = meson_uart_cnsc.sc_bsh;
282 1.1 jmcneill int s;
283 1.1 jmcneill
284 1.1 jmcneill s = splserial();
285 1.1 jmcneill
286 1.1 jmcneill while ((bus_space_read_4(bst, bsh, UART_STATUS_REG) & UART_STATUS_TX_FULL) != 0)
287 1.1 jmcneill ;
288 1.1 jmcneill
289 1.1 jmcneill bus_space_write_4(bst, bsh, UART_WFIFO_REG, c);
290 1.1 jmcneill
291 1.1 jmcneill splx(s);
292 1.1 jmcneill }
293 1.1 jmcneill
294 1.1 jmcneill
295 1.1 jmcneill static void
296 1.1 jmcneill meson_uart_cnpollc(dev_t dev, int on)
297 1.1 jmcneill {
298 1.1 jmcneill }
299 1.1 jmcneill
300 1.1 jmcneill static int
301 1.1 jmcneill meson_uart_open(dev_t dev, int flag, int mode, lwp_t *l)
302 1.1 jmcneill {
303 1.1 jmcneill struct meson_uart_softc *sc =
304 1.1 jmcneill device_lookup_private(&mesonuart_cd, minor(dev));
305 1.1 jmcneill struct tty *tp = sc->sc_tty;
306 1.2 jmcneill uint32_t control;
307 1.1 jmcneill
308 1.1 jmcneill if (kauth_authorize_device_tty(l->l_cred,
309 1.1 jmcneill KAUTH_DEVICE_TTY_OPEN, tp) != 0) {
310 1.1 jmcneill return EBUSY;
311 1.1 jmcneill }
312 1.1 jmcneill
313 1.1 jmcneill if ((tp->t_state & TS_ISOPEN) == 0 && tp->t_wopen == 0) {
314 1.1 jmcneill tp->t_dev = dev;
315 1.1 jmcneill ttychars(tp);
316 1.1 jmcneill tp->t_iflag = TTYDEF_IFLAG;
317 1.1 jmcneill tp->t_oflag = TTYDEF_OFLAG;
318 1.1 jmcneill tp->t_cflag = TTYDEF_CFLAG;
319 1.1 jmcneill tp->t_lflag = TTYDEF_LFLAG;
320 1.1 jmcneill tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
321 1.1 jmcneill ttsetwater(tp);
322 1.2 jmcneill
323 1.2 jmcneill control = bus_space_read_4(sc->sc_bst, sc->sc_bsh, UART_CONTROL_REG);
324 1.2 jmcneill control |= UART_CONTROL_RX_INT_EN;
325 1.2 jmcneill bus_space_write_4(sc->sc_bst, sc->sc_bsh, UART_CONTROL_REG, control);
326 1.1 jmcneill }
327 1.1 jmcneill tp->t_state |= TS_CARR_ON;
328 1.1 jmcneill
329 1.1 jmcneill return tp->t_linesw->l_open(dev, tp);
330 1.1 jmcneill }
331 1.1 jmcneill
332 1.1 jmcneill static int
333 1.1 jmcneill meson_uart_close(dev_t dev, int flag, int mode, lwp_t *l)
334 1.1 jmcneill {
335 1.1 jmcneill struct meson_uart_softc *sc =
336 1.1 jmcneill device_lookup_private(&mesonuart_cd, minor(dev));
337 1.1 jmcneill struct tty *tp = sc->sc_tty;
338 1.2 jmcneill uint32_t control;
339 1.1 jmcneill
340 1.1 jmcneill tp->t_linesw->l_close(tp, flag);
341 1.1 jmcneill ttyclose(tp);
342 1.1 jmcneill
343 1.2 jmcneill if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
344 1.2 jmcneill control = bus_space_read_4(sc->sc_bst, sc->sc_bsh, UART_CONTROL_REG);
345 1.2 jmcneill control &= ~UART_CONTROL_RX_INT_EN;
346 1.2 jmcneill bus_space_write_4(sc->sc_bst, sc->sc_bsh, UART_CONTROL_REG, control);
347 1.2 jmcneill }
348 1.2 jmcneill
349 1.1 jmcneill return 0;
350 1.1 jmcneill }
351 1.1 jmcneill
352 1.1 jmcneill static int
353 1.1 jmcneill meson_uart_read(dev_t dev, struct uio *uio, int flag)
354 1.1 jmcneill {
355 1.1 jmcneill struct meson_uart_softc *sc =
356 1.1 jmcneill device_lookup_private(&mesonuart_cd, minor(dev));
357 1.1 jmcneill struct tty *tp = sc->sc_tty;
358 1.1 jmcneill
359 1.1 jmcneill return tp->t_linesw->l_read(tp, uio, flag);
360 1.1 jmcneill }
361 1.1 jmcneill
362 1.1 jmcneill static int
363 1.1 jmcneill meson_uart_write(dev_t dev, struct uio *uio, int flag)
364 1.1 jmcneill {
365 1.1 jmcneill struct meson_uart_softc *sc =
366 1.1 jmcneill device_lookup_private(&mesonuart_cd, minor(dev));
367 1.1 jmcneill struct tty *tp = sc->sc_tty;
368 1.1 jmcneill
369 1.1 jmcneill return tp->t_linesw->l_write(tp, uio, flag);
370 1.1 jmcneill }
371 1.1 jmcneill
372 1.1 jmcneill static int
373 1.1 jmcneill meson_uart_poll(dev_t dev, int events, lwp_t *l)
374 1.1 jmcneill {
375 1.1 jmcneill struct meson_uart_softc *sc =
376 1.1 jmcneill device_lookup_private(&mesonuart_cd, minor(dev));
377 1.1 jmcneill struct tty *tp = sc->sc_tty;
378 1.1 jmcneill
379 1.1 jmcneill return tp->t_linesw->l_poll(tp, events, l);
380 1.1 jmcneill }
381 1.1 jmcneill
382 1.1 jmcneill static int
383 1.1 jmcneill meson_uart_ioctl(dev_t dev, u_long cmd, void *data, int flag, lwp_t *l)
384 1.1 jmcneill {
385 1.1 jmcneill struct meson_uart_softc *sc =
386 1.1 jmcneill device_lookup_private(&mesonuart_cd, minor(dev));
387 1.1 jmcneill struct tty *tp = sc->sc_tty;
388 1.1 jmcneill int error;
389 1.1 jmcneill
390 1.1 jmcneill error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, l);
391 1.1 jmcneill if (error != EPASSTHROUGH)
392 1.1 jmcneill return error;
393 1.1 jmcneill
394 1.1 jmcneill return ttioctl(tp, cmd, data, flag, l);
395 1.1 jmcneill }
396 1.1 jmcneill
397 1.1 jmcneill static struct tty *
398 1.1 jmcneill meson_uart_tty(dev_t dev)
399 1.1 jmcneill {
400 1.1 jmcneill struct meson_uart_softc *sc =
401 1.1 jmcneill device_lookup_private(&mesonuart_cd, minor(dev));
402 1.1 jmcneill
403 1.1 jmcneill return sc->sc_tty;
404 1.1 jmcneill }
405 1.1 jmcneill
406 1.1 jmcneill static void
407 1.1 jmcneill meson_uart_stop(struct tty *tp, int flag)
408 1.1 jmcneill {
409 1.1 jmcneill }
410 1.1 jmcneill
411 1.1 jmcneill static void
412 1.1 jmcneill meson_uart_start(struct tty *tp)
413 1.1 jmcneill {
414 1.1 jmcneill struct meson_uart_softc *sc = tp->t_sc;
415 1.1 jmcneill u_char *p = sc->sc_buf;
416 1.1 jmcneill int s, brem;
417 1.1 jmcneill
418 1.1 jmcneill s = spltty();
419 1.1 jmcneill
420 1.1 jmcneill if (tp->t_state & (TS_TTSTOP | TS_BUSY | TS_TIMEOUT)) {
421 1.1 jmcneill splx(s);
422 1.1 jmcneill return;
423 1.1 jmcneill }
424 1.1 jmcneill tp->t_state |= TS_BUSY;
425 1.1 jmcneill
426 1.1 jmcneill splx(s);
427 1.1 jmcneill
428 1.1 jmcneill for (brem = q_to_b(&tp->t_outq, sc->sc_buf, sizeof(sc->sc_buf));
429 1.1 jmcneill brem > 0;
430 1.1 jmcneill brem--, p++) {
431 1.1 jmcneill while ((bus_space_read_4(sc->sc_bst, sc->sc_bsh,
432 1.1 jmcneill UART_STATUS_REG) & UART_STATUS_TX_FULL) != 0)
433 1.1 jmcneill ;
434 1.1 jmcneill
435 1.1 jmcneill bus_space_write_4(sc->sc_bst, sc->sc_bsh,
436 1.1 jmcneill UART_WFIFO_REG, *p);
437 1.1 jmcneill }
438 1.1 jmcneill
439 1.1 jmcneill s = spltty();
440 1.1 jmcneill tp->t_state &= ~TS_BUSY;
441 1.1 jmcneill if (ttypull(tp)) {
442 1.1 jmcneill tp->t_state |= TS_TIMEOUT;
443 1.1 jmcneill callout_schedule(&tp->t_rstrt_ch, 1);
444 1.1 jmcneill }
445 1.1 jmcneill splx(s);
446 1.1 jmcneill }
447 1.1 jmcneill
448 1.1 jmcneill static int
449 1.1 jmcneill meson_uart_param(struct tty *tp, struct termios *t)
450 1.1 jmcneill {
451 1.1 jmcneill
452 1.1 jmcneill tp->t_ispeed = t->c_ispeed;
453 1.1 jmcneill tp->t_ospeed = t->c_ospeed;
454 1.1 jmcneill tp->t_cflag = t->c_cflag;
455 1.1 jmcneill
456 1.1 jmcneill return 0;
457 1.1 jmcneill }
458 1.1 jmcneill
459 1.1 jmcneill static int
460 1.1 jmcneill meson_uart_intr(void *priv)
461 1.1 jmcneill {
462 1.1 jmcneill struct meson_uart_softc *sc = priv;
463 1.1 jmcneill struct tty *tp = sc->sc_tty;
464 1.1 jmcneill uint32_t status, c;
465 1.1 jmcneill
466 1.3 ryo mutex_spin_enter(&sc->sc_intr_lock);
467 1.1 jmcneill for (;;) {
468 1.1 jmcneill int cn_trapped = 0;
469 1.1 jmcneill status = bus_space_read_4(sc->sc_bst, sc->sc_bsh,
470 1.1 jmcneill UART_STATUS_REG);
471 1.1 jmcneill if (status & UART_STATUS_RX_EMPTY) {
472 1.1 jmcneill break;
473 1.1 jmcneill }
474 1.1 jmcneill if (status & UART_STATUS_BREAK) {
475 1.1 jmcneill cn_check_magic(tp->t_dev, CNC_BREAK,
476 1.1 jmcneill meson_uart_cnm_state);
477 1.1 jmcneill if (cn_trapped)
478 1.1 jmcneill continue;
479 1.1 jmcneill }
480 1.1 jmcneill
481 1.1 jmcneill c = bus_space_read_4(sc->sc_bst, sc->sc_bsh, UART_RFIFO_REG);
482 1.1 jmcneill cn_check_magic(tp->t_dev, c & 0xff, meson_uart_cnm_state);
483 1.1 jmcneill if (cn_trapped)
484 1.1 jmcneill continue;
485 1.3 ryo
486 1.3 ryo if ((sc->sc_rbuf_w - sc->sc_rbuf_r) >= (MESON_RBUFSZ - 1))
487 1.3 ryo continue;
488 1.3 ryo sc->sc_rbuf[sc->sc_rbuf_w++ & (MESON_RBUFSZ - 1)] = c;
489 1.1 jmcneill }
490 1.3 ryo mutex_spin_exit(&sc->sc_intr_lock);
491 1.3 ryo
492 1.3 ryo if (sc->sc_rbuf_w != sc->sc_rbuf_r)
493 1.3 ryo softint_schedule(sc->sc_sih);
494 1.1 jmcneill
495 1.1 jmcneill return 0;
496 1.1 jmcneill }
497 1.1 jmcneill
498 1.3 ryo static void
499 1.3 ryo meson_uart_rxsoft(void *priv)
500 1.3 ryo {
501 1.3 ryo struct meson_uart_softc *sc = priv;
502 1.3 ryo struct tty *tp = sc->sc_tty;
503 1.3 ryo int c;
504 1.3 ryo
505 1.3 ryo while (sc->sc_rbuf_w != sc->sc_rbuf_r) {
506 1.3 ryo c = sc->sc_rbuf[sc->sc_rbuf_r++ & (MESON_RBUFSZ - 1)];
507 1.3 ryo if (tp->t_linesw->l_rint(c & 0xff, tp) == -1)
508 1.3 ryo break;
509 1.3 ryo }
510 1.3 ryo }
511 1.3 ryo
512 1.1 jmcneill static int
513 1.1 jmcneill meson_uart_console_match(int phandle)
514 1.1 jmcneill {
515 1.5 thorpej return of_compatible_match(phandle, compat_data);
516 1.1 jmcneill }
517 1.1 jmcneill
518 1.1 jmcneill static void
519 1.1 jmcneill meson_uart_console_consinit(struct fdt_attach_args *faa, u_int uart_freq)
520 1.1 jmcneill {
521 1.1 jmcneill struct meson_uart_softc *sc = &meson_uart_cnsc;
522 1.1 jmcneill const int phandle = faa->faa_phandle;
523 1.1 jmcneill bus_addr_t addr;
524 1.1 jmcneill bus_size_t size;
525 1.1 jmcneill int error;
526 1.1 jmcneill
527 1.1 jmcneill fdtbus_get_reg(phandle, 0, &addr, &size);
528 1.1 jmcneill
529 1.1 jmcneill sc->sc_bst = faa->faa_bst;
530 1.1 jmcneill sc->sc_ospeed = fdtbus_get_stdout_speed();
531 1.1 jmcneill if (sc->sc_ospeed < 0)
532 1.1 jmcneill sc->sc_ospeed = 115200;
533 1.1 jmcneill sc->sc_cflag = fdtbus_get_stdout_flags();
534 1.1 jmcneill
535 1.1 jmcneill error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
536 1.1 jmcneill if (error != 0)
537 1.1 jmcneill panic("failed to map console, error = %d", error);
538 1.1 jmcneill
539 1.1 jmcneill cn_tab = &meson_uart_consdev;
540 1.1 jmcneill cn_init_magic(&meson_uart_cnm_state);
541 1.1 jmcneill cn_set_magic("\047\001");
542 1.1 jmcneill
543 1.1 jmcneill meson_uart_console_phandle = phandle;
544 1.1 jmcneill }
545 1.1 jmcneill
546 1.1 jmcneill static const struct fdt_console meson_uart_console = {
547 1.1 jmcneill .match = meson_uart_console_match,
548 1.1 jmcneill .consinit = meson_uart_console_consinit,
549 1.1 jmcneill };
550 1.1 jmcneill
551 1.1 jmcneill FDT_CONSOLE(meson_uart, &meson_uart_console);
552