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mesong12_aoclkc.h revision 1.1 
      1 /* $NetBSD: mesong12_aoclkc.h,v 1.1 2021/01/01 07:21:58 ryo Exp $ */
      2 
      3 /*
      4  * Copyright (c) 2021 Ryo Shimizu <ryo (at) nerv.org>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
     17  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
     20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
     22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
     24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
     25  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #ifndef _MESONG12_AOCLKC_H
     30 #define _MESONG12_AOCLKC_H
     31 
     32 /*
     33  * RESET IDs.
     34  *  The values are matched to those in dt-bindings/reset/g12a-aoclkc.h
     35  */
     36 #define	MESONG12_RESET_AO_IR_IN		0
     37 #define	MESONG12_RESET_AO_UART		1
     38 #define	MESONG12_RESET_AO_I2C_M		2
     39 #define	MESONG12_RESET_AO_I2C_S		3
     40 #define	MESONG12_RESET_AO_SAR_ADC	4
     41 #define	MESONG12_RESET_AO_UART2		5
     42 #define	MESONG12_RESET_AO_IR_OUT	6
     43 
     44 /*
     45  * CLOCK IDs.
     46  *  The values are matched to those in dt-bindings/clock/g12a-clkc.h
     47  */
     48 #define	MESONG12_CLOCK_AO_AHB		0
     49 #define	MESONG12_CLOCK_AO_IR_IN		1
     50 #define	MESONG12_CLOCK_AO_I2C_M0	2
     51 #define	MESONG12_CLOCK_AO_I2C_S0	3
     52 #define	MESONG12_CLOCK_AO_UART		4
     53 #define	MESONG12_CLOCK_AO_PROD_I2C	5
     54 #define	MESONG12_CLOCK_AO_UART2		6
     55 #define	MESONG12_CLOCK_AO_IR_OUT	7
     56 #define	MESONG12_CLOCK_AO_SAR_ADC	8
     57 #define	MESONG12_CLOCK_AO_MAILBOX	9
     58 #define	MESONG12_CLOCK_AO_M3		10
     59 #define	MESONG12_CLOCK_AO_AHB_SRAM	11
     60 #define	MESONG12_CLOCK_AO_RTI		12
     61 #define	MESONG12_CLOCK_AO_M4_FCLK	13
     62 #define	MESONG12_CLOCK_AO_M4_HCLK	14
     63 #define	MESONG12_CLOCK_AO_CLK81		15
     64 #define	MESONG12_CLOCK_AO_SAR_ADC_SEL	16
     65 #define	MESONG12_CLOCK_AO_SAR_ADC_CLK	18
     66 #define	MESONG12_CLOCK_AO_CTS_OSCIN	19
     67 #define	MESONG12_CLOCK_AO_32K		23
     68 #define	MESONG12_CLOCK_AO_CEC		27
     69 #define	MESONG12_CLOCK_AO_CTS_RTC_OSCIN	28
     70 
     71 #endif /* _MESONG12_AOCLKC_H */
     72