mesong12a_pinctrl.c revision 1.1
1 /* $NetBSD: mesong12a_pinctrl.c,v 1.1 2021/01/01 07:21:58 ryo Exp $ */ 2 3 /*- 4 * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: mesong12a_pinctrl.c,v 1.1 2021/01/01 07:21:58 ryo Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/types.h> 34 #include <sys/bus.h> 35 #include <sys/device.h> 36 37 #include <arm/amlogic/meson_pinctrl.h> 38 39 /* CBUS pinmux registers */ 40 #define CBUS_REG(n) ((n) << 2) 41 42 /* 43 * GPIO banks. 44 * The values must match those in dt-bindings/gpio/meson-g12a-gpio.h 45 */ 46 enum { 47 GPIOZ_0 = 0, 48 GPIOZ_1, 49 GPIOZ_2, 50 GPIOZ_3, 51 GPIOZ_4, 52 GPIOZ_5, 53 GPIOZ_6, 54 GPIOZ_7, 55 GPIOZ_8, 56 GPIOZ_9, 57 GPIOZ_10, 58 GPIOZ_11, 59 GPIOZ_12, 60 GPIOZ_13, 61 GPIOZ_14, 62 GPIOZ_15, 63 64 GPIOH_0 = 16, 65 GPIOH_1, 66 GPIOH_2, 67 GPIOH_3, 68 GPIOH_4, 69 GPIOH_5, 70 GPIOH_6, 71 GPIOH_7, 72 GPIOH_8, 73 74 BOOT_0 = 25, 75 BOOT_1, 76 BOOT_2, 77 BOOT_3, 78 BOOT_4, 79 BOOT_5, 80 BOOT_6, 81 BOOT_7, 82 BOOT_8, 83 BOOT_9, 84 BOOT_10, 85 BOOT_11, 86 BOOT_12, 87 BOOT_13, 88 BOOT_14, 89 BOOT_15, 90 91 GPIOC_0 = 41, 92 GPIOC_1, 93 GPIOC_2, 94 GPIOC_3, 95 GPIOC_4, 96 GPIOC_5, 97 GPIOC_6, 98 GPIOC_7, 99 100 GPIOA_0 = 49, 101 GPIOA_1, 102 GPIOA_2, 103 GPIOA_3, 104 GPIOA_4, 105 GPIOA_5, 106 GPIOA_6, 107 GPIOA_7, 108 GPIOA_8, 109 GPIOA_9, 110 GPIOA_10, 111 GPIOA_11, 112 GPIOA_12, 113 GPIOA_13, 114 GPIOA_14, 115 GPIOA_15, 116 117 GPIOX_0 = 65, 118 GPIOX_1, 119 GPIOX_2, 120 GPIOX_3, 121 GPIOX_4, 122 GPIOX_5, 123 GPIOX_6, 124 GPIOX_7, 125 GPIOX_8, 126 GPIOX_9, 127 GPIOX_10, 128 GPIOX_11, 129 GPIOX_12, 130 GPIOX_13, 131 GPIOX_14, 132 GPIOX_15, 133 GPIOX_16, 134 GPIOX_17, 135 GPIOX_18, 136 GPIOX_19, 137 138 GPIOAO_0 = 0, 139 GPIOAO_1, 140 GPIOAO_2, 141 GPIOAO_3, 142 GPIOAO_4, 143 GPIOAO_5, 144 GPIOAO_6, 145 GPIOAO_7, 146 GPIOAO_8, 147 GPIOAO_9, 148 GPIOAO_10, 149 GPIOAO_11, 150 GPIOE_0 = 12, 151 GPIOE_1, 152 GPIOE_2, 153 }; 154 155 #define CBUS_GPIO(_id, _off, _bit) \ 156 [_id] = { \ 157 .id = (_id), \ 158 .name = __STRING(_id), \ 159 .oen = { \ 160 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 161 .reg = CBUS_REG((_off) * 3 + 0), \ 162 .mask = __BIT(_bit) \ 163 }, \ 164 .out = { \ 165 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 166 .reg = CBUS_REG((_off) * 3 + 1), \ 167 .mask = __BIT(_bit) \ 168 }, \ 169 .in = { \ 170 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 171 .reg = CBUS_REG((_off) * 3 + 2), \ 172 .mask = __BIT(_bit) \ 173 }, \ 174 .pupden = { \ 175 .type = MESON_PINCTRL_REGTYPE_PULL_ENABLE, \ 176 .reg = CBUS_REG(_off), \ 177 .mask = __BIT(_bit) \ 178 }, \ 179 .pupd = { \ 180 .type = MESON_PINCTRL_REGTYPE_PULL, \ 181 .reg = CBUS_REG(_off), \ 182 .mask = __BIT(_bit) \ 183 }, \ 184 } 185 186 static const struct meson_pinctrl_gpio mesong12a_periphs_gpios[] = { 187 /* BOOT */ 188 CBUS_GPIO(BOOT_0, 0, 0), 189 CBUS_GPIO(BOOT_1, 0, 1), 190 CBUS_GPIO(BOOT_2, 0, 2), 191 CBUS_GPIO(BOOT_3, 0, 3), 192 CBUS_GPIO(BOOT_4, 0, 4), 193 CBUS_GPIO(BOOT_5, 0, 5), 194 CBUS_GPIO(BOOT_6, 0, 6), 195 CBUS_GPIO(BOOT_7, 0, 7), 196 CBUS_GPIO(BOOT_8, 0, 8), 197 CBUS_GPIO(BOOT_9, 0, 9), 198 CBUS_GPIO(BOOT_10, 0, 10), 199 CBUS_GPIO(BOOT_11, 0, 11), 200 CBUS_GPIO(BOOT_12, 0, 12), 201 CBUS_GPIO(BOOT_13, 0, 13), 202 CBUS_GPIO(BOOT_14, 0, 14), 203 CBUS_GPIO(BOOT_15, 0, 15), 204 205 /* GPIOC */ 206 CBUS_GPIO(GPIOC_0, 1, 0), 207 CBUS_GPIO(GPIOC_1, 1, 1), 208 CBUS_GPIO(GPIOC_2, 1, 2), 209 CBUS_GPIO(GPIOC_3, 1, 3), 210 CBUS_GPIO(GPIOC_4, 1, 4), 211 CBUS_GPIO(GPIOC_5, 1, 5), 212 CBUS_GPIO(GPIOC_6, 1, 6), 213 CBUS_GPIO(GPIOC_7, 1, 7), 214 215 /* GPIOX */ 216 CBUS_GPIO(GPIOX_0, 2, 0), 217 CBUS_GPIO(GPIOX_1, 2, 1), 218 CBUS_GPIO(GPIOX_2, 2, 2), 219 CBUS_GPIO(GPIOX_3, 2, 3), 220 CBUS_GPIO(GPIOX_4, 2, 4), 221 CBUS_GPIO(GPIOX_5, 2, 5), 222 CBUS_GPIO(GPIOX_6, 2, 6), 223 CBUS_GPIO(GPIOX_7, 2, 7), 224 CBUS_GPIO(GPIOX_8, 2, 8), 225 CBUS_GPIO(GPIOX_9, 2, 9), 226 CBUS_GPIO(GPIOX_10, 2, 10), 227 CBUS_GPIO(GPIOX_11, 2, 11), 228 CBUS_GPIO(GPIOX_12, 2, 12), 229 CBUS_GPIO(GPIOX_13, 2, 13), 230 CBUS_GPIO(GPIOX_14, 2, 14), 231 CBUS_GPIO(GPIOX_15, 2, 15), 232 CBUS_GPIO(GPIOX_16, 2, 16), 233 CBUS_GPIO(GPIOX_17, 2, 17), 234 CBUS_GPIO(GPIOX_18, 2, 18), 235 CBUS_GPIO(GPIOX_19, 2, 19), 236 237 /* GPIOH */ 238 CBUS_GPIO(GPIOH_0, 3, 0), 239 CBUS_GPIO(GPIOH_1, 3, 1), 240 CBUS_GPIO(GPIOH_2, 3, 2), 241 CBUS_GPIO(GPIOH_3, 3, 3), 242 CBUS_GPIO(GPIOH_4, 3, 4), 243 CBUS_GPIO(GPIOH_5, 3, 5), 244 CBUS_GPIO(GPIOH_6, 3, 6), 245 CBUS_GPIO(GPIOH_7, 3, 7), 246 CBUS_GPIO(GPIOH_8, 3, 8), 247 248 /* GPIOZ */ 249 CBUS_GPIO(GPIOZ_0, 4, 0), 250 CBUS_GPIO(GPIOZ_1, 4, 1), 251 CBUS_GPIO(GPIOZ_2, 4, 2), 252 CBUS_GPIO(GPIOZ_3, 4, 3), 253 CBUS_GPIO(GPIOZ_4, 4, 4), 254 CBUS_GPIO(GPIOZ_5, 4, 5), 255 CBUS_GPIO(GPIOZ_6, 4, 6), 256 CBUS_GPIO(GPIOZ_7, 4, 7), 257 CBUS_GPIO(GPIOZ_8, 4, 8), 258 CBUS_GPIO(GPIOZ_9, 4, 9), 259 CBUS_GPIO(GPIOZ_10, 4, 10), 260 CBUS_GPIO(GPIOZ_11, 4, 11), 261 CBUS_GPIO(GPIOZ_12, 4, 12), 262 CBUS_GPIO(GPIOZ_13, 4, 13), 263 CBUS_GPIO(GPIOZ_14, 4, 14), 264 CBUS_GPIO(GPIOZ_15, 4, 15), 265 266 /* GPIOA */ 267 CBUS_GPIO(GPIOA_0, 5, 0), 268 CBUS_GPIO(GPIOA_1, 5, 1), 269 CBUS_GPIO(GPIOA_2, 5, 2), 270 CBUS_GPIO(GPIOA_3, 5, 3), 271 CBUS_GPIO(GPIOA_4, 5, 4), 272 CBUS_GPIO(GPIOA_5, 5, 5), 273 CBUS_GPIO(GPIOA_6, 5, 6), 274 CBUS_GPIO(GPIOA_7, 5, 7), 275 CBUS_GPIO(GPIOA_8, 5, 8), 276 CBUS_GPIO(GPIOA_9, 5, 9), 277 CBUS_GPIO(GPIOA_10, 5, 10), 278 CBUS_GPIO(GPIOA_11, 5, 11), 279 CBUS_GPIO(GPIOA_12, 5, 12), 280 CBUS_GPIO(GPIOA_13, 5, 13), 281 CBUS_GPIO(GPIOA_14, 5, 14), 282 CBUS_GPIO(GPIOA_15, 5, 15), 283 }; 284 285 #define AO_GPIO(_id, _off, _bit) \ 286 [_id] = { \ 287 .id = (_id), \ 288 .name = __STRING(_id), \ 289 .oen = { \ 290 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 291 .reg = CBUS_REG(_off), \ 292 .mask = __BIT(_bit) \ 293 }, \ 294 .out = { \ 295 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 296 .reg = CBUS_REG((_off) + 4), \ 297 .mask = __BIT(_bit) \ 298 }, \ 299 .in = { \ 300 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 301 .reg = CBUS_REG((_off) + 1), \ 302 .mask = __BIT(_bit) \ 303 }, \ 304 .pupden = { \ 305 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 306 .reg = CBUS_REG((_off) + 3), \ 307 .mask = __BIT(_bit) \ 308 }, \ 309 .pupd = { \ 310 .type = MESON_PINCTRL_REGTYPE_GPIO, \ 311 .reg = CBUS_REG((_off) + 2), \ 312 .mask = __BIT(_bit) \ 313 }, \ 314 } 315 316 static const struct meson_pinctrl_gpio mesong12a_aobus_gpios[] = { 317 /* GPIOAO */ 318 AO_GPIO(GPIOAO_0, 0, 0), 319 AO_GPIO(GPIOAO_1, 0, 1), 320 AO_GPIO(GPIOAO_2, 0, 2), 321 AO_GPIO(GPIOAO_3, 0, 3), 322 AO_GPIO(GPIOAO_4, 0, 4), 323 AO_GPIO(GPIOAO_5, 0, 5), 324 AO_GPIO(GPIOAO_6, 0, 6), 325 AO_GPIO(GPIOAO_7, 0, 7), 326 AO_GPIO(GPIOAO_8, 0, 8), 327 AO_GPIO(GPIOAO_9, 0, 9), 328 AO_GPIO(GPIOAO_10, 0, 10), 329 AO_GPIO(GPIOAO_11, 0, 11), 330 331 /* GPIOE */ 332 AO_GPIO(GPIOE_0, 0, 16), 333 AO_GPIO(GPIOE_1, 0, 17), 334 AO_GPIO(GPIOE_2, 0, 18), 335 }; 336 337 #define GPIO_MUX_PINCTRL_GROUP(_name, _reg, _off, _group, _func) \ 338 { .name = _name, .reg = CBUS_REG(_reg), .bit = (_func), \ 339 .bank = { _group }, .nbank = 1, \ 340 .func = (_func), .mask = (0xf << (4 * ((_off) & 7))) } 341 342 static const struct meson_pinctrl_group mesong12a_periphs_groups[] = { 343 /* BOOT (PERIPHS_PIN_MUX_0..1) */ 344 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d0", 0x0, 0, BOOT_0, 1), 345 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d1", 0x0, 1, BOOT_1, 1), 346 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d2", 0x0, 2, BOOT_2, 1), 347 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d3", 0x0, 3, BOOT_3, 1), 348 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d4", 0x0, 4, BOOT_4, 1), 349 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d5", 0x0, 5, BOOT_5, 1), 350 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d6", 0x0, 6, BOOT_6, 1), 351 GPIO_MUX_PINCTRL_GROUP("emmc_nand_d7", 0x0, 7, BOOT_7, 1), 352 GPIO_MUX_PINCTRL_GROUP("emmc_clk", 0x1, 0, BOOT_8, 1), 353 GPIO_MUX_PINCTRL_GROUP("emmc_cmd", 0x1, 2, BOOT_10, 1), 354 GPIO_MUX_PINCTRL_GROUP("emmc_nand_ds", 0x1, 5, BOOT_13, 1), 355 GPIO_MUX_PINCTRL_GROUP("nand_ce0", 0x1, 3, BOOT_11, 2), 356 GPIO_MUX_PINCTRL_GROUP("nand_ale", 0x1, 1, BOOT_9, 2), 357 GPIO_MUX_PINCTRL_GROUP("nand_cle", 0x1, 2, BOOT_10, 2), 358 GPIO_MUX_PINCTRL_GROUP("nand_wen_clk", 0x1, 0, BOOT_8, 2), 359 GPIO_MUX_PINCTRL_GROUP("nand_ren_wr", 0x1, 4, BOOT_12, 2), 360 GPIO_MUX_PINCTRL_GROUP("nand_rb0", 0x1, 6, BOOT_14, 2), 361 GPIO_MUX_PINCTRL_GROUP("nand_ce1", 0x1, 7, BOOT_15, 2), 362 GPIO_MUX_PINCTRL_GROUP("nor_hold", 0x0, 3, BOOT_3, 3), 363 GPIO_MUX_PINCTRL_GROUP("nor_d", 0x0, 4, BOOT_4, 3), 364 GPIO_MUX_PINCTRL_GROUP("nor_q", 0x0, 5, BOOT_5, 3), 365 GPIO_MUX_PINCTRL_GROUP("nor_c", 0x0, 6, BOOT_6, 3), 366 GPIO_MUX_PINCTRL_GROUP("nor_wp", 0x0, 7, BOOT_7, 3), 367 GPIO_MUX_PINCTRL_GROUP("nor_cs", 0x1, 6, BOOT_14, 3), 368 369 /* GPIOZ (PERIPHS_PIN_MUX_6..7) */ 370 GPIO_MUX_PINCTRL_GROUP("sdcard_d0_z", 0x6, 2, GPIOZ_2, 5), 371 GPIO_MUX_PINCTRL_GROUP("sdcard_d1_z", 0x6, 3, GPIOZ_3, 5), 372 GPIO_MUX_PINCTRL_GROUP("sdcard_d2_z", 0x6, 4, GPIOZ_4, 5), 373 GPIO_MUX_PINCTRL_GROUP("sdcard_d3_z", 0x6, 5, GPIOZ_5, 5), 374 GPIO_MUX_PINCTRL_GROUP("sdcard_clk_z", 0x6, 6, GPIOZ_6, 5), 375 GPIO_MUX_PINCTRL_GROUP("sdcard_cmd_z", 0x6, 7, GPIOZ_7, 5), 376 GPIO_MUX_PINCTRL_GROUP("i2c0_sda_z0", 0x6, 0, GPIOZ_0, 4), 377 GPIO_MUX_PINCTRL_GROUP("i2c0_sck_z1", 0x6, 1, GPIOZ_1, 4), 378 GPIO_MUX_PINCTRL_GROUP("i2c0_sda_z7", 0x6, 7, GPIOZ_7, 7), 379 GPIO_MUX_PINCTRL_GROUP("i2c0_sck_z8", 0x7, 0, GPIOZ_8, 7), 380 GPIO_MUX_PINCTRL_GROUP("i2c2_sda_z", 0x7, 6, GPIOZ_14, 3), 381 GPIO_MUX_PINCTRL_GROUP("i2c2_sck_z", 0x7, 7, GPIOZ_15, 3), 382 GPIO_MUX_PINCTRL_GROUP("iso7816_clk_z", 0x6, 0, GPIOZ_0, 3), 383 GPIO_MUX_PINCTRL_GROUP("iso7816_data_z", 0x6, 1, GPIOZ_1, 3), 384 GPIO_MUX_PINCTRL_GROUP("eth_mdio", 0x6, 0, GPIOZ_0, 1), 385 GPIO_MUX_PINCTRL_GROUP("eth_mdc", 0x6, 1, GPIOZ_1, 1), 386 GPIO_MUX_PINCTRL_GROUP("eth_rgmii_rx_clk", 0x6, 2, GPIOZ_2, 1), 387 GPIO_MUX_PINCTRL_GROUP("eth_rx_dv", 0x6, 3, GPIOZ_3, 1), 388 GPIO_MUX_PINCTRL_GROUP("eth_rxd0", 0x6, 4, GPIOZ_4, 1), 389 GPIO_MUX_PINCTRL_GROUP("eth_rxd1", 0x6, 5, GPIOZ_5, 1), 390 GPIO_MUX_PINCTRL_GROUP("eth_rxd2_rgmii", 0x6, 6, GPIOZ_6, 1), 391 GPIO_MUX_PINCTRL_GROUP("eth_rxd3_rgmii", 0x6, 7, GPIOZ_7, 1), 392 GPIO_MUX_PINCTRL_GROUP("eth_rgmii_tx_clk", 0x7, 0, GPIOZ_8, 1), 393 GPIO_MUX_PINCTRL_GROUP("eth_txen", 0x7, 1, GPIOZ_9, 1), 394 GPIO_MUX_PINCTRL_GROUP("eth_txd0", 0x7, 2, GPIOZ_10, 1), 395 GPIO_MUX_PINCTRL_GROUP("eth_txd1", 0x7, 3, GPIOZ_11, 1), 396 GPIO_MUX_PINCTRL_GROUP("eth_txd2_rgmii", 0x7, 4, GPIOZ_12, 1), 397 GPIO_MUX_PINCTRL_GROUP("eth_txd3_rgmii", 0x7, 5, GPIOZ_13, 1), 398 GPIO_MUX_PINCTRL_GROUP("eth_link_led", 0x7, 6, GPIOZ_14, 1), 399 GPIO_MUX_PINCTRL_GROUP("eth_act_led", 0x7, 7, GPIOZ_15, 1), 400 GPIO_MUX_PINCTRL_GROUP("bt565_a_vs", 0x6, 0, GPIOZ_0, 2), 401 GPIO_MUX_PINCTRL_GROUP("bt565_a_hs", 0x6, 1, GPIOZ_1, 2), 402 GPIO_MUX_PINCTRL_GROUP("bt565_a_clk", 0x6, 3, GPIOZ_3, 2), 403 GPIO_MUX_PINCTRL_GROUP("bt565_a_din0", 0x6, 4, GPIOZ_4, 2), 404 GPIO_MUX_PINCTRL_GROUP("bt565_a_din1", 0x6, 5, GPIOZ_5, 2), 405 GPIO_MUX_PINCTRL_GROUP("bt565_a_din2", 0x6, 6, GPIOZ_6, 2), 406 GPIO_MUX_PINCTRL_GROUP("bt565_a_din3", 0x6, 7, GPIOZ_7, 2), 407 GPIO_MUX_PINCTRL_GROUP("bt565_a_din4", 0x7, 0, GPIOZ_8, 2), 408 GPIO_MUX_PINCTRL_GROUP("bt565_a_din5", 0x7, 1, GPIOZ_9, 2), 409 GPIO_MUX_PINCTRL_GROUP("bt565_a_din6", 0x7, 2, GPIOZ_10, 2), 410 GPIO_MUX_PINCTRL_GROUP("bt565_a_din7", 0x7, 3, GPIOZ_11, 2), 411 GPIO_MUX_PINCTRL_GROUP("tsin_b_valid_z", 0x6, 2, GPIOZ_2, 3), 412 GPIO_MUX_PINCTRL_GROUP("tsin_b_sop_z", 0x6, 3, GPIOZ_3, 3), 413 GPIO_MUX_PINCTRL_GROUP("tsin_b_din0_z", 0x6, 4, GPIOZ_4, 3), 414 GPIO_MUX_PINCTRL_GROUP("tsin_b_clk_z", 0x6, 5, GPIOZ_5, 3), 415 GPIO_MUX_PINCTRL_GROUP("tsin_b_fail", 0x6, 6, GPIOZ_6, 3), 416 GPIO_MUX_PINCTRL_GROUP("tsin_b_din1", 0x6, 7, GPIOZ_7, 3), 417 GPIO_MUX_PINCTRL_GROUP("tsin_b_din2", 0x7, 0, GPIOZ_8, 3), 418 GPIO_MUX_PINCTRL_GROUP("tsin_b_din3", 0x7, 1, GPIOZ_9, 3), 419 GPIO_MUX_PINCTRL_GROUP("tsin_b_din4", 0x7, 2, GPIOZ_10, 3), 420 GPIO_MUX_PINCTRL_GROUP("tsin_b_din5", 0x7, 3, GPIOZ_11, 3), 421 GPIO_MUX_PINCTRL_GROUP("tsin_b_din6", 0x7, 4, GPIOZ_12, 3), 422 GPIO_MUX_PINCTRL_GROUP("tsin_b_din7", 0x7, 5, GPIOZ_13, 3), 423 GPIO_MUX_PINCTRL_GROUP("pdm_din0_z", 0x6, 2, GPIOZ_2, 7), 424 GPIO_MUX_PINCTRL_GROUP("pdm_din1_z", 0x6, 3, GPIOZ_3, 7), 425 GPIO_MUX_PINCTRL_GROUP("pdm_din2_z", 0x6, 4, GPIOZ_4, 7), 426 GPIO_MUX_PINCTRL_GROUP("pdm_din3_z", 0x6, 5, GPIOZ_5, 7), 427 GPIO_MUX_PINCTRL_GROUP("pdm_dclk_z", 0x6, 6, GPIOZ_6, 7), 428 GPIO_MUX_PINCTRL_GROUP("tdm_c_slv_sclk_z", 0x6, 7, GPIOZ_7, 6), 429 GPIO_MUX_PINCTRL_GROUP("tdm_c_slv_fs_z", 0x6, 6, GPIOZ_6, 6), 430 GPIO_MUX_PINCTRL_GROUP("tdm_c_din0_z", 0x6, 2, GPIOZ_2, 6), 431 GPIO_MUX_PINCTRL_GROUP("tdm_c_din1_z", 0x6, 3, GPIOZ_3, 6), 432 GPIO_MUX_PINCTRL_GROUP("tdm_c_din2_z", 0x6, 4, GPIOZ_4, 6), 433 GPIO_MUX_PINCTRL_GROUP("tdm_c_din3_z", 0x6, 5, GPIOZ_5, 6), 434 GPIO_MUX_PINCTRL_GROUP("tdm_c_sclk_z", 0x6, 7, GPIOZ_7, 4), 435 GPIO_MUX_PINCTRL_GROUP("tdm_c_fs_z", 0x6, 6, GPIOZ_6, 4), 436 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout0_z", 0x6, 2, GPIOZ_2, 4), 437 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout1_z", 0x6, 3, GPIOZ_3, 4), 438 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout2_z", 0x6, 4, GPIOZ_4, 4), 439 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout3_z", 0x6, 5, GPIOZ_5, 4), 440 GPIO_MUX_PINCTRL_GROUP("mclk1_z", 0x7, 0, GPIOZ_8, 4), 441 442 /* GPIOX (PERIPHS_PIN_MUX_3..5) */ 443 GPIO_MUX_PINCTRL_GROUP("sdio_d0", 0x3, 0, GPIOX_0, 1), 444 GPIO_MUX_PINCTRL_GROUP("sdio_d1", 0x3, 1, GPIOX_1, 1), 445 GPIO_MUX_PINCTRL_GROUP("sdio_d2", 0x3, 2, GPIOX_2, 1), 446 GPIO_MUX_PINCTRL_GROUP("sdio_d3", 0x3, 3, GPIOX_3, 1), 447 GPIO_MUX_PINCTRL_GROUP("sdio_clk", 0x3, 4, GPIOX_4, 1), 448 GPIO_MUX_PINCTRL_GROUP("sdio_cmd", 0x3, 5, GPIOX_5, 1), 449 GPIO_MUX_PINCTRL_GROUP("spi0_mosi_x", 0x4, 0, GPIOX_8, 4), 450 GPIO_MUX_PINCTRL_GROUP("spi0_miso_x", 0x4, 1, GPIOX_9, 4), 451 GPIO_MUX_PINCTRL_GROUP("spi0_ss0_x", 0x4, 2, GPIOX_10, 4), 452 GPIO_MUX_PINCTRL_GROUP("spi0_clk_x", 0x4, 3, GPIOX_11, 4), 453 GPIO_MUX_PINCTRL_GROUP("i2c1_sda_x", 0x4, 2, GPIOX_10, 5), 454 GPIO_MUX_PINCTRL_GROUP("i2c1_sck_x", 0x4, 3, GPIOX_11, 5), 455 GPIO_MUX_PINCTRL_GROUP("i2c2_sda_x", 0x5, 1, GPIOX_17, 1), 456 GPIO_MUX_PINCTRL_GROUP("i2c2_sck_x", 0x5, 2, GPIOX_18, 1), 457 GPIO_MUX_PINCTRL_GROUP("uart_a_tx", 0x4, 4, GPIOX_12, 1), 458 GPIO_MUX_PINCTRL_GROUP("uart_a_rx", 0x4, 5, GPIOX_13, 1), 459 GPIO_MUX_PINCTRL_GROUP("uart_a_cts", 0x4, 6, GPIOX_14, 1), 460 GPIO_MUX_PINCTRL_GROUP("uart_a_rts", 0x4, 7, GPIOX_15, 1), 461 GPIO_MUX_PINCTRL_GROUP("uart_b_tx", 0x3, 6, GPIOX_6, 2), 462 GPIO_MUX_PINCTRL_GROUP("uart_b_rx", 0x3, 7, GPIOX_7, 2), 463 GPIO_MUX_PINCTRL_GROUP("iso7816_clk_x", 0x4, 0, GPIOX_8, 6), 464 GPIO_MUX_PINCTRL_GROUP("iso7816_data_x", 0x4, 1, GPIOX_9, 6), 465 GPIO_MUX_PINCTRL_GROUP("pwm_a", 0x3, 6, GPIOX_6, 1), 466 GPIO_MUX_PINCTRL_GROUP("pwm_b_x7", 0x3, 7, GPIOX_7, 4), 467 GPIO_MUX_PINCTRL_GROUP("pwm_b_x19", 0x5, 3, GPIOX_19, 1), 468 GPIO_MUX_PINCTRL_GROUP("pwm_c_x5", 0x3, 5, GPIOX_5, 4), 469 GPIO_MUX_PINCTRL_GROUP("pwm_c_x8", 0x4, 0, GPIOX_8, 5), 470 GPIO_MUX_PINCTRL_GROUP("pwm_d_x3", 0x3, 3, GPIOX_3, 4), 471 GPIO_MUX_PINCTRL_GROUP("pwm_d_x6", 0x3, 6, GPIOX_6, 4), 472 GPIO_MUX_PINCTRL_GROUP("pwm_e", 0x5, 0, GPIOX_16, 1), 473 GPIO_MUX_PINCTRL_GROUP("pwm_f_x", 0x3, 7, GPIOX_7, 1), 474 GPIO_MUX_PINCTRL_GROUP("tsin_a_valid", 0x3, 2, GPIOX_2, 3), 475 GPIO_MUX_PINCTRL_GROUP("tsin_a_sop", 0x3, 1, GPIOX_1, 3), 476 GPIO_MUX_PINCTRL_GROUP("tsin_a_din0", 0x3, 0, GPIOX_0, 3), 477 GPIO_MUX_PINCTRL_GROUP("tsin_a_clk", 0x3, 3, GPIOX_3, 3), 478 GPIO_MUX_PINCTRL_GROUP("tsin_b_valid_x", 0x4, 1, GPIOX_9, 3), 479 GPIO_MUX_PINCTRL_GROUP("tsin_b_sop_x", 0x4, 0, GPIOX_8, 3), 480 GPIO_MUX_PINCTRL_GROUP("tsin_b_din0_x", 0x4, 2, GPIOX_10, 3), 481 GPIO_MUX_PINCTRL_GROUP("tsin_b_clk_x", 0x4, 3, GPIOX_11, 3), 482 GPIO_MUX_PINCTRL_GROUP("pdm_din0_x", 0x3, 0, GPIOX_0, 2), 483 GPIO_MUX_PINCTRL_GROUP("pdm_din1_x", 0x3, 1, GPIOX_1, 2), 484 GPIO_MUX_PINCTRL_GROUP("pdm_din2_x", 0x3, 2, GPIOX_2, 2), 485 GPIO_MUX_PINCTRL_GROUP("pdm_din3_x", 0x3, 3, GPIOX_3, 2), 486 GPIO_MUX_PINCTRL_GROUP("pdm_dclk_x", 0x3, 4, GPIOX_4, 2), 487 GPIO_MUX_PINCTRL_GROUP("tdm_a_slv_sclk", 0x4, 3, GPIOX_11, 2), 488 GPIO_MUX_PINCTRL_GROUP("tdm_a_slv_fs", 0x4, 2, GPIOX_10, 2), 489 GPIO_MUX_PINCTRL_GROUP("tdm_a_din0", 0x4, 1, GPIOX_9, 2), 490 GPIO_MUX_PINCTRL_GROUP("tdm_a_din1", 0x4, 0, GPIOX_8, 2), 491 GPIO_MUX_PINCTRL_GROUP("tdm_a_sclk", 0x4, 3, GPIOX_11, 1), 492 GPIO_MUX_PINCTRL_GROUP("tdm_a_fs", 0x4, 2, GPIOX_10, 1), 493 GPIO_MUX_PINCTRL_GROUP("tdm_a_dout0", 0x4, 1, GPIOX_9, 1), 494 GPIO_MUX_PINCTRL_GROUP("tdm_a_dout1", 0x4, 0, GPIOX_8, 1), 495 GPIO_MUX_PINCTRL_GROUP("mclk1_x", 0x3, 5, GPIOX_5, 2), 496 497 /* GPIOC (PERIPHS_PIN_MUX_9) */ 498 GPIO_MUX_PINCTRL_GROUP("sdcard_d0_c", 0x9, 0, GPIOC_0, 1), 499 GPIO_MUX_PINCTRL_GROUP("sdcard_d1_c", 0x9, 1, GPIOC_1, 1), 500 GPIO_MUX_PINCTRL_GROUP("sdcard_d2_c", 0x9, 2, GPIOC_2, 1), 501 GPIO_MUX_PINCTRL_GROUP("sdcard_d3_c", 0x9, 3, GPIOC_3, 1), 502 GPIO_MUX_PINCTRL_GROUP("sdcard_clk_c", 0x9, 4, GPIOC_4, 1), 503 GPIO_MUX_PINCTRL_GROUP("sdcard_cmd_c", 0x9, 5, GPIOC_5, 1), 504 GPIO_MUX_PINCTRL_GROUP("spi0_mosi_c", 0x9, 0, GPIOC_0, 5), 505 GPIO_MUX_PINCTRL_GROUP("spi0_miso_c", 0x9, 1, GPIOC_1, 5), 506 GPIO_MUX_PINCTRL_GROUP("spi0_ss0_c", 0x9, 2, GPIOC_2, 5), 507 GPIO_MUX_PINCTRL_GROUP("spi0_clk_c", 0x9, 3, GPIOC_3, 5), 508 GPIO_MUX_PINCTRL_GROUP("i2c0_sda_c", 0x9, 5, GPIOC_5, 3), 509 GPIO_MUX_PINCTRL_GROUP("i2c0_sck_c", 0x9, 6, GPIOC_6, 3), 510 GPIO_MUX_PINCTRL_GROUP("uart_ao_a_rx_c", 0x9, 2, GPIOC_2, 2), 511 GPIO_MUX_PINCTRL_GROUP("uart_ao_a_tx_c", 0x9, 3, GPIOC_3, 2), 512 GPIO_MUX_PINCTRL_GROUP("iso7816_clk_c", 0x9, 5, GPIOC_5, 5), 513 GPIO_MUX_PINCTRL_GROUP("iso7816_data_c", 0x9, 6, GPIOC_6, 5), 514 GPIO_MUX_PINCTRL_GROUP("pwm_c_c", 0x9, 4, GPIOC_4, 5), 515 GPIO_MUX_PINCTRL_GROUP("jtag_b_tdo", 0x9, 0, GPIOC_0, 2), 516 GPIO_MUX_PINCTRL_GROUP("jtag_b_tdi", 0x9, 1, GPIOC_1, 2), 517 GPIO_MUX_PINCTRL_GROUP("jtag_b_clk", 0x9, 4, GPIOC_4, 2), 518 GPIO_MUX_PINCTRL_GROUP("jtag_b_tms", 0x9, 5, GPIOC_5, 2), 519 GPIO_MUX_PINCTRL_GROUP("pdm_din0_c", 0x9, 0, GPIOC_0, 4), 520 GPIO_MUX_PINCTRL_GROUP("pdm_din1_c", 0x9, 1, GPIOC_1, 4), 521 GPIO_MUX_PINCTRL_GROUP("pdm_din2_c", 0x9, 2, GPIOC_2, 4), 522 GPIO_MUX_PINCTRL_GROUP("pdm_din3_c", 0x9, 3, GPIOC_3, 4), 523 GPIO_MUX_PINCTRL_GROUP("pdm_dclk_c", 0x9, 4, GPIOC_4, 4), 524 525 /* GPIOH (PERIPHS_PIN_MUX_B..C) */ 526 GPIO_MUX_PINCTRL_GROUP("spi1_mosi", 0xb, 4, GPIOH_4, 3), 527 GPIO_MUX_PINCTRL_GROUP("spi1_miso", 0xb, 5, GPIOH_5, 3), 528 GPIO_MUX_PINCTRL_GROUP("spi1_ss0", 0xb, 6, GPIOH_6, 3), 529 GPIO_MUX_PINCTRL_GROUP("spi1_clk", 0xb, 7, GPIOH_7, 3), 530 GPIO_MUX_PINCTRL_GROUP("i2c1_sda_h2", 0xb, 2, GPIOH_2, 2), 531 GPIO_MUX_PINCTRL_GROUP("i2c1_sck_h3", 0xb, 3, GPIOH_3, 2), 532 GPIO_MUX_PINCTRL_GROUP("i2c1_sda_h6", 0xb, 6, GPIOH_6, 4), 533 GPIO_MUX_PINCTRL_GROUP("i2c1_sck_h7", 0xb, 7, GPIOH_7, 4), 534 GPIO_MUX_PINCTRL_GROUP("i2c3_sda_h", 0xb, 0, GPIOH_0, 2), 535 GPIO_MUX_PINCTRL_GROUP("i2c3_sck_h", 0xb, 1, GPIOH_1, 2), 536 GPIO_MUX_PINCTRL_GROUP("uart_c_tx", 0xb, 7, GPIOH_7, 2), 537 GPIO_MUX_PINCTRL_GROUP("uart_c_rx", 0xb, 6, GPIOH_6, 2), 538 GPIO_MUX_PINCTRL_GROUP("uart_c_cts", 0xb, 5, GPIOH_5, 2), 539 GPIO_MUX_PINCTRL_GROUP("uart_c_rts", 0xb, 4, GPIOH_4, 2), 540 GPIO_MUX_PINCTRL_GROUP("iso7816_clk_h", 0xb, 6, GPIOH_6, 1), 541 GPIO_MUX_PINCTRL_GROUP("iso7816_data_h", 0xb, 7, GPIOH_7, 1), 542 GPIO_MUX_PINCTRL_GROUP("pwm_f_h", 0xb, 5, GPIOH_5, 4), 543 GPIO_MUX_PINCTRL_GROUP("cec_ao_a_h", 0xb, 3, GPIOH_3, 4), 544 GPIO_MUX_PINCTRL_GROUP("cec_ao_b_h", 0xb, 3, GPIOH_3, 5), 545 GPIO_MUX_PINCTRL_GROUP("hdmitx_sda", 0xb, 0, GPIOH_0, 1), 546 GPIO_MUX_PINCTRL_GROUP("hdmitx_sck", 0xb, 1, GPIOH_1, 1), 547 GPIO_MUX_PINCTRL_GROUP("hdmitx_hpd_in", 0xb, 2, GPIOH_2, 1), 548 GPIO_MUX_PINCTRL_GROUP("spdif_out_h", 0xb, 4, GPIOH_4, 1), 549 GPIO_MUX_PINCTRL_GROUP("spdif_in_h", 0xb, 5, GPIOH_5, 1), 550 GPIO_MUX_PINCTRL_GROUP("tdm_b_din3_h", 0xb, 5, GPIOH_5, 6), 551 GPIO_MUX_PINCTRL_GROUP("tdm_b_dout3_h", 0xb, 5, GPIOH_5, 5), 552 553 /* GPIOA (PERIPHS_PIN_MUX_D..E) */ 554 GPIO_MUX_PINCTRL_GROUP("i2c3_sda_a", 0xe, 6, GPIOA_14, 2), 555 GPIO_MUX_PINCTRL_GROUP("i2c3_sck_a", 0xe, 7, GPIOA_15, 2), 556 GPIO_MUX_PINCTRL_GROUP("pdm_din0_a", 0xe, 0, GPIOA_8, 1), 557 GPIO_MUX_PINCTRL_GROUP("pdm_din1_a", 0xe, 1, GPIOA_9, 1), 558 GPIO_MUX_PINCTRL_GROUP("pdm_din2_a", 0xd, 6, GPIOA_6, 1), 559 GPIO_MUX_PINCTRL_GROUP("pdm_din3_a", 0xd, 5, GPIOA_5, 1), 560 GPIO_MUX_PINCTRL_GROUP("pdm_dclk_a", 0xd, 7, GPIOA_7, 1), 561 GPIO_MUX_PINCTRL_GROUP("spdif_in_a10", 0xe, 2, GPIOA_10, 1), 562 GPIO_MUX_PINCTRL_GROUP("spdif_in_a12", 0xe, 4, GPIOA_12, 1), 563 GPIO_MUX_PINCTRL_GROUP("spdif_out_a11", 0xe, 3, GPIOA_11, 1), 564 GPIO_MUX_PINCTRL_GROUP("spdif_out_a13", 0xe, 5, GPIOA_13, 1), 565 GPIO_MUX_PINCTRL_GROUP("tdm_b_slv_sclk", 0xd, 1, GPIOA_1, 2), 566 GPIO_MUX_PINCTRL_GROUP("tdm_b_slv_fs", 0xd, 2, GPIOA_2, 2), 567 GPIO_MUX_PINCTRL_GROUP("tdm_b_din0", 0xd, 3, GPIOA_3, 2), 568 GPIO_MUX_PINCTRL_GROUP("tdm_b_din1", 0xd, 4, GPIOA_4, 2), 569 GPIO_MUX_PINCTRL_GROUP("tdm_b_din2", 0xd, 5, GPIOA_5, 2), 570 GPIO_MUX_PINCTRL_GROUP("tdm_b_din3_a", 0xd, 6, GPIOA_6, 2), 571 GPIO_MUX_PINCTRL_GROUP("tdm_b_sclk", 0xd, 1, GPIOA_1, 1), 572 GPIO_MUX_PINCTRL_GROUP("tdm_b_fs", 0xd, 2, GPIOA_2, 1), 573 GPIO_MUX_PINCTRL_GROUP("tdm_b_dout0", 0xd, 3, GPIOA_3, 1), 574 GPIO_MUX_PINCTRL_GROUP("tdm_b_dout1", 0xd, 4, GPIOA_4, 1), 575 GPIO_MUX_PINCTRL_GROUP("tdm_b_dout2", 0xd, 5, GPIOA_5, 3), 576 GPIO_MUX_PINCTRL_GROUP("tdm_b_dout3_a", 0xd, 6, GPIOA_6, 3), 577 GPIO_MUX_PINCTRL_GROUP("tdm_c_slv_sclk_a", 0xe, 4, GPIOA_12, 3), 578 GPIO_MUX_PINCTRL_GROUP("tdm_c_slv_fs_a", 0xe, 5, GPIOA_13, 3), 579 GPIO_MUX_PINCTRL_GROUP("tdm_c_din0_a", 0xe, 2, GPIOA_10, 3), 580 GPIO_MUX_PINCTRL_GROUP("tdm_c_din1_a", 0xe, 1, GPIOA_9, 3), 581 GPIO_MUX_PINCTRL_GROUP("tdm_c_din2_a", 0xe, 0, GPIOA_8, 3), 582 GPIO_MUX_PINCTRL_GROUP("tdm_c_din3_a", 0xd, 7, GPIOA_7, 3), 583 GPIO_MUX_PINCTRL_GROUP("tdm_c_sclk_a", 0xe, 4, GPIOA_12, 2), 584 GPIO_MUX_PINCTRL_GROUP("tdm_c_fs_a", 0xe, 5, GPIOA_13, 2), 585 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout0_a", 0xe, 2, GPIOA_10, 2), 586 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout1_a", 0xe, 1, GPIOA_9, 2), 587 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout2_a", 0xe, 0, GPIOA_8, 2), 588 GPIO_MUX_PINCTRL_GROUP("tdm_c_dout3_a", 0xd, 7, GPIOA_7, 2), 589 GPIO_MUX_PINCTRL_GROUP("mclk0_a", 0xd, 0, GPIOA_0, 1), 590 GPIO_MUX_PINCTRL_GROUP("mclk1_a", 0xe, 3, GPIOA_11, 2), 591 }; 592 593 #define AOBUS_MUX_PINCTRL_GROUP(_name, _bit, _group, _func) \ 594 { .name = _name, .reg = CBUS_REG((_bit) / 8), .bit = (_func), \ 595 .bank = { _group }, .nbank = 1, \ 596 .func = (_func), .mask = (0xf << (4 * ((_bit) & 7))) } 597 598 static const struct meson_pinctrl_group mesong12a_aobus_groups[] = { 599 /* GPIOAO and GPIOE (AO_RTI_PINMUX_REG0..1) */ 600 AOBUS_MUX_PINCTRL_GROUP("uart_ao_a_rx", 1, GPIOAO_1, 1), 601 AOBUS_MUX_PINCTRL_GROUP("uart_ao_a_tx", 0, GPIOAO_0, 1), 602 AOBUS_MUX_PINCTRL_GROUP("uart_ao_a_cts", 16, GPIOE_0, 1), 603 AOBUS_MUX_PINCTRL_GROUP("uart_ao_a_rts", 17, GPIOE_1, 1), 604 605 AOBUS_MUX_PINCTRL_GROUP("uart_ao_b_tx_2", 2, GPIOAO_2, 2), 606 AOBUS_MUX_PINCTRL_GROUP("uart_ao_b_rx_3", 3, GPIOAO_3, 2), 607 AOBUS_MUX_PINCTRL_GROUP("uart_ao_b_tx_8", 8, GPIOAO_8, 3), 608 AOBUS_MUX_PINCTRL_GROUP("uart_ao_b_rx_9", 9, GPIOAO_9, 3), 609 AOBUS_MUX_PINCTRL_GROUP("uart_ao_b_cts", 12, GPIOE_0, 2), 610 AOBUS_MUX_PINCTRL_GROUP("uart_ao_b_rts", 13, GPIOE_1, 2), 611 612 AOBUS_MUX_PINCTRL_GROUP("i2c_ao_sck", 2, GPIOAO_2, 1), 613 AOBUS_MUX_PINCTRL_GROUP("i2c_ao_sda", 3, GPIOAO_3, 1), 614 AOBUS_MUX_PINCTRL_GROUP("i2c_ao_sck_e", 12, GPIOE_0, 4), 615 AOBUS_MUX_PINCTRL_GROUP("i2c_ao_sda_e", 13, GPIOE_1, 4), 616 AOBUS_MUX_PINCTRL_GROUP("i2c_ao_slave_sck", 2, GPIOAO_2, 3), 617 AOBUS_MUX_PINCTRL_GROUP("i2c_ao_slave_sda", 3, GPIOAO_3, 3), 618 619 AOBUS_MUX_PINCTRL_GROUP("remote_ao_input", 5, GPIOAO_5, 1), 620 AOBUS_MUX_PINCTRL_GROUP("remote_ao_out", 4, GPIOAO_4, 1), 621 622 AOBUS_MUX_PINCTRL_GROUP("pwm_a_e", 14, GPIOE_2, 3), 623 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_a", 11, GPIOAO_11, 3), 624 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_a_hiz", 11, GPIOAO_11, 2), 625 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_b", 12, GPIOE_0, 3), 626 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_c_4", 4, GPIOAO_4, 3), 627 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_c_hiz", 4, GPIOAO_4, 4), 628 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_c_6", 6, GPIOAO_6, 3), 629 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_d_5", 5, GPIOAO_5, 3), 630 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_d_10", 10, GPIOAO_10, 3), 631 AOBUS_MUX_PINCTRL_GROUP("pwm_ao_d_e", 13, GPIOE_1, 3), 632 633 AOBUS_MUX_PINCTRL_GROUP("jtag_a_tdi", 8, GPIOAO_8, 1), 634 AOBUS_MUX_PINCTRL_GROUP("jtag_a_tdo", 9, GPIOAO_9, 1), 635 AOBUS_MUX_PINCTRL_GROUP("jtag_a_clk", 6, GPIOAO_6, 1), 636 AOBUS_MUX_PINCTRL_GROUP("jtag_a_tms", 7, GPIOAO_7, 1), 637 638 AOBUS_MUX_PINCTRL_GROUP("cec_ao_a", 10, GPIOAO_10, 1), 639 AOBUS_MUX_PINCTRL_GROUP("cec_ao_b", 10, GPIOAO_10, 2), 640 641 AOBUS_MUX_PINCTRL_GROUP("tsin_ao_asop", 6, GPIOAO_6, 4), 642 AOBUS_MUX_PINCTRL_GROUP("tsin_ao_adin0", 7, GPIOAO_7, 4), 643 AOBUS_MUX_PINCTRL_GROUP("tsin_ao_aclk", 8, GPIOAO_8, 4), 644 AOBUS_MUX_PINCTRL_GROUP("tsin_ao_a_valid", 9, GPIOAO_9, 4), 645 646 AOBUS_MUX_PINCTRL_GROUP("spdif_ao_out", 10, GPIOAO_10, 4), 647 648 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_dout0", 4, GPIOAO_4, 5), 649 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_dout1", 10, GPIOAO_10, 5), 650 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_dout2", 6, GPIOAO_6, 5), 651 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_fs", 7, GPIOAO_7, 5), 652 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_sclk", 8, GPIOAO_8, 5), 653 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_din0", 4, GPIOAO_4, 6), 654 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_din1", 10, GPIOAO_10, 6), 655 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_din2", 6, GPIOAO_6, 6), 656 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_slv_fs", 7, GPIOAO_7, 6), 657 AOBUS_MUX_PINCTRL_GROUP("tdm_ao_b_slv_sclk", 8, GPIOAO_8, 6), 658 659 AOBUS_MUX_PINCTRL_GROUP("mclk0_ao", 9, GPIOAO_9, 5), 660 }; 661 662 const struct meson_pinctrl_config mesong12a_periphs_pinctrl_config = { 663 .name = "Meson G12A periphs GPIO", 664 .groups = mesong12a_periphs_groups, 665 .ngroups = __arraycount(mesong12a_periphs_groups), 666 .gpios = mesong12a_periphs_gpios, 667 .ngpios = __arraycount(mesong12a_periphs_gpios), 668 }; 669 670 const struct meson_pinctrl_config mesong12a_aobus_pinctrl_config = { 671 .name = "Meson G12A AO GPIO", 672 .groups = mesong12a_aobus_groups, 673 .ngroups = __arraycount(mesong12a_aobus_groups), 674 .gpios = mesong12a_aobus_gpios, 675 .ngpios = __arraycount(mesong12a_aobus_gpios), 676 }; 677
Indexes created Wed Oct 01 13:09:50 GMT 2025