1 1.3 thorpej /* $NetBSD: mesongxbb_aoclkc.c,v 1.3 2021/01/27 03:10:18 thorpej Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /*- 4 1.1 jmcneill * Copyright (c) 2019 Jared McNeill <jmcneill (at) invisible.ca> 5 1.1 jmcneill * All rights reserved. 6 1.1 jmcneill * 7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without 8 1.1 jmcneill * modification, are permitted provided that the following conditions 9 1.1 jmcneill * are met: 10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright 11 1.1 jmcneill * notice, this list of conditions and the following disclaimer. 12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the 14 1.1 jmcneill * documentation and/or other materials provided with the distribution. 15 1.1 jmcneill * 16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 jmcneill * SUCH DAMAGE. 27 1.1 jmcneill */ 28 1.1 jmcneill 29 1.1 jmcneill #include <sys/cdefs.h> 30 1.1 jmcneill 31 1.3 thorpej __KERNEL_RCSID(1, "$NetBSD: mesongxbb_aoclkc.c,v 1.3 2021/01/27 03:10:18 thorpej Exp $"); 32 1.1 jmcneill 33 1.1 jmcneill #include <sys/param.h> 34 1.1 jmcneill #include <sys/bus.h> 35 1.1 jmcneill #include <sys/device.h> 36 1.1 jmcneill #include <sys/systm.h> 37 1.1 jmcneill 38 1.1 jmcneill #include <dev/fdt/fdtvar.h> 39 1.1 jmcneill 40 1.1 jmcneill #include <arm/amlogic/meson_clk.h> 41 1.1 jmcneill #include <arm/amlogic/mesongxbb_aoclkc.h> 42 1.1 jmcneill 43 1.1 jmcneill #define AO_RTI_GEN_CTNL_REG0 0x40 44 1.1 jmcneill 45 1.1 jmcneill #define GATE_PARENT "mpeg-clk" 46 1.1 jmcneill 47 1.1 jmcneill static int mesongxbb_aoclkc_match(device_t, cfdata_t, void *); 48 1.1 jmcneill static void mesongxbb_aoclkc_attach(device_t, device_t, void *); 49 1.1 jmcneill 50 1.3 thorpej static const struct device_compatible_entry compat_data[] = { 51 1.3 thorpej { .compat = "amlogic,meson-gxbb-aoclkc" }, 52 1.3 thorpej { .compat = "amlogic,meson-gxl-aoclkc" }, 53 1.3 thorpej DEVICE_COMPAT_EOL 54 1.1 jmcneill }; 55 1.1 jmcneill 56 1.1 jmcneill CFATTACH_DECL_NEW(mesongxbb_aoclkc, sizeof(struct meson_clk_softc), 57 1.1 jmcneill mesongxbb_aoclkc_match, mesongxbb_aoclkc_attach, NULL, NULL); 58 1.1 jmcneill 59 1.1 jmcneill static struct meson_clk_reset mesongxbb_aoclkc_resets[] = { 60 1.1 jmcneill MESON_CLK_RESET(MESONGXBB_RESET_AO_REMOTE, AO_RTI_GEN_CTNL_REG0, 16), 61 1.1 jmcneill MESON_CLK_RESET(MESONGXBB_RESET_AO_UART1, AO_RTI_GEN_CTNL_REG0, 17), 62 1.1 jmcneill MESON_CLK_RESET(MESONGXBB_RESET_AO_I2C_MASTER, AO_RTI_GEN_CTNL_REG0, 18), 63 1.1 jmcneill MESON_CLK_RESET(MESONGXBB_RESET_AO_I2C_SLAVE, AO_RTI_GEN_CTNL_REG0, 19), 64 1.1 jmcneill MESON_CLK_RESET(MESONGXBB_RESET_AO_UART2, AO_RTI_GEN_CTNL_REG0, 22), 65 1.1 jmcneill MESON_CLK_RESET(MESONGXBB_RESET_AO_IR_BLASTER, AO_RTI_GEN_CTNL_REG0, 23), 66 1.1 jmcneill }; 67 1.1 jmcneill 68 1.1 jmcneill static struct meson_clk_clk mesongxbb_aoclkc_clks[] = { 69 1.1 jmcneill MESON_CLK_GATE(MESONGXBB_CLOCK_AO_REMOTE, "remote_ao", GATE_PARENT, AO_RTI_GEN_CTNL_REG0, 0), 70 1.1 jmcneill MESON_CLK_GATE(MESONGXBB_CLOCK_AO_I2C_MASTER, "i2c_master_ao", GATE_PARENT, AO_RTI_GEN_CTNL_REG0, 1), 71 1.1 jmcneill MESON_CLK_GATE(MESONGXBB_CLOCK_AO_I2C_SLAVE, "i2c_slave_ao", GATE_PARENT, AO_RTI_GEN_CTNL_REG0, 2), 72 1.1 jmcneill MESON_CLK_GATE(MESONGXBB_CLOCK_AO_UART1, "uart1_ao", GATE_PARENT, AO_RTI_GEN_CTNL_REG0, 3), 73 1.1 jmcneill MESON_CLK_GATE(MESONGXBB_CLOCK_AO_UART2, "uart2_ao", GATE_PARENT, AO_RTI_GEN_CTNL_REG0, 5), 74 1.1 jmcneill MESON_CLK_GATE(MESONGXBB_CLOCK_AO_IR_BLASTER, "ir_blaster_ao", GATE_PARENT, AO_RTI_GEN_CTNL_REG0, 6), 75 1.1 jmcneill }; 76 1.1 jmcneill 77 1.1 jmcneill static int 78 1.1 jmcneill mesongxbb_aoclkc_match(device_t parent, cfdata_t cf, void *aux) 79 1.1 jmcneill { 80 1.1 jmcneill struct fdt_attach_args * const faa = aux; 81 1.1 jmcneill 82 1.3 thorpej return of_compatible_match(faa->faa_phandle, compat_data); 83 1.1 jmcneill } 84 1.1 jmcneill 85 1.1 jmcneill static void 86 1.1 jmcneill mesongxbb_aoclkc_attach(device_t parent, device_t self, void *aux) 87 1.1 jmcneill { 88 1.1 jmcneill struct meson_clk_softc * const sc = device_private(self); 89 1.1 jmcneill struct fdt_attach_args * const faa = aux; 90 1.1 jmcneill 91 1.1 jmcneill sc->sc_dev = self; 92 1.1 jmcneill sc->sc_phandle = faa->faa_phandle; 93 1.1 jmcneill sc->sc_syscon = fdtbus_syscon_lookup(OF_parent(sc->sc_phandle)); 94 1.1 jmcneill if (sc->sc_syscon == NULL) { 95 1.1 jmcneill aprint_error(": couldn't get syscon registers\n"); 96 1.1 jmcneill return; 97 1.1 jmcneill } 98 1.1 jmcneill 99 1.1 jmcneill sc->sc_resets = mesongxbb_aoclkc_resets; 100 1.1 jmcneill sc->sc_nresets = __arraycount(mesongxbb_aoclkc_resets); 101 1.1 jmcneill 102 1.1 jmcneill sc->sc_clks = mesongxbb_aoclkc_clks; 103 1.1 jmcneill sc->sc_nclks = __arraycount(mesongxbb_aoclkc_clks); 104 1.1 jmcneill 105 1.1 jmcneill meson_clk_attach(sc); 106 1.1 jmcneill 107 1.1 jmcneill aprint_naive("\n"); 108 1.2 jmcneill aprint_normal(": Meson GX AO clock controller\n"); 109 1.1 jmcneill 110 1.1 jmcneill meson_clk_print(sc); 111 1.1 jmcneill } 112