arm32_machdep.c revision 1.104 1 /* $NetBSD: arm32_machdep.c,v 1.104 2014/04/11 04:19:47 matt Exp $ */
2
3 /*
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
6 * All rights reserved.
7 *
8 * This code is derived from software written for Brini by Mark Brinicombe
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Mark Brinicombe
21 * for the NetBSD Project.
22 * 4. The name of the company nor the name of the author may be used to
23 * endorse or promote products derived from this software without specific
24 * prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
29 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *
38 * Machine dependent functions for kernel setup
39 *
40 * Created : 17/09/94
41 * Updated : 18/04/01 updated for new wscons
42 */
43
44 #include <sys/cdefs.h>
45 __KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.104 2014/04/11 04:19:47 matt Exp $");
46
47 #include "opt_modular.h"
48 #include "opt_md.h"
49 #include "opt_pmap_debug.h"
50
51 #include <sys/param.h>
52 #include <sys/systm.h>
53 #include <sys/reboot.h>
54 #include <sys/proc.h>
55 #include <sys/kauth.h>
56 #include <sys/kernel.h>
57 #include <sys/mbuf.h>
58 #include <sys/mount.h>
59 #include <sys/buf.h>
60 #include <sys/msgbuf.h>
61 #include <sys/device.h>
62 #include <sys/sysctl.h>
63 #include <sys/cpu.h>
64 #include <sys/intr.h>
65 #include <sys/module.h>
66 #include <sys/atomic.h>
67 #include <sys/xcall.h>
68
69 #include <uvm/uvm_extern.h>
70
71 #include <dev/cons.h>
72 #include <dev/mm.h>
73
74 #include <arm/locore.h>
75
76 #include <arm/arm32/katelib.h>
77 #include <arm/arm32/machdep.h>
78
79 #include <machine/bootconfig.h>
80 #include <machine/pcb.h>
81
82 void (*cpu_reset_address)(void); /* Used by locore */
83 paddr_t cpu_reset_address_paddr; /* Used by locore */
84
85 struct vm_map *phys_map = NULL;
86
87 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE)
88 extern size_t md_root_size; /* Memory disc size */
89 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */
90
91 pv_addr_t kernelstack;
92 pv_addr_t abtstack;
93 pv_addr_t fiqstack;
94 pv_addr_t irqstack;
95 pv_addr_t undstack;
96 pv_addr_t idlestack;
97
98 void * msgbufaddr;
99 extern paddr_t msgbufphys;
100
101 int kernel_debug = 0;
102 int cpu_printfataltraps = 0;
103 int cpu_fpu_present;
104 int cpu_hwdiv_present;
105 int cpu_neon_present;
106 int cpu_simd_present;
107 int cpu_simdex_present;
108 int cpu_umull_present;
109 int cpu_synchprim_present;
110 const char *cpu_arch = "";
111
112 int cpu_instruction_set_attributes[6];
113 int cpu_memory_model_features[4];
114 int cpu_processor_features[2];
115 int cpu_media_and_vfp_features[2];
116
117 /* exported variable to be filled in by the bootloaders */
118 char *booted_kernel;
119
120 /* Prototypes */
121
122 void data_abort_handler(trapframe_t *frame);
123 void prefetch_abort_handler(trapframe_t *frame);
124 extern void configure(void);
125
126 /*
127 * arm32_vector_init:
128 *
129 * Initialize the vector page, and select whether or not to
130 * relocate the vectors.
131 *
132 * NOTE: We expect the vector page to be mapped at its expected
133 * destination.
134 */
135 void
136 arm32_vector_init(vaddr_t va, int which)
137 {
138 #if defined(CPU_ARMV7) || defined(CPU_ARM11) || defined(ARM_HAS_VBAR)
139 /*
140 * If this processor has the security extension, don't bother
141 * to move/map the vector page. Simply point VBAR to the copy
142 * that exists in the .text segment.
143 */
144 #ifndef ARM_HAS_VBAR
145 if (va == ARM_VECTORS_LOW
146 && (armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0) {
147 #endif
148 extern const uint32_t page0rel[];
149 vector_page = (vaddr_t)page0rel;
150 KASSERT((vector_page & 0x1f) == 0);
151 armreg_vbar_write(vector_page);
152 #ifdef VERBOSE_INIT_ARM
153 printf(" vbar=%p", page0rel);
154 #endif
155 cpu_control(CPU_CONTROL_VECRELOC, 0);
156 return;
157 #ifndef ARM_HAS_VBAR
158 }
159 #endif
160 #endif
161 #ifndef ARM_HAS_VBAR
162 if (CPU_IS_PRIMARY(curcpu())) {
163 extern unsigned int page0[], page0_data[];
164 unsigned int *vectors = (int *) va;
165 unsigned int *vectors_data = vectors + (page0_data - page0);
166 int vec;
167
168 /*
169 * Loop through the vectors we're taking over, and copy the
170 * vector's insn and data word.
171 */
172 for (vec = 0; vec < ARM_NVEC; vec++) {
173 if ((which & (1 << vec)) == 0) {
174 /* Don't want to take over this vector. */
175 continue;
176 }
177 vectors[vec] = page0[vec];
178 vectors_data[vec] = page0_data[vec];
179 }
180
181 /* Now sync the vectors. */
182 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
183
184 vector_page = va;
185 }
186
187 if (va == ARM_VECTORS_HIGH) {
188 /*
189 * Assume the MD caller knows what it's doing here, and
190 * really does want the vector page relocated.
191 *
192 * Note: This has to be done here (and not just in
193 * cpu_setup()) because the vector page needs to be
194 * accessible *before* cpu_startup() is called.
195 * Think ddb(9) ...
196 *
197 * NOTE: If the CPU control register is not readable,
198 * this will totally fail! We'll just assume that
199 * any system that has high vector support has a
200 * readable CPU control register, for now. If we
201 * ever encounter one that does not, we'll have to
202 * rethink this.
203 */
204 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
205 }
206 #endif
207 }
208
209 /*
210 * Debug function just to park the CPU
211 */
212
213 void
214 halt(void)
215 {
216 while (1)
217 cpu_sleep(0);
218 }
219
220
221 /* Sync the discs, unmount the filesystems, and adjust the todr */
222
223 void
224 bootsync(void)
225 {
226 static bool bootsyncdone = false;
227
228 if (bootsyncdone) return;
229
230 bootsyncdone = true;
231
232 /* Make sure we can still manage to do things */
233 if (GetCPSR() & I32_bit) {
234 /*
235 * If we get here then boot has been called without RB_NOSYNC
236 * and interrupts were disabled. This means the boot() call
237 * did not come from a user process e.g. shutdown, but must
238 * have come from somewhere in the kernel.
239 */
240 IRQenable;
241 printf("Warning IRQ's disabled during boot()\n");
242 }
243
244 vfs_shutdown();
245
246 resettodr();
247 }
248
249 /*
250 * void cpu_startup(void)
251 *
252 * Machine dependent startup code.
253 *
254 */
255 void
256 cpu_startup(void)
257 {
258 vaddr_t minaddr;
259 vaddr_t maxaddr;
260 char pbuf[9];
261
262 /*
263 * Until we better locking, we have to live under the kernel lock.
264 */
265 //KERNEL_LOCK(1, NULL);
266
267 /* Set the CPU control register */
268 cpu_setup(boot_args);
269
270 #ifndef ARM_HAS_VBAR
271 /* Lock down zero page */
272 vector_page_setprot(VM_PROT_READ);
273 #endif
274
275 /*
276 * Give pmap a chance to set up a few more things now the vm
277 * is initialised
278 */
279 pmap_postinit();
280
281 /*
282 * Initialize error message buffer (at end of core).
283 */
284
285 /* msgbufphys was setup during the secondary boot strap */
286 if (!pmap_extract(pmap_kernel(), (vaddr_t)msgbufaddr, NULL)) {
287 for (u_int loop = 0; loop < btoc(MSGBUFSIZE); ++loop) {
288 pmap_kenter_pa((vaddr_t)msgbufaddr + loop * PAGE_SIZE,
289 msgbufphys + loop * PAGE_SIZE,
290 VM_PROT_READ|VM_PROT_WRITE, 0);
291 }
292 }
293 pmap_update(pmap_kernel());
294 initmsgbuf(msgbufaddr, round_page(MSGBUFSIZE));
295
296 /*
297 * Identify ourselves for the msgbuf (everything printed earlier will
298 * not be buffered).
299 */
300 printf("%s%s", copyright, version);
301
302 format_bytes(pbuf, sizeof(pbuf), arm_ptob(physmem));
303 printf("total memory = %s\n", pbuf);
304
305 minaddr = 0;
306
307 /*
308 * Allocate a submap for physio
309 */
310 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
311 VM_PHYS_SIZE, 0, false, NULL);
312
313 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
314 printf("avail memory = %s\n", pbuf);
315
316 struct lwp * const l = &lwp0;
317 struct pcb * const pcb = lwp_getpcb(l);
318 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP;
319 lwp_settrapframe(l, (struct trapframe *)pcb->pcb_ksp - 1);
320 }
321
322 /*
323 * machine dependent system variables.
324 */
325 static int
326 sysctl_machdep_booted_device(SYSCTLFN_ARGS)
327 {
328 struct sysctlnode node;
329
330 if (booted_device == NULL)
331 return (EOPNOTSUPP);
332
333 node = *rnode;
334 node.sysctl_data = __UNCONST(device_xname(booted_device));
335 node.sysctl_size = strlen(device_xname(booted_device)) + 1;
336 return (sysctl_lookup(SYSCTLFN_CALL(&node)));
337 }
338
339 static int
340 sysctl_machdep_booted_kernel(SYSCTLFN_ARGS)
341 {
342 struct sysctlnode node;
343
344 if (booted_kernel == NULL || booted_kernel[0] == '\0')
345 return (EOPNOTSUPP);
346
347 node = *rnode;
348 node.sysctl_data = booted_kernel;
349 node.sysctl_size = strlen(booted_kernel) + 1;
350 return (sysctl_lookup(SYSCTLFN_CALL(&node)));
351 }
352
353 static int
354 sysctl_machdep_cpu_arch(SYSCTLFN_ARGS)
355 {
356 struct sysctlnode node = *rnode;
357 node.sysctl_data = __UNCONST(cpu_arch);
358 node.sysctl_size = strlen(cpu_arch) + 1;
359 return sysctl_lookup(SYSCTLFN_CALL(&node));
360 }
361
362 static int
363 sysctl_machdep_powersave(SYSCTLFN_ARGS)
364 {
365 struct sysctlnode node = *rnode;
366 int error, newval;
367
368 newval = cpu_do_powersave;
369 node.sysctl_data = &newval;
370 if (cpufuncs.cf_sleep == (void *) cpufunc_nullop)
371 node.sysctl_flags &= ~CTLFLAG_READWRITE;
372 error = sysctl_lookup(SYSCTLFN_CALL(&node));
373 if (error || newp == NULL || newval == cpu_do_powersave)
374 return (error);
375
376 if (newval < 0 || newval > 1)
377 return (EINVAL);
378 cpu_do_powersave = newval;
379
380 return (0);
381 }
382
383 static int
384 sysctl_hw_machine_arch(SYSCTLFN_ARGS)
385 {
386 struct sysctlnode node = *rnode;
387 node.sysctl_data = l->l_proc->p_md.md_march;
388 node.sysctl_size = strlen(l->l_proc->p_md.md_march) + 1;
389 return sysctl_lookup(SYSCTLFN_CALL(&node));
390 }
391
392 SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup")
393 {
394
395 sysctl_createv(clog, 0, NULL, NULL,
396 CTLFLAG_PERMANENT,
397 CTLTYPE_NODE, "machdep", NULL,
398 NULL, 0, NULL, 0,
399 CTL_MACHDEP, CTL_EOL);
400
401 sysctl_createv(clog, 0, NULL, NULL,
402 CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
403 CTLTYPE_INT, "debug", NULL,
404 NULL, 0, &kernel_debug, 0,
405 CTL_MACHDEP, CPU_DEBUG, CTL_EOL);
406 sysctl_createv(clog, 0, NULL, NULL,
407 CTLFLAG_PERMANENT,
408 CTLTYPE_STRING, "booted_device", NULL,
409 sysctl_machdep_booted_device, 0, NULL, 0,
410 CTL_MACHDEP, CPU_BOOTED_DEVICE, CTL_EOL);
411 sysctl_createv(clog, 0, NULL, NULL,
412 CTLFLAG_PERMANENT,
413 CTLTYPE_STRING, "booted_kernel", NULL,
414 sysctl_machdep_booted_kernel, 0, NULL, 0,
415 CTL_MACHDEP, CPU_BOOTED_KERNEL, CTL_EOL);
416 sysctl_createv(clog, 0, NULL, NULL,
417 CTLFLAG_PERMANENT,
418 CTLTYPE_STRUCT, "console_device", NULL,
419 sysctl_consdev, 0, NULL, sizeof(dev_t),
420 CTL_MACHDEP, CPU_CONSDEV, CTL_EOL);
421 sysctl_createv(clog, 0, NULL, NULL,
422 CTLFLAG_PERMANENT,
423 CTLTYPE_STRING, "cpu_arch", NULL,
424 sysctl_machdep_cpu_arch, 0, NULL, 0,
425 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
426 sysctl_createv(clog, 0, NULL, NULL,
427 CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
428 CTLTYPE_INT, "powersave", NULL,
429 sysctl_machdep_powersave, 0, &cpu_do_powersave, 0,
430 CTL_MACHDEP, CPU_POWERSAVE, CTL_EOL);
431 sysctl_createv(clog, 0, NULL, NULL,
432 CTLFLAG_PERMANENT|CTLFLAG_IMMEDIATE,
433 CTLTYPE_INT, "cpu_id", NULL,
434 NULL, curcpu()->ci_arm_cpuid, NULL, 0,
435 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
436 #ifdef FPU_VFP
437 sysctl_createv(clog, 0, NULL, NULL,
438 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
439 CTLTYPE_INT, "fpu_id", NULL,
440 NULL, 0, &cpu_info_store.ci_vfp_id, 0,
441 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
442 #endif
443 sysctl_createv(clog, 0, NULL, NULL,
444 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
445 CTLTYPE_INT, "fpu_present", NULL,
446 NULL, 0, &cpu_fpu_present, 0,
447 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
448 sysctl_createv(clog, 0, NULL, NULL,
449 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
450 CTLTYPE_INT, "hwdiv_present", NULL,
451 NULL, 0, &cpu_hwdiv_present, 0,
452 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
453 sysctl_createv(clog, 0, NULL, NULL,
454 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
455 CTLTYPE_INT, "neon_present", NULL,
456 NULL, 0, &cpu_neon_present, 0,
457 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
458 sysctl_createv(clog, 0, NULL, NULL,
459 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
460 CTLTYPE_STRUCT, "id_isar", NULL,
461 NULL, 0,
462 cpu_instruction_set_attributes,
463 sizeof(cpu_instruction_set_attributes),
464 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
465 sysctl_createv(clog, 0, NULL, NULL,
466 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
467 CTLTYPE_STRUCT, "id_mmfr", NULL,
468 NULL, 0,
469 cpu_memory_model_features,
470 sizeof(cpu_memory_model_features),
471 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
472 sysctl_createv(clog, 0, NULL, NULL,
473 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
474 CTLTYPE_STRUCT, "id_pfr", NULL,
475 NULL, 0,
476 cpu_processor_features,
477 sizeof(cpu_processor_features),
478 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
479 sysctl_createv(clog, 0, NULL, NULL,
480 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
481 CTLTYPE_STRUCT, "id_mvfr", NULL,
482 NULL, 0,
483 cpu_media_and_vfp_features,
484 sizeof(cpu_media_and_vfp_features),
485 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
486 sysctl_createv(clog, 0, NULL, NULL,
487 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
488 CTLTYPE_INT, "simd_present", NULL,
489 NULL, 0, &cpu_simd_present, 0,
490 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
491 sysctl_createv(clog, 0, NULL, NULL,
492 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
493 CTLTYPE_INT, "simdex_present", NULL,
494 NULL, 0, &cpu_simdex_present, 0,
495 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
496 sysctl_createv(clog, 0, NULL, NULL,
497 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
498 CTLTYPE_INT, "synchprim_present", NULL,
499 NULL, 0, &cpu_synchprim_present, 0,
500 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
501 sysctl_createv(clog, 0, NULL, NULL,
502 CTLFLAG_PERMANENT|CTLFLAG_READWRITE,
503 CTLTYPE_INT, "printfataltraps", NULL,
504 NULL, 0, &cpu_printfataltraps, 0,
505 CTL_MACHDEP, CTL_CREATE, CTL_EOL);
506
507
508 /*
509 * We need override the usual CTL_HW HW_MACHINE_ARCH so we
510 * return the right machine_arch based on the running executable.
511 */
512 sysctl_createv(clog, 0, NULL, NULL,
513 CTLFLAG_PERMANENT|CTLFLAG_READONLY,
514 CTLTYPE_STRING, "machine_arch",
515 SYSCTL_DESCR("Machine CPU class"),
516 sysctl_hw_machine_arch, 0, NULL, 0,
517 CTL_HW, HW_MACHINE_ARCH, CTL_EOL);
518 }
519
520 void
521 parse_mi_bootargs(char *args)
522 {
523 int integer;
524
525 if (get_bootconf_option(args, "single", BOOTOPT_TYPE_BOOLEAN, &integer)
526 || get_bootconf_option(args, "-s", BOOTOPT_TYPE_BOOLEAN, &integer))
527 if (integer)
528 boothowto |= RB_SINGLE;
529 if (get_bootconf_option(args, "kdb", BOOTOPT_TYPE_BOOLEAN, &integer)
530 || get_bootconf_option(args, "-k", BOOTOPT_TYPE_BOOLEAN, &integer)
531 || get_bootconf_option(args, "-d", BOOTOPT_TYPE_BOOLEAN, &integer))
532 if (integer)
533 boothowto |= RB_KDB;
534 if (get_bootconf_option(args, "ask", BOOTOPT_TYPE_BOOLEAN, &integer)
535 || get_bootconf_option(args, "-a", BOOTOPT_TYPE_BOOLEAN, &integer))
536 if (integer)
537 boothowto |= RB_ASKNAME;
538
539 #ifdef PMAP_DEBUG
540 if (get_bootconf_option(args, "pmapdebug", BOOTOPT_TYPE_INT, &integer)) {
541 pmap_debug_level = integer;
542 pmap_debug(pmap_debug_level);
543 }
544 #endif /* PMAP_DEBUG */
545
546 /* if (get_bootconf_option(args, "nbuf", BOOTOPT_TYPE_INT, &integer))
547 bufpages = integer;*/
548
549 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE)
550 if (get_bootconf_option(args, "memorydisc", BOOTOPT_TYPE_INT, &integer)
551 || get_bootconf_option(args, "memorydisk", BOOTOPT_TYPE_INT, &integer)) {
552 md_root_size = integer;
553 md_root_size *= 1024;
554 if (md_root_size < 32*1024)
555 md_root_size = 32*1024;
556 if (md_root_size > 2048*1024)
557 md_root_size = 2048*1024;
558 }
559 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */
560
561 if (get_bootconf_option(args, "quiet", BOOTOPT_TYPE_BOOLEAN, &integer)
562 || get_bootconf_option(args, "-q", BOOTOPT_TYPE_BOOLEAN, &integer))
563 if (integer)
564 boothowto |= AB_QUIET;
565 if (get_bootconf_option(args, "verbose", BOOTOPT_TYPE_BOOLEAN, &integer)
566 || get_bootconf_option(args, "-v", BOOTOPT_TYPE_BOOLEAN, &integer))
567 if (integer)
568 boothowto |= AB_VERBOSE;
569 }
570
571 #ifdef __HAVE_FAST_SOFTINTS
572 #if IPL_SOFTSERIAL != IPL_SOFTNET + 1
573 #error IPLs are screwed up
574 #elif IPL_SOFTNET != IPL_SOFTBIO + 1
575 #error IPLs are screwed up
576 #elif IPL_SOFTBIO != IPL_SOFTCLOCK + 1
577 #error IPLs are screwed up
578 #elif !(IPL_SOFTCLOCK > IPL_NONE)
579 #error IPLs are screwed up
580 #elif (IPL_NONE != 0)
581 #error IPLs are screwed up
582 #endif
583
584 #ifndef __HAVE_PIC_FAST_SOFTINTS
585 #define SOFTINT2IPLMAP \
586 (((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \
587 ((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \
588 ((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \
589 ((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4)))
590 #define SOFTINT2IPL(l) ((SOFTINT2IPLMAP >> ((l) * 4)) & 0x0f)
591
592 /*
593 * This returns a mask of softint IPLs that be dispatch at <ipl>
594 * SOFTIPLMASK(IPL_NONE) = 0x0000000f
595 * SOFTIPLMASK(IPL_SOFTCLOCK) = 0x0000000e
596 * SOFTIPLMASK(IPL_SOFTBIO) = 0x0000000c
597 * SOFTIPLMASK(IPL_SOFTNET) = 0x00000008
598 * SOFTIPLMASK(IPL_SOFTSERIAL) = 0x00000000
599 */
600 #define SOFTIPLMASK(ipl) ((0x0f << (ipl)) & 0x0f)
601
602 void softint_switch(lwp_t *, int);
603
604 void
605 softint_trigger(uintptr_t mask)
606 {
607 curcpu()->ci_softints |= mask;
608 }
609
610 void
611 softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep)
612 {
613 lwp_t ** lp = &l->l_cpu->ci_softlwps[level];
614 KASSERT(*lp == NULL || *lp == l);
615 *lp = l;
616 *machdep = 1 << SOFTINT2IPL(level);
617 KASSERT(level != SOFTINT_CLOCK || *machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK)));
618 KASSERT(level != SOFTINT_BIO || *machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK)));
619 KASSERT(level != SOFTINT_NET || *machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK)));
620 KASSERT(level != SOFTINT_SERIAL || *machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK)));
621 }
622
623 void
624 dosoftints(void)
625 {
626 struct cpu_info * const ci = curcpu();
627 const int opl = ci->ci_cpl;
628 const uint32_t softiplmask = SOFTIPLMASK(opl);
629
630 splhigh();
631 for (;;) {
632 u_int softints = ci->ci_softints & softiplmask;
633 KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0));
634 KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0);
635 if (softints == 0) {
636 splx(opl);
637 return;
638 }
639 #define DOSOFTINT(n) \
640 if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \
641 ci->ci_softints &= \
642 ~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \
643 softint_switch(ci->ci_softlwps[SOFTINT_ ## n], \
644 IPL_SOFT ## n); \
645 continue; \
646 }
647 DOSOFTINT(SERIAL);
648 DOSOFTINT(NET);
649 DOSOFTINT(BIO);
650 DOSOFTINT(CLOCK);
651 panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl);
652 }
653 }
654 #endif /* !__HAVE_PIC_FAST_SOFTINTS */
655 #endif /* __HAVE_FAST_SOFTINTS */
656
657 #ifdef MODULAR
658 /*
659 * Push any modules loaded by the boot loader.
660 */
661 void
662 module_init_md(void)
663 {
664 }
665 #endif /* MODULAR */
666
667 int
668 mm_md_physacc(paddr_t pa, vm_prot_t prot)
669 {
670
671 return (pa < ctob(physmem)) ? 0 : EFAULT;
672 }
673
674 #ifdef __HAVE_CPU_UAREA_ALLOC_IDLELWP
675 vaddr_t
676 cpu_uarea_alloc_idlelwp(struct cpu_info *ci)
677 {
678 const vaddr_t va = idlestack.pv_va + ci->ci_cpuid * USPACE;
679 // printf("%s: %s: va=%lx\n", __func__, ci->ci_data.cpu_name, va);
680 return va;
681 }
682 #endif
683
684 #ifdef MULTIPROCESSOR
685 void
686 cpu_boot_secondary_processors(void)
687 {
688 #ifdef VERBOSE_INIT_ARM
689 printf("%s: writing mbox with %#x\n", __func__, arm_cpu_hatched);
690 #endif
691 arm_cpu_mbox = arm_cpu_hatched;
692 membar_producer();
693 #ifdef _ARM_ARCH_7
694 __asm __volatile("sev; sev; sev");
695 #endif
696 while (arm_cpu_mbox) {
697 __asm("wfe");
698 }
699 }
700
701 void
702 xc_send_ipi(struct cpu_info *ci)
703 {
704 KASSERT(kpreempt_disabled());
705 KASSERT(curcpu() != ci);
706
707 intr_ipi_send(ci != NULL ? ci->ci_kcpuset : NULL, IPI_XCALL);
708 }
709 #endif /* MULTIPROCESSOR */
710
711 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS
712 bool
713 mm_md_direct_mapped_phys(paddr_t pa, vaddr_t *vap)
714 {
715 bool rv;
716 vaddr_t va = pmap_direct_mapped_phys(pa, &rv, 0);
717 if (rv) {
718 *vap = va;
719 }
720 return rv;
721 }
722 #endif
723