arm32_machdep.c revision 1.108.2.4
1 /* $NetBSD: arm32_machdep.c,v 1.108.2.4 2017/08/28 17:51:29 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * Machine dependent functions for kernel setup 39 * 40 * Created : 17/09/94 41 * Updated : 18/04/01 updated for new wscons 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.108.2.4 2017/08/28 17:51:29 skrll Exp $"); 46 47 #include "opt_modular.h" 48 #include "opt_md.h" 49 #include "opt_pmap_debug.h" 50 #include "opt_multiprocessor.h" 51 52 #include <sys/param.h> 53 #include <sys/systm.h> 54 #include <sys/reboot.h> 55 #include <sys/proc.h> 56 #include <sys/kauth.h> 57 #include <sys/kernel.h> 58 #include <sys/mbuf.h> 59 #include <sys/mount.h> 60 #include <sys/buf.h> 61 #include <sys/msgbuf.h> 62 #include <sys/device.h> 63 #include <sys/sysctl.h> 64 #include <sys/cpu.h> 65 #include <sys/intr.h> 66 #include <sys/module.h> 67 #include <sys/atomic.h> 68 #include <sys/xcall.h> 69 #include <sys/ipi.h> 70 71 #include <uvm/uvm_extern.h> 72 73 #include <dev/cons.h> 74 #include <dev/mm.h> 75 76 #include <arm/locore.h> 77 78 #include <arm/arm32/machdep.h> 79 80 #include <machine/bootconfig.h> 81 #include <machine/pcb.h> 82 83 void (*cpu_reset_address)(void); /* Used by locore */ 84 paddr_t cpu_reset_address_paddr; /* Used by locore */ 85 86 struct vm_map *phys_map = NULL; 87 88 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 89 extern size_t md_root_size; /* Memory disc size */ 90 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 91 92 pv_addr_t kernelstack; 93 pv_addr_t abtstack; 94 pv_addr_t fiqstack; 95 pv_addr_t irqstack; 96 pv_addr_t undstack; 97 pv_addr_t idlestack; 98 99 void * msgbufaddr; 100 extern paddr_t msgbufphys; 101 102 int kernel_debug = 0; 103 int cpu_printfataltraps = 0; 104 int cpu_fpu_present; 105 int cpu_hwdiv_present; 106 int cpu_neon_present; 107 int cpu_simd_present; 108 int cpu_simdex_present; 109 int cpu_umull_present; 110 int cpu_synchprim_present; 111 int cpu_unaligned_sigbus; 112 const char *cpu_arch = ""; 113 114 int cpu_instruction_set_attributes[6]; 115 int cpu_memory_model_features[4]; 116 int cpu_processor_features[2]; 117 int cpu_media_and_vfp_features[2]; 118 119 /* exported variable to be filled in by the bootloaders */ 120 char *booted_kernel; 121 122 /* Prototypes */ 123 124 void data_abort_handler(trapframe_t *frame); 125 void prefetch_abort_handler(trapframe_t *frame); 126 extern void configure(void); 127 128 /* 129 * arm32_vector_init: 130 * 131 * Initialize the vector page, and select whether or not to 132 * relocate the vectors. 133 * 134 * NOTE: We expect the vector page to be mapped at its expected 135 * destination. 136 */ 137 void 138 arm32_vector_init(vaddr_t va, int which) 139 { 140 #if defined(CPU_ARMV7) || defined(CPU_ARM11) || defined(ARM_HAS_VBAR) 141 /* 142 * If this processor has the security extension, don't bother 143 * to move/map the vector page. Simply point VBAR to the copy 144 * that exists in the .text segment. 145 */ 146 #ifndef ARM_HAS_VBAR 147 if (va == ARM_VECTORS_LOW 148 && (armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0) { 149 #endif 150 extern const uint32_t page0rel[]; 151 vector_page = (vaddr_t)page0rel; 152 KASSERT((vector_page & 0x1f) == 0); 153 armreg_vbar_write(vector_page); 154 #ifdef VERBOSE_INIT_ARM 155 printf(" vbar=%p", page0rel); 156 #endif 157 cpu_control(CPU_CONTROL_VECRELOC, 0); 158 return; 159 #ifndef ARM_HAS_VBAR 160 } 161 #endif 162 #endif 163 #ifndef ARM_HAS_VBAR 164 if (CPU_IS_PRIMARY(curcpu())) { 165 extern unsigned int page0[], page0_data[]; 166 unsigned int *vectors = (int *) va; 167 unsigned int *vectors_data = vectors + (page0_data - page0); 168 int vec; 169 170 /* 171 * Loop through the vectors we're taking over, and copy the 172 * vector's insn and data word. 173 */ 174 for (vec = 0; vec < ARM_NVEC; vec++) { 175 if ((which & (1 << vec)) == 0) { 176 /* Don't want to take over this vector. */ 177 continue; 178 } 179 vectors[vec] = page0[vec]; 180 vectors_data[vec] = page0_data[vec]; 181 } 182 183 /* Now sync the vectors. */ 184 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 185 186 vector_page = va; 187 } 188 189 if (va == ARM_VECTORS_HIGH) { 190 /* 191 * Assume the MD caller knows what it's doing here, and 192 * really does want the vector page relocated. 193 * 194 * Note: This has to be done here (and not just in 195 * cpu_setup()) because the vector page needs to be 196 * accessible *before* cpu_startup() is called. 197 * Think ddb(9) ... 198 * 199 * NOTE: If the CPU control register is not readable, 200 * this will totally fail! We'll just assume that 201 * any system that has high vector support has a 202 * readable CPU control register, for now. If we 203 * ever encounter one that does not, we'll have to 204 * rethink this. 205 */ 206 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 207 } 208 #endif 209 } 210 211 /* 212 * Debug function just to park the CPU 213 */ 214 215 void 216 halt(void) 217 { 218 while (1) 219 cpu_sleep(0); 220 } 221 222 223 /* Sync the discs, unmount the filesystems, and adjust the todr */ 224 225 void 226 bootsync(void) 227 { 228 static bool bootsyncdone = false; 229 230 if (bootsyncdone) return; 231 232 bootsyncdone = true; 233 234 /* Make sure we can still manage to do things */ 235 if (GetCPSR() & I32_bit) { 236 /* 237 * If we get here then boot has been called without RB_NOSYNC 238 * and interrupts were disabled. This means the boot() call 239 * did not come from a user process e.g. shutdown, but must 240 * have come from somewhere in the kernel. 241 */ 242 IRQenable; 243 printf("Warning IRQ's disabled during boot()\n"); 244 } 245 246 vfs_shutdown(); 247 248 resettodr(); 249 } 250 251 /* 252 * void cpu_startup(void) 253 * 254 * Machine dependent startup code. 255 * 256 */ 257 void 258 cpu_startup(void) 259 { 260 vaddr_t minaddr; 261 vaddr_t maxaddr; 262 char pbuf[9]; 263 264 /* 265 * Until we better locking, we have to live under the kernel lock. 266 */ 267 //KERNEL_LOCK(1, NULL); 268 269 /* Set the CPU control register */ 270 cpu_setup(boot_args); 271 272 #ifndef ARM_HAS_VBAR 273 /* Lock down zero page */ 274 vector_page_setprot(VM_PROT_READ); 275 #endif 276 277 /* 278 * Give pmap a chance to set up a few more things now the vm 279 * is initialised 280 */ 281 pmap_postinit(); 282 283 /* 284 * Initialize error message buffer (at end of core). 285 */ 286 287 /* msgbufphys was setup during the secondary boot strap */ 288 if (!pmap_extract(pmap_kernel(), (vaddr_t)msgbufaddr, NULL)) { 289 for (u_int loop = 0; loop < btoc(MSGBUFSIZE); ++loop) { 290 pmap_kenter_pa((vaddr_t)msgbufaddr + loop * PAGE_SIZE, 291 msgbufphys + loop * PAGE_SIZE, 292 VM_PROT_READ|VM_PROT_WRITE, 0); 293 } 294 } 295 pmap_update(pmap_kernel()); 296 initmsgbuf(msgbufaddr, round_page(MSGBUFSIZE)); 297 298 /* 299 * Identify ourselves for the msgbuf (everything printed earlier will 300 * not be buffered). 301 */ 302 printf("%s%s", copyright, version); 303 304 format_bytes(pbuf, sizeof(pbuf), arm_ptob(physmem)); 305 printf("total memory = %s\n", pbuf); 306 307 minaddr = 0; 308 309 /* 310 * Allocate a submap for physio 311 */ 312 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 313 VM_PHYS_SIZE, 0, false, NULL); 314 315 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 316 printf("avail memory = %s\n", pbuf); 317 318 /* 319 * This is actually done by initarm_common, but not all ports use it 320 * yet so do it here to catch them as well 321 */ 322 struct lwp * const l = &lwp0; 323 struct pcb * const pcb = lwp_getpcb(l); 324 325 /* Zero out the PCB. */ 326 memset(pcb, 0, sizeof(*pcb)); 327 328 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP; 329 pcb->pcb_ksp -= sizeof(struct trapframe); 330 331 struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp; 332 333 /* Zero out the trapframe. */ 334 memset(tf, 0, sizeof(*tf)); 335 lwp_settrapframe(l, tf); 336 337 #if defined(__ARMEB__) 338 tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0); 339 #else 340 tf->tf_spsr = PSR_USR32_MODE; 341 #endif 342 } 343 344 /* 345 * machine dependent system variables. 346 */ 347 static int 348 sysctl_machdep_booted_device(SYSCTLFN_ARGS) 349 { 350 struct sysctlnode node; 351 352 if (booted_device == NULL) 353 return (EOPNOTSUPP); 354 355 node = *rnode; 356 node.sysctl_data = __UNCONST(device_xname(booted_device)); 357 node.sysctl_size = strlen(device_xname(booted_device)) + 1; 358 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 359 } 360 361 static int 362 sysctl_machdep_booted_kernel(SYSCTLFN_ARGS) 363 { 364 struct sysctlnode node; 365 366 if (booted_kernel == NULL || booted_kernel[0] == '\0') 367 return (EOPNOTSUPP); 368 369 node = *rnode; 370 node.sysctl_data = booted_kernel; 371 node.sysctl_size = strlen(booted_kernel) + 1; 372 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 373 } 374 375 static int 376 sysctl_machdep_cpu_arch(SYSCTLFN_ARGS) 377 { 378 struct sysctlnode node = *rnode; 379 node.sysctl_data = __UNCONST(cpu_arch); 380 node.sysctl_size = strlen(cpu_arch) + 1; 381 return sysctl_lookup(SYSCTLFN_CALL(&node)); 382 } 383 384 static int 385 sysctl_machdep_powersave(SYSCTLFN_ARGS) 386 { 387 struct sysctlnode node = *rnode; 388 int error, newval; 389 390 newval = cpu_do_powersave; 391 node.sysctl_data = &newval; 392 if (cpufuncs.cf_sleep == (void *) cpufunc_nullop) 393 node.sysctl_flags &= ~CTLFLAG_READWRITE; 394 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 395 if (error || newp == NULL || newval == cpu_do_powersave) 396 return (error); 397 398 if (newval < 0 || newval > 1) 399 return (EINVAL); 400 cpu_do_powersave = newval; 401 402 return (0); 403 } 404 405 static int 406 sysctl_hw_machine_arch(SYSCTLFN_ARGS) 407 { 408 struct sysctlnode node = *rnode; 409 node.sysctl_data = l->l_proc->p_md.md_march; 410 node.sysctl_size = strlen(l->l_proc->p_md.md_march) + 1; 411 return sysctl_lookup(SYSCTLFN_CALL(&node)); 412 } 413 414 SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup") 415 { 416 417 sysctl_createv(clog, 0, NULL, NULL, 418 CTLFLAG_PERMANENT, 419 CTLTYPE_NODE, "machdep", NULL, 420 NULL, 0, NULL, 0, 421 CTL_MACHDEP, CTL_EOL); 422 423 sysctl_createv(clog, 0, NULL, NULL, 424 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 425 CTLTYPE_INT, "debug", NULL, 426 NULL, 0, &kernel_debug, 0, 427 CTL_MACHDEP, CPU_DEBUG, CTL_EOL); 428 sysctl_createv(clog, 0, NULL, NULL, 429 CTLFLAG_PERMANENT, 430 CTLTYPE_STRING, "booted_device", NULL, 431 sysctl_machdep_booted_device, 0, NULL, 0, 432 CTL_MACHDEP, CPU_BOOTED_DEVICE, CTL_EOL); 433 sysctl_createv(clog, 0, NULL, NULL, 434 CTLFLAG_PERMANENT, 435 CTLTYPE_STRING, "booted_kernel", NULL, 436 sysctl_machdep_booted_kernel, 0, NULL, 0, 437 CTL_MACHDEP, CPU_BOOTED_KERNEL, CTL_EOL); 438 sysctl_createv(clog, 0, NULL, NULL, 439 CTLFLAG_PERMANENT, 440 CTLTYPE_STRUCT, "console_device", NULL, 441 sysctl_consdev, 0, NULL, sizeof(dev_t), 442 CTL_MACHDEP, CPU_CONSDEV, CTL_EOL); 443 sysctl_createv(clog, 0, NULL, NULL, 444 CTLFLAG_PERMANENT, 445 CTLTYPE_STRING, "cpu_arch", NULL, 446 sysctl_machdep_cpu_arch, 0, NULL, 0, 447 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 448 sysctl_createv(clog, 0, NULL, NULL, 449 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 450 CTLTYPE_INT, "powersave", NULL, 451 sysctl_machdep_powersave, 0, &cpu_do_powersave, 0, 452 CTL_MACHDEP, CPU_POWERSAVE, CTL_EOL); 453 sysctl_createv(clog, 0, NULL, NULL, 454 CTLFLAG_PERMANENT|CTLFLAG_IMMEDIATE, 455 CTLTYPE_INT, "cpu_id", NULL, 456 NULL, curcpu()->ci_arm_cpuid, NULL, 0, 457 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 458 #ifdef FPU_VFP 459 sysctl_createv(clog, 0, NULL, NULL, 460 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 461 CTLTYPE_INT, "fpu_id", NULL, 462 NULL, 0, &cpu_info_store.ci_vfp_id, 0, 463 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 464 #endif 465 sysctl_createv(clog, 0, NULL, NULL, 466 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 467 CTLTYPE_INT, "fpu_present", NULL, 468 NULL, 0, &cpu_fpu_present, 0, 469 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 470 sysctl_createv(clog, 0, NULL, NULL, 471 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 472 CTLTYPE_INT, "hwdiv_present", NULL, 473 NULL, 0, &cpu_hwdiv_present, 0, 474 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 475 sysctl_createv(clog, 0, NULL, NULL, 476 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 477 CTLTYPE_INT, "neon_present", NULL, 478 NULL, 0, &cpu_neon_present, 0, 479 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 480 sysctl_createv(clog, 0, NULL, NULL, 481 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 482 CTLTYPE_STRUCT, "id_isar", NULL, 483 NULL, 0, 484 cpu_instruction_set_attributes, 485 sizeof(cpu_instruction_set_attributes), 486 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 487 sysctl_createv(clog, 0, NULL, NULL, 488 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 489 CTLTYPE_STRUCT, "id_mmfr", NULL, 490 NULL, 0, 491 cpu_memory_model_features, 492 sizeof(cpu_memory_model_features), 493 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 494 sysctl_createv(clog, 0, NULL, NULL, 495 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 496 CTLTYPE_STRUCT, "id_pfr", NULL, 497 NULL, 0, 498 cpu_processor_features, 499 sizeof(cpu_processor_features), 500 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 501 sysctl_createv(clog, 0, NULL, NULL, 502 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 503 CTLTYPE_STRUCT, "id_mvfr", NULL, 504 NULL, 0, 505 cpu_media_and_vfp_features, 506 sizeof(cpu_media_and_vfp_features), 507 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 508 sysctl_createv(clog, 0, NULL, NULL, 509 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 510 CTLTYPE_INT, "simd_present", NULL, 511 NULL, 0, &cpu_simd_present, 0, 512 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 513 sysctl_createv(clog, 0, NULL, NULL, 514 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 515 CTLTYPE_INT, "simdex_present", NULL, 516 NULL, 0, &cpu_simdex_present, 0, 517 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 518 sysctl_createv(clog, 0, NULL, NULL, 519 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 520 CTLTYPE_INT, "synchprim_present", NULL, 521 NULL, 0, &cpu_synchprim_present, 0, 522 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 523 sysctl_createv(clog, 0, NULL, NULL, 524 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 525 CTLTYPE_INT, "printfataltraps", NULL, 526 NULL, 0, &cpu_printfataltraps, 0, 527 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 528 cpu_unaligned_sigbus = !CPU_IS_ARMV6_P() && !CPU_IS_ARMV7_P(); 529 sysctl_createv(clog, 0, NULL, NULL, 530 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 531 CTLTYPE_INT, "unaligned_sigbus", 532 SYSCTL_DESCR("Do SIGBUS for fixed unaligned accesses"), 533 NULL, 0, &cpu_unaligned_sigbus, 0, 534 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 535 536 537 /* 538 * We need override the usual CTL_HW HW_MACHINE_ARCH so we 539 * return the right machine_arch based on the running executable. 540 */ 541 sysctl_createv(clog, 0, NULL, NULL, 542 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 543 CTLTYPE_STRING, "machine_arch", 544 SYSCTL_DESCR("Machine CPU class"), 545 sysctl_hw_machine_arch, 0, NULL, 0, 546 CTL_HW, HW_MACHINE_ARCH, CTL_EOL); 547 } 548 549 void 550 parse_mi_bootargs(char *args) 551 { 552 int integer; 553 554 if (get_bootconf_option(args, "single", BOOTOPT_TYPE_BOOLEAN, &integer) 555 || get_bootconf_option(args, "-s", BOOTOPT_TYPE_BOOLEAN, &integer)) 556 if (integer) 557 boothowto |= RB_SINGLE; 558 if (get_bootconf_option(args, "kdb", BOOTOPT_TYPE_BOOLEAN, &integer) 559 || get_bootconf_option(args, "-k", BOOTOPT_TYPE_BOOLEAN, &integer) 560 || get_bootconf_option(args, "-d", BOOTOPT_TYPE_BOOLEAN, &integer)) 561 if (integer) 562 boothowto |= RB_KDB; 563 if (get_bootconf_option(args, "ask", BOOTOPT_TYPE_BOOLEAN, &integer) 564 || get_bootconf_option(args, "-a", BOOTOPT_TYPE_BOOLEAN, &integer)) 565 if (integer) 566 boothowto |= RB_ASKNAME; 567 568 #ifdef PMAP_DEBUG 569 if (get_bootconf_option(args, "pmapdebug", BOOTOPT_TYPE_INT, &integer)) { 570 pmap_debug_level = integer; 571 pmap_debug(pmap_debug_level); 572 } 573 #endif /* PMAP_DEBUG */ 574 575 /* if (get_bootconf_option(args, "nbuf", BOOTOPT_TYPE_INT, &integer)) 576 bufpages = integer;*/ 577 578 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 579 if (get_bootconf_option(args, "memorydisc", BOOTOPT_TYPE_INT, &integer) 580 || get_bootconf_option(args, "memorydisk", BOOTOPT_TYPE_INT, &integer)) { 581 md_root_size = integer; 582 md_root_size *= 1024; 583 if (md_root_size < 32*1024) 584 md_root_size = 32*1024; 585 if (md_root_size > 2048*1024) 586 md_root_size = 2048*1024; 587 } 588 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 589 590 if (get_bootconf_option(args, "quiet", BOOTOPT_TYPE_BOOLEAN, &integer) 591 || get_bootconf_option(args, "-q", BOOTOPT_TYPE_BOOLEAN, &integer)) 592 if (integer) 593 boothowto |= AB_QUIET; 594 if (get_bootconf_option(args, "verbose", BOOTOPT_TYPE_BOOLEAN, &integer) 595 || get_bootconf_option(args, "-v", BOOTOPT_TYPE_BOOLEAN, &integer)) 596 if (integer) 597 boothowto |= AB_VERBOSE; 598 if (get_bootconf_option(args, "debug", BOOTOPT_TYPE_BOOLEAN, &integer) 599 || get_bootconf_option(args, "-x", BOOTOPT_TYPE_BOOLEAN, &integer)) 600 if (integer) 601 boothowto |= AB_DEBUG; 602 } 603 604 #ifdef __HAVE_FAST_SOFTINTS 605 #if IPL_SOFTSERIAL != IPL_SOFTNET + 1 606 #error IPLs are screwed up 607 #elif IPL_SOFTNET != IPL_SOFTBIO + 1 608 #error IPLs are screwed up 609 #elif IPL_SOFTBIO != IPL_SOFTCLOCK + 1 610 #error IPLs are screwed up 611 #elif !(IPL_SOFTCLOCK > IPL_NONE) 612 #error IPLs are screwed up 613 #elif (IPL_NONE != 0) 614 #error IPLs are screwed up 615 #endif 616 617 #ifndef __HAVE_PIC_FAST_SOFTINTS 618 #define SOFTINT2IPLMAP \ 619 (((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \ 620 ((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \ 621 ((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \ 622 ((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4))) 623 #define SOFTINT2IPL(l) ((SOFTINT2IPLMAP >> ((l) * 4)) & 0x0f) 624 625 /* 626 * This returns a mask of softint IPLs that be dispatch at <ipl> 627 * SOFTIPLMASK(IPL_NONE) = 0x0000000f 628 * SOFTIPLMASK(IPL_SOFTCLOCK) = 0x0000000e 629 * SOFTIPLMASK(IPL_SOFTBIO) = 0x0000000c 630 * SOFTIPLMASK(IPL_SOFTNET) = 0x00000008 631 * SOFTIPLMASK(IPL_SOFTSERIAL) = 0x00000000 632 */ 633 #define SOFTIPLMASK(ipl) ((0x0f << (ipl)) & 0x0f) 634 635 void softint_switch(lwp_t *, int); 636 637 void 638 softint_trigger(uintptr_t mask) 639 { 640 curcpu()->ci_softints |= mask; 641 } 642 643 void 644 softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep) 645 { 646 lwp_t ** lp = &l->l_cpu->ci_softlwps[level]; 647 KASSERT(*lp == NULL || *lp == l); 648 *lp = l; 649 *machdep = 1 << SOFTINT2IPL(level); 650 KASSERT(level != SOFTINT_CLOCK || *machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK))); 651 KASSERT(level != SOFTINT_BIO || *machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK))); 652 KASSERT(level != SOFTINT_NET || *machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK))); 653 KASSERT(level != SOFTINT_SERIAL || *machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK))); 654 } 655 656 void 657 dosoftints(void) 658 { 659 struct cpu_info * const ci = curcpu(); 660 const int opl = ci->ci_cpl; 661 const uint32_t softiplmask = SOFTIPLMASK(opl); 662 663 splhigh(); 664 for (;;) { 665 u_int softints = ci->ci_softints & softiplmask; 666 KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0)); 667 KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0); 668 if (softints == 0) { 669 splx(opl); 670 return; 671 } 672 #define DOSOFTINT(n) \ 673 if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \ 674 ci->ci_softints &= \ 675 ~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \ 676 softint_switch(ci->ci_softlwps[SOFTINT_ ## n], \ 677 IPL_SOFT ## n); \ 678 continue; \ 679 } 680 DOSOFTINT(SERIAL); 681 DOSOFTINT(NET); 682 DOSOFTINT(BIO); 683 DOSOFTINT(CLOCK); 684 panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl); 685 } 686 } 687 #endif /* !__HAVE_PIC_FAST_SOFTINTS */ 688 #endif /* __HAVE_FAST_SOFTINTS */ 689 690 #ifdef MODULAR 691 /* 692 * Push any modules loaded by the boot loader. 693 */ 694 void 695 module_init_md(void) 696 { 697 } 698 #endif /* MODULAR */ 699 700 int 701 mm_md_physacc(paddr_t pa, vm_prot_t prot) 702 { 703 if (pa >= physical_start && pa < physical_end) 704 return 0; 705 706 return kauth_authorize_machdep(kauth_cred_get(), 707 KAUTH_MACHDEP_UNMANAGEDMEM, NULL, NULL, NULL, NULL); 708 } 709 710 #ifdef __HAVE_CPU_UAREA_ALLOC_IDLELWP 711 vaddr_t 712 cpu_uarea_alloc_idlelwp(struct cpu_info *ci) 713 { 714 const vaddr_t va = idlestack.pv_va + ci->ci_cpuid * USPACE; 715 // printf("%s: %s: va=%lx\n", __func__, ci->ci_data.cpu_name, va); 716 return va; 717 } 718 #endif 719 720 #ifdef MULTIPROCESSOR 721 void 722 cpu_boot_secondary_processors(void) 723 { 724 #ifdef VERBOSE_INIT_ARM 725 printf("%s: writing mbox with %#x\n", __func__, arm_cpu_hatched); 726 #endif 727 arm_cpu_mbox = arm_cpu_hatched; 728 membar_producer(); 729 #ifdef _ARM_ARCH_7 730 __asm __volatile("sev; sev; sev"); 731 #endif 732 while (arm_cpu_mbox) { 733 __asm("wfe"); 734 } 735 } 736 737 void 738 xc_send_ipi(struct cpu_info *ci) 739 { 740 KASSERT(kpreempt_disabled()); 741 KASSERT(curcpu() != ci); 742 743 intr_ipi_send(ci != NULL ? ci->ci_kcpuset : NULL, IPI_XCALL); 744 } 745 746 void 747 cpu_ipi(struct cpu_info *ci) 748 { 749 KASSERT(kpreempt_disabled()); 750 KASSERT(curcpu() != ci); 751 752 intr_ipi_send(ci != NULL ? ci->ci_kcpuset : NULL, IPI_GENERIC); 753 } 754 755 #endif /* MULTIPROCESSOR */ 756 757 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 758 bool 759 mm_md_direct_mapped_phys(paddr_t pa, vaddr_t *vap) 760 { 761 bool rv; 762 vaddr_t va = pmap_direct_mapped_phys(pa, &rv, 0); 763 if (rv) { 764 *vap = va; 765 } 766 return rv; 767 } 768 #endif 769 770 bool 771 mm_md_page_color(paddr_t pa, int *colorp) 772 { 773 #if (ARM_MMU_V6 + ARM_MMU_V7) != 0 774 *colorp = atop(pa & arm_cache_prefer_mask); 775 776 return arm_cache_prefer_mask ? false : true; 777 #else 778 *colorp = 0; 779 780 return true; 781 #endif 782 } 783
Indexes created Mon Oct 20 20:10:13 GMT 2025