arm32_machdep.c revision 1.115.2.1
1 /* $NetBSD: arm32_machdep.c,v 1.115.2.1 2018/09/06 06:55:25 pgoyette Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * Machine dependent functions for kernel setup 39 * 40 * Created : 17/09/94 41 * Updated : 18/04/01 updated for new wscons 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.115.2.1 2018/09/06 06:55:25 pgoyette Exp $"); 46 47 #include "opt_arm_debug.h" 48 #include "opt_fdt.h" 49 #include "opt_modular.h" 50 #include "opt_md.h" 51 #include "opt_pmap_debug.h" 52 #include "opt_multiprocessor.h" 53 54 #include <sys/param.h> 55 #include <sys/systm.h> 56 #include <sys/reboot.h> 57 #include <sys/proc.h> 58 #include <sys/kauth.h> 59 #include <sys/kernel.h> 60 #include <sys/mbuf.h> 61 #include <sys/mount.h> 62 #include <sys/buf.h> 63 #include <sys/msgbuf.h> 64 #include <sys/device.h> 65 #include <sys/sysctl.h> 66 #include <sys/cpu.h> 67 #include <sys/intr.h> 68 #include <sys/module.h> 69 #include <sys/atomic.h> 70 #include <sys/xcall.h> 71 #include <sys/ipi.h> 72 73 #include <uvm/uvm_extern.h> 74 75 #include <dev/cons.h> 76 #include <dev/mm.h> 77 78 #include <arm/locore.h> 79 80 #include <arm/arm32/machdep.h> 81 82 #include <machine/bootconfig.h> 83 #include <machine/pcb.h> 84 85 #if defined(FDT) 86 #include <arm/fdt/arm_fdtvar.h> 87 #include <arch/evbarm/fdt/platform.h> 88 #endif 89 90 #ifdef VERBOSE_INIT_ARM 91 #define VPRINTF(...) printf(__VA_ARGS__) 92 #else 93 #define VPRINTF(...) do { } while (/* CONSTCOND */ 0) 94 #endif 95 96 void (*cpu_reset_address)(void); /* Used by locore */ 97 paddr_t cpu_reset_address_paddr; /* Used by locore */ 98 99 struct vm_map *phys_map = NULL; 100 101 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 102 extern size_t md_root_size; /* Memory disc size */ 103 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 104 105 pv_addr_t kernelstack; 106 pv_addr_t abtstack; 107 pv_addr_t fiqstack; 108 pv_addr_t irqstack; 109 pv_addr_t undstack; 110 pv_addr_t idlestack; 111 112 void * msgbufaddr; 113 extern paddr_t msgbufphys; 114 115 int kernel_debug = 0; 116 int cpu_printfataltraps = 0; 117 int cpu_fpu_present; 118 int cpu_hwdiv_present; 119 int cpu_neon_present; 120 int cpu_simd_present; 121 int cpu_simdex_present; 122 int cpu_umull_present; 123 int cpu_synchprim_present; 124 int cpu_unaligned_sigbus; 125 const char *cpu_arch = ""; 126 127 int cpu_instruction_set_attributes[6]; 128 int cpu_memory_model_features[4]; 129 int cpu_processor_features[2]; 130 int cpu_media_and_vfp_features[2]; 131 132 /* exported variable to be filled in by the bootloaders */ 133 char *booted_kernel; 134 135 /* Prototypes */ 136 137 void data_abort_handler(trapframe_t *frame); 138 void prefetch_abort_handler(trapframe_t *frame); 139 extern void configure(void); 140 141 /* 142 * arm32_vector_init: 143 * 144 * Initialize the vector page, and select whether or not to 145 * relocate the vectors. 146 * 147 * NOTE: We expect the vector page to be mapped at its expected 148 * destination. 149 */ 150 void 151 arm32_vector_init(vaddr_t va, int which) 152 { 153 #if defined(CPU_ARMV7) || defined(CPU_ARM11) || defined(ARM_HAS_VBAR) 154 /* 155 * If this processor has the security extension, don't bother 156 * to move/map the vector page. Simply point VBAR to the copy 157 * that exists in the .text segment. 158 */ 159 #ifndef ARM_HAS_VBAR 160 if (va == ARM_VECTORS_LOW 161 && (armreg_pfr1_read() & ARM_PFR1_SEC_MASK) != 0) { 162 #endif 163 extern const uint32_t page0rel[]; 164 vector_page = (vaddr_t)page0rel; 165 KASSERT((vector_page & 0x1f) == 0); 166 armreg_vbar_write(vector_page); 167 VPRINTF(" vbar=%p", page0rel); 168 cpu_control(CPU_CONTROL_VECRELOC, 0); 169 return; 170 #ifndef ARM_HAS_VBAR 171 } 172 #endif 173 #endif 174 #ifndef ARM_HAS_VBAR 175 if (CPU_IS_PRIMARY(curcpu())) { 176 extern unsigned int page0[], page0_data[]; 177 unsigned int *vectors = (int *) va; 178 unsigned int *vectors_data = vectors + (page0_data - page0); 179 int vec; 180 181 /* 182 * Loop through the vectors we're taking over, and copy the 183 * vector's insn and data word. 184 */ 185 for (vec = 0; vec < ARM_NVEC; vec++) { 186 if ((which & (1 << vec)) == 0) { 187 /* Don't want to take over this vector. */ 188 continue; 189 } 190 vectors[vec] = page0[vec]; 191 vectors_data[vec] = page0_data[vec]; 192 } 193 194 /* Now sync the vectors. */ 195 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 196 197 vector_page = va; 198 } 199 200 if (va == ARM_VECTORS_HIGH) { 201 /* 202 * Assume the MD caller knows what it's doing here, and 203 * really does want the vector page relocated. 204 * 205 * Note: This has to be done here (and not just in 206 * cpu_setup()) because the vector page needs to be 207 * accessible *before* cpu_startup() is called. 208 * Think ddb(9) ... 209 * 210 * NOTE: If the CPU control register is not readable, 211 * this will totally fail! We'll just assume that 212 * any system that has high vector support has a 213 * readable CPU control register, for now. If we 214 * ever encounter one that does not, we'll have to 215 * rethink this. 216 */ 217 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 218 } 219 #endif 220 } 221 222 /* 223 * Debug function just to park the CPU 224 */ 225 226 void 227 halt(void) 228 { 229 while (1) 230 cpu_sleep(0); 231 } 232 233 234 /* Sync the discs, unmount the filesystems, and adjust the todr */ 235 236 void 237 bootsync(void) 238 { 239 static bool bootsyncdone = false; 240 241 if (bootsyncdone) return; 242 243 bootsyncdone = true; 244 245 /* Make sure we can still manage to do things */ 246 if (GetCPSR() & I32_bit) { 247 /* 248 * If we get here then boot has been called without RB_NOSYNC 249 * and interrupts were disabled. This means the boot() call 250 * did not come from a user process e.g. shutdown, but must 251 * have come from somewhere in the kernel. 252 */ 253 IRQenable; 254 printf("Warning IRQ's disabled during boot()\n"); 255 } 256 257 vfs_shutdown(); 258 259 resettodr(); 260 } 261 262 /* 263 * void cpu_startup(void) 264 * 265 * Machine dependent startup code. 266 * 267 */ 268 void 269 cpu_startup(void) 270 { 271 vaddr_t minaddr; 272 vaddr_t maxaddr; 273 274 /* Set the CPU control register */ 275 cpu_setup(boot_args); 276 277 #ifndef ARM_HAS_VBAR 278 /* Lock down zero page */ 279 vector_page_setprot(VM_PROT_READ); 280 #endif 281 282 /* 283 * Give pmap a chance to set up a few more things now the vm 284 * is initialised 285 */ 286 pmap_postinit(); 287 288 /* 289 * Initialize error message buffer (at end of core). 290 */ 291 292 /* msgbufphys was setup during the secondary boot strap */ 293 if (!pmap_extract(pmap_kernel(), (vaddr_t)msgbufaddr, NULL)) { 294 for (u_int loop = 0; loop < btoc(MSGBUFSIZE); ++loop) { 295 pmap_kenter_pa((vaddr_t)msgbufaddr + loop * PAGE_SIZE, 296 msgbufphys + loop * PAGE_SIZE, 297 VM_PROT_READ|VM_PROT_WRITE, 0); 298 } 299 } 300 pmap_update(pmap_kernel()); 301 initmsgbuf(msgbufaddr, round_page(MSGBUFSIZE)); 302 303 /* 304 * Allocate a submap for physio 305 */ 306 minaddr = 0; 307 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 308 VM_PHYS_SIZE, 0, false, NULL); 309 310 banner(); 311 312 /* 313 * This is actually done by initarm_common, but not all ports use it 314 * yet so do it here to catch them as well 315 */ 316 struct lwp * const l = &lwp0; 317 struct pcb * const pcb = lwp_getpcb(l); 318 319 /* Zero out the PCB. */ 320 memset(pcb, 0, sizeof(*pcb)); 321 322 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP; 323 pcb->pcb_ksp -= sizeof(struct trapframe); 324 325 struct trapframe * tf = (struct trapframe *)pcb->pcb_ksp; 326 327 /* Zero out the trapframe. */ 328 memset(tf, 0, sizeof(*tf)); 329 lwp_settrapframe(l, tf); 330 331 #if defined(__ARMEB__) 332 tf->tf_spsr = PSR_USR32_MODE | (CPU_IS_ARMV7_P() ? PSR_E_BIT : 0); 333 #else 334 tf->tf_spsr = PSR_USR32_MODE; 335 #endif 336 } 337 338 /* 339 * machine dependent system variables. 340 */ 341 static int 342 sysctl_machdep_booted_device(SYSCTLFN_ARGS) 343 { 344 struct sysctlnode node; 345 346 if (booted_device == NULL) 347 return (EOPNOTSUPP); 348 349 node = *rnode; 350 node.sysctl_data = __UNCONST(device_xname(booted_device)); 351 node.sysctl_size = strlen(device_xname(booted_device)) + 1; 352 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 353 } 354 355 static int 356 sysctl_machdep_booted_kernel(SYSCTLFN_ARGS) 357 { 358 struct sysctlnode node; 359 360 if (booted_kernel == NULL || booted_kernel[0] == '\0') 361 return (EOPNOTSUPP); 362 363 node = *rnode; 364 node.sysctl_data = booted_kernel; 365 node.sysctl_size = strlen(booted_kernel) + 1; 366 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 367 } 368 369 static int 370 sysctl_machdep_cpu_arch(SYSCTLFN_ARGS) 371 { 372 struct sysctlnode node = *rnode; 373 node.sysctl_data = __UNCONST(cpu_arch); 374 node.sysctl_size = strlen(cpu_arch) + 1; 375 return sysctl_lookup(SYSCTLFN_CALL(&node)); 376 } 377 378 static int 379 sysctl_machdep_powersave(SYSCTLFN_ARGS) 380 { 381 struct sysctlnode node = *rnode; 382 int error, newval; 383 384 newval = cpu_do_powersave; 385 node.sysctl_data = &newval; 386 if (cpufuncs.cf_sleep == (void *) cpufunc_nullop) 387 node.sysctl_flags &= ~CTLFLAG_READWRITE; 388 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 389 if (error || newp == NULL || newval == cpu_do_powersave) 390 return (error); 391 392 if (newval < 0 || newval > 1) 393 return (EINVAL); 394 cpu_do_powersave = newval; 395 396 return (0); 397 } 398 399 SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup") 400 { 401 402 sysctl_createv(clog, 0, NULL, NULL, 403 CTLFLAG_PERMANENT, 404 CTLTYPE_NODE, "machdep", NULL, 405 NULL, 0, NULL, 0, 406 CTL_MACHDEP, CTL_EOL); 407 408 sysctl_createv(clog, 0, NULL, NULL, 409 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 410 CTLTYPE_INT, "debug", NULL, 411 NULL, 0, &kernel_debug, 0, 412 CTL_MACHDEP, CPU_DEBUG, CTL_EOL); 413 sysctl_createv(clog, 0, NULL, NULL, 414 CTLFLAG_PERMANENT, 415 CTLTYPE_STRING, "booted_device", NULL, 416 sysctl_machdep_booted_device, 0, NULL, 0, 417 CTL_MACHDEP, CPU_BOOTED_DEVICE, CTL_EOL); 418 sysctl_createv(clog, 0, NULL, NULL, 419 CTLFLAG_PERMANENT, 420 CTLTYPE_STRING, "booted_kernel", NULL, 421 sysctl_machdep_booted_kernel, 0, NULL, 0, 422 CTL_MACHDEP, CPU_BOOTED_KERNEL, CTL_EOL); 423 sysctl_createv(clog, 0, NULL, NULL, 424 CTLFLAG_PERMANENT, 425 CTLTYPE_STRUCT, "console_device", NULL, 426 sysctl_consdev, 0, NULL, sizeof(dev_t), 427 CTL_MACHDEP, CPU_CONSDEV, CTL_EOL); 428 sysctl_createv(clog, 0, NULL, NULL, 429 CTLFLAG_PERMANENT, 430 CTLTYPE_STRING, "cpu_arch", NULL, 431 sysctl_machdep_cpu_arch, 0, NULL, 0, 432 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 433 sysctl_createv(clog, 0, NULL, NULL, 434 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 435 CTLTYPE_INT, "powersave", NULL, 436 sysctl_machdep_powersave, 0, &cpu_do_powersave, 0, 437 CTL_MACHDEP, CPU_POWERSAVE, CTL_EOL); 438 sysctl_createv(clog, 0, NULL, NULL, 439 CTLFLAG_PERMANENT|CTLFLAG_IMMEDIATE, 440 CTLTYPE_INT, "cpu_id", NULL, 441 NULL, curcpu()->ci_arm_cpuid, NULL, 0, 442 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 443 #ifdef FPU_VFP 444 sysctl_createv(clog, 0, NULL, NULL, 445 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 446 CTLTYPE_INT, "fpu_id", NULL, 447 NULL, 0, &cpu_info_store.ci_vfp_id, 0, 448 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 449 #endif 450 sysctl_createv(clog, 0, NULL, NULL, 451 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 452 CTLTYPE_INT, "fpu_present", NULL, 453 NULL, 0, &cpu_fpu_present, 0, 454 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 455 sysctl_createv(clog, 0, NULL, NULL, 456 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 457 CTLTYPE_INT, "hwdiv_present", NULL, 458 NULL, 0, &cpu_hwdiv_present, 0, 459 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 460 sysctl_createv(clog, 0, NULL, NULL, 461 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 462 CTLTYPE_INT, "neon_present", NULL, 463 NULL, 0, &cpu_neon_present, 0, 464 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 465 sysctl_createv(clog, 0, NULL, NULL, 466 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 467 CTLTYPE_STRUCT, "id_isar", NULL, 468 NULL, 0, 469 cpu_instruction_set_attributes, 470 sizeof(cpu_instruction_set_attributes), 471 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 472 sysctl_createv(clog, 0, NULL, NULL, 473 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 474 CTLTYPE_STRUCT, "id_mmfr", NULL, 475 NULL, 0, 476 cpu_memory_model_features, 477 sizeof(cpu_memory_model_features), 478 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 479 sysctl_createv(clog, 0, NULL, NULL, 480 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 481 CTLTYPE_STRUCT, "id_pfr", NULL, 482 NULL, 0, 483 cpu_processor_features, 484 sizeof(cpu_processor_features), 485 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 486 sysctl_createv(clog, 0, NULL, NULL, 487 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 488 CTLTYPE_STRUCT, "id_mvfr", NULL, 489 NULL, 0, 490 cpu_media_and_vfp_features, 491 sizeof(cpu_media_and_vfp_features), 492 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 493 sysctl_createv(clog, 0, NULL, NULL, 494 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 495 CTLTYPE_INT, "simd_present", NULL, 496 NULL, 0, &cpu_simd_present, 0, 497 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 498 sysctl_createv(clog, 0, NULL, NULL, 499 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 500 CTLTYPE_INT, "simdex_present", NULL, 501 NULL, 0, &cpu_simdex_present, 0, 502 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 503 sysctl_createv(clog, 0, NULL, NULL, 504 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 505 CTLTYPE_INT, "synchprim_present", NULL, 506 NULL, 0, &cpu_synchprim_present, 0, 507 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 508 sysctl_createv(clog, 0, NULL, NULL, 509 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 510 CTLTYPE_INT, "printfataltraps", NULL, 511 NULL, 0, &cpu_printfataltraps, 0, 512 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 513 cpu_unaligned_sigbus = !CPU_IS_ARMV6_P() && !CPU_IS_ARMV7_P(); 514 sysctl_createv(clog, 0, NULL, NULL, 515 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 516 CTLTYPE_INT, "unaligned_sigbus", 517 SYSCTL_DESCR("Do SIGBUS for fixed unaligned accesses"), 518 NULL, 0, &cpu_unaligned_sigbus, 0, 519 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 520 } 521 522 void 523 parse_mi_bootargs(char *args) 524 { 525 int integer; 526 527 if (get_bootconf_option(args, "single", BOOTOPT_TYPE_BOOLEAN, &integer) 528 || get_bootconf_option(args, "-s", BOOTOPT_TYPE_BOOLEAN, &integer)) 529 if (integer) 530 boothowto |= RB_SINGLE; 531 if (get_bootconf_option(args, "kdb", BOOTOPT_TYPE_BOOLEAN, &integer) 532 || get_bootconf_option(args, "-k", BOOTOPT_TYPE_BOOLEAN, &integer) 533 || get_bootconf_option(args, "-d", BOOTOPT_TYPE_BOOLEAN, &integer)) 534 if (integer) 535 boothowto |= RB_KDB; 536 if (get_bootconf_option(args, "ask", BOOTOPT_TYPE_BOOLEAN, &integer) 537 || get_bootconf_option(args, "-a", BOOTOPT_TYPE_BOOLEAN, &integer)) 538 if (integer) 539 boothowto |= RB_ASKNAME; 540 541 #ifdef PMAP_DEBUG 542 if (get_bootconf_option(args, "pmapdebug", BOOTOPT_TYPE_INT, &integer)) { 543 pmap_debug_level = integer; 544 pmap_debug(pmap_debug_level); 545 } 546 #endif /* PMAP_DEBUG */ 547 548 /* if (get_bootconf_option(args, "nbuf", BOOTOPT_TYPE_INT, &integer)) 549 bufpages = integer;*/ 550 551 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 552 if (get_bootconf_option(args, "memorydisc", BOOTOPT_TYPE_INT, &integer) 553 || get_bootconf_option(args, "memorydisk", BOOTOPT_TYPE_INT, &integer)) { 554 md_root_size = integer; 555 md_root_size *= 1024; 556 if (md_root_size < 32*1024) 557 md_root_size = 32*1024; 558 if (md_root_size > 2048*1024) 559 md_root_size = 2048*1024; 560 } 561 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 562 563 if (get_bootconf_option(args, "quiet", BOOTOPT_TYPE_BOOLEAN, &integer) 564 || get_bootconf_option(args, "-q", BOOTOPT_TYPE_BOOLEAN, &integer)) 565 if (integer) 566 boothowto |= AB_QUIET; 567 if (get_bootconf_option(args, "verbose", BOOTOPT_TYPE_BOOLEAN, &integer) 568 || get_bootconf_option(args, "-v", BOOTOPT_TYPE_BOOLEAN, &integer)) 569 if (integer) 570 boothowto |= AB_VERBOSE; 571 if (get_bootconf_option(args, "debug", BOOTOPT_TYPE_BOOLEAN, &integer) 572 || get_bootconf_option(args, "-x", BOOTOPT_TYPE_BOOLEAN, &integer)) 573 if (integer) 574 boothowto |= AB_DEBUG; 575 } 576 577 #ifdef __HAVE_FAST_SOFTINTS 578 #if IPL_SOFTSERIAL != IPL_SOFTNET + 1 579 #error IPLs are screwed up 580 #elif IPL_SOFTNET != IPL_SOFTBIO + 1 581 #error IPLs are screwed up 582 #elif IPL_SOFTBIO != IPL_SOFTCLOCK + 1 583 #error IPLs are screwed up 584 #elif !(IPL_SOFTCLOCK > IPL_NONE) 585 #error IPLs are screwed up 586 #elif (IPL_NONE != 0) 587 #error IPLs are screwed up 588 #endif 589 590 #ifndef __HAVE_PIC_FAST_SOFTINTS 591 #define SOFTINT2IPLMAP \ 592 (((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \ 593 ((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \ 594 ((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \ 595 ((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4))) 596 #define SOFTINT2IPL(l) ((SOFTINT2IPLMAP >> ((l) * 4)) & 0x0f) 597 598 /* 599 * This returns a mask of softint IPLs that be dispatch at <ipl> 600 * SOFTIPLMASK(IPL_NONE) = 0x0000000f 601 * SOFTIPLMASK(IPL_SOFTCLOCK) = 0x0000000e 602 * SOFTIPLMASK(IPL_SOFTBIO) = 0x0000000c 603 * SOFTIPLMASK(IPL_SOFTNET) = 0x00000008 604 * SOFTIPLMASK(IPL_SOFTSERIAL) = 0x00000000 605 */ 606 #define SOFTIPLMASK(ipl) ((0x0f << (ipl)) & 0x0f) 607 608 void softint_switch(lwp_t *, int); 609 610 void 611 softint_trigger(uintptr_t mask) 612 { 613 curcpu()->ci_softints |= mask; 614 } 615 616 void 617 softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep) 618 { 619 lwp_t ** lp = &l->l_cpu->ci_softlwps[level]; 620 KASSERT(*lp == NULL || *lp == l); 621 *lp = l; 622 *machdep = 1 << SOFTINT2IPL(level); 623 KASSERT(level != SOFTINT_CLOCK || *machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK))); 624 KASSERT(level != SOFTINT_BIO || *machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK))); 625 KASSERT(level != SOFTINT_NET || *machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK))); 626 KASSERT(level != SOFTINT_SERIAL || *machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK))); 627 } 628 629 void 630 dosoftints(void) 631 { 632 struct cpu_info * const ci = curcpu(); 633 const int opl = ci->ci_cpl; 634 const uint32_t softiplmask = SOFTIPLMASK(opl); 635 636 splhigh(); 637 for (;;) { 638 u_int softints = ci->ci_softints & softiplmask; 639 KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0)); 640 KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0); 641 if (softints == 0) { 642 splx(opl); 643 return; 644 } 645 #define DOSOFTINT(n) \ 646 if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \ 647 ci->ci_softints &= \ 648 ~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \ 649 softint_switch(ci->ci_softlwps[SOFTINT_ ## n], \ 650 IPL_SOFT ## n); \ 651 continue; \ 652 } 653 DOSOFTINT(SERIAL); 654 DOSOFTINT(NET); 655 DOSOFTINT(BIO); 656 DOSOFTINT(CLOCK); 657 panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl); 658 } 659 } 660 #endif /* !__HAVE_PIC_FAST_SOFTINTS */ 661 #endif /* __HAVE_FAST_SOFTINTS */ 662 663 #ifdef MODULAR 664 /* 665 * Push any modules loaded by the boot loader. 666 */ 667 void 668 module_init_md(void) 669 { 670 } 671 #endif /* MODULAR */ 672 673 int 674 mm_md_physacc(paddr_t pa, vm_prot_t prot) 675 { 676 if (pa >= physical_start && pa < physical_end) 677 return 0; 678 679 return kauth_authorize_machdep(kauth_cred_get(), 680 KAUTH_MACHDEP_UNMANAGEDMEM, NULL, NULL, NULL, NULL); 681 } 682 683 #ifdef __HAVE_CPU_UAREA_ALLOC_IDLELWP 684 vaddr_t 685 cpu_uarea_alloc_idlelwp(struct cpu_info *ci) 686 { 687 const vaddr_t va = idlestack.pv_va + ci->ci_cpuid * USPACE; 688 // printf("%s: %s: va=%lx\n", __func__, ci->ci_data.cpu_name, va); 689 return va; 690 } 691 #endif 692 693 #ifdef MULTIPROCESSOR 694 void 695 cpu_boot_secondary_processors(void) 696 { 697 VPRINTF("%s: writing mbox with %#x\n", __func__, arm_cpu_hatched); 698 arm_cpu_mbox = arm_cpu_hatched; 699 membar_producer(); 700 #ifdef _ARM_ARCH_7 701 __asm __volatile("sev; sev; sev"); 702 #endif 703 while (arm_cpu_mbox) { 704 __asm("wfe"); 705 } 706 } 707 708 void 709 xc_send_ipi(struct cpu_info *ci) 710 { 711 KASSERT(kpreempt_disabled()); 712 KASSERT(curcpu() != ci); 713 714 intr_ipi_send(ci != NULL ? ci->ci_kcpuset : NULL, IPI_XCALL); 715 } 716 717 void 718 cpu_ipi(struct cpu_info *ci) 719 { 720 KASSERT(kpreempt_disabled()); 721 KASSERT(curcpu() != ci); 722 723 intr_ipi_send(ci != NULL ? ci->ci_kcpuset : NULL, IPI_GENERIC); 724 } 725 726 #endif /* MULTIPROCESSOR */ 727 728 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 729 bool 730 mm_md_direct_mapped_phys(paddr_t pa, vaddr_t *vap) 731 { 732 bool rv; 733 vaddr_t va = pmap_direct_mapped_phys(pa, &rv, 0); 734 if (rv) { 735 *vap = va; 736 } 737 return rv; 738 } 739 #endif 740 741 bool 742 mm_md_page_color(paddr_t pa, int *colorp) 743 { 744 #if (ARM_MMU_V6 + ARM_MMU_V7) != 0 745 *colorp = atop(pa & arm_cache_prefer_mask); 746 747 return arm_cache_prefer_mask ? false : true; 748 #else 749 *colorp = 0; 750 751 return true; 752 #endif 753 } 754 755 #if defined(FDT) 756 extern char KERNEL_BASE_phys[]; 757 #define KERNEL_BASE_PHYS ((paddr_t)KERNEL_BASE_phys) 758 759 void 760 cpu_kernel_vm_init(paddr_t memory_start, psize_t memory_size) 761 { 762 const struct arm_platform *plat = arm_fdt_platform(); 763 764 #ifdef VERBOSE_INIT_ARM 765 extern char _end[]; 766 767 const vaddr_t kernend = round_page((vaddr_t)_end); 768 769 const paddr_t kernstart_phys = KERNEL_BASE_PHYS; 770 const paddr_t kernend_phys = KERN_VTOPHYS(kernend); 771 #endif 772 773 VPRINTF("KERNEL_BASE=0x%x, " 774 "KERNEL_VM_BASE=0x%x, " 775 "KERNEL_VM_BASE - KERNEL_BASE=0x%x, " 776 "KERNEL_BASE_VOFFSET=0x%x\n", 777 KERNEL_BASE, 778 KERNEL_VM_BASE, 779 KERNEL_VM_BASE - KERNEL_BASE, 780 KERNEL_BASE_VOFFSET); 781 782 VPRINTF("%s: kernel phys start %lx end %lx\n", __func__, 783 kernstart_phys, kernend_phys); 784 785 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 786 const bool mapallmem_p = true; 787 #ifndef PMAP_NEED_ALLOC_POOLPAGE 788 if (memory_size > KERNEL_VM_BASE - KERNEL_BASE) { 789 VPRINTF("%s: dropping RAM size from %luMB to %uMB\n", 790 __func__, (unsigned long) (memory_size >> 20), 791 (KERNEL_VM_BASE - KERNEL_BASE) >> 20); 792 memory_size = KERNEL_VM_BASE - KERNEL_BASE; 793 } 794 #endif 795 #else 796 const bool mapallmem_p = false; 797 #endif 798 799 arm32_bootmem_init(memory_start, memory_size, KERNEL_BASE_PHYS); 800 arm32_kernel_vm_init(KERNEL_VM_BASE, ARM_VECTORS_HIGH, 0, 801 plat->ap_devmap(), mapallmem_p); 802 } 803 #endif 804 805
Indexes created Sun Oct 19 02:09:48 GMT 2025