arm32_machdep.c revision 1.92
1 /* $NetBSD: arm32_machdep.c,v 1.92 2013/02/03 15:57:09 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Mark Brinicombe 21 * for the NetBSD Project. 22 * 4. The name of the company nor the name of the author may be used to 23 * endorse or promote products derived from this software without specific 24 * prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED 27 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 28 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 29 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 30 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 31 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 32 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * Machine dependent functions for kernel setup 39 * 40 * Created : 17/09/94 41 * Updated : 18/04/01 updated for new wscons 42 */ 43 44 #include <sys/cdefs.h> 45 __KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.92 2013/02/03 15:57:09 matt Exp $"); 46 47 #include "opt_modular.h" 48 #include "opt_md.h" 49 #include "opt_pmap_debug.h" 50 51 #include <sys/param.h> 52 #include <sys/systm.h> 53 #include <sys/reboot.h> 54 #include <sys/proc.h> 55 #include <sys/kauth.h> 56 #include <sys/kernel.h> 57 #include <sys/mbuf.h> 58 #include <sys/mount.h> 59 #include <sys/buf.h> 60 #include <sys/msgbuf.h> 61 #include <sys/device.h> 62 #include <sys/sysctl.h> 63 #include <sys/cpu.h> 64 #include <sys/intr.h> 65 #include <sys/module.h> 66 #include <sys/atomic.h> 67 #include <sys/xcall.h> 68 69 #include <uvm/uvm_extern.h> 70 71 #include <dev/cons.h> 72 #include <dev/mm.h> 73 74 #include <arm/arm32/katelib.h> 75 #include <arm/arm32/machdep.h> 76 77 #include <machine/bootconfig.h> 78 #include <machine/pcb.h> 79 80 void (*cpu_reset_address)(void); /* Used by locore */ 81 paddr_t cpu_reset_address_paddr; /* Used by locore */ 82 83 struct vm_map *phys_map = NULL; 84 85 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 86 extern size_t md_root_size; /* Memory disc size */ 87 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 88 89 pv_addr_t kernelstack; 90 pv_addr_t abtstack; 91 pv_addr_t fiqstack; 92 pv_addr_t irqstack; 93 pv_addr_t undstack; 94 pv_addr_t idlestack; 95 96 void * msgbufaddr; 97 extern paddr_t msgbufphys; 98 99 int kernel_debug = 0; 100 int cpu_fpu_present; 101 int cpu_neon_present; 102 int cpu_simd_present; 103 int cpu_simdex_present; 104 int cpu_umull_present; 105 const char *cpu_arch = ""; 106 107 int cpu_instruction_set_attributes[6]; 108 int cpu_memory_model_features[4]; 109 int cpu_processor_features[2]; 110 int cpu_media_and_vfp_features[2]; 111 112 /* exported variable to be filled in by the bootloaders */ 113 char *booted_kernel; 114 115 /* Prototypes */ 116 117 void data_abort_handler(trapframe_t *frame); 118 void prefetch_abort_handler(trapframe_t *frame); 119 extern void configure(void); 120 121 /* 122 * arm32_vector_init: 123 * 124 * Initialize the vector page, and select whether or not to 125 * relocate the vectors. 126 * 127 * NOTE: We expect the vector page to be mapped at its expected 128 * destination. 129 */ 130 void 131 arm32_vector_init(vaddr_t va, int which) 132 { 133 if (CPU_IS_PRIMARY(curcpu())) { 134 extern unsigned int page0[], page0_data[]; 135 unsigned int *vectors = (int *) va; 136 unsigned int *vectors_data = vectors + (page0_data - page0); 137 int vec; 138 139 /* 140 * Loop through the vectors we're taking over, and copy the 141 * vector's insn and data word. 142 */ 143 for (vec = 0; vec < ARM_NVEC; vec++) { 144 if ((which & (1 << vec)) == 0) { 145 /* Don't want to take over this vector. */ 146 continue; 147 } 148 vectors[vec] = page0[vec]; 149 vectors_data[vec] = page0_data[vec]; 150 } 151 152 /* Now sync the vectors. */ 153 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int)); 154 155 vector_page = va; 156 } 157 158 if (va == ARM_VECTORS_HIGH) { 159 /* 160 * Assume the MD caller knows what it's doing here, and 161 * really does want the vector page relocated. 162 * 163 * Note: This has to be done here (and not just in 164 * cpu_setup()) because the vector page needs to be 165 * accessible *before* cpu_startup() is called. 166 * Think ddb(9) ... 167 * 168 * NOTE: If the CPU control register is not readable, 169 * this will totally fail! We'll just assume that 170 * any system that has high vector support has a 171 * readable CPU control register, for now. If we 172 * ever encounter one that does not, we'll have to 173 * rethink this. 174 */ 175 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC); 176 } 177 } 178 179 /* 180 * Debug function just to park the CPU 181 */ 182 183 void 184 halt(void) 185 { 186 while (1) 187 cpu_sleep(0); 188 } 189 190 191 /* Sync the discs, unmount the filesystems, and adjust the todr */ 192 193 void 194 bootsync(void) 195 { 196 static bool bootsyncdone = false; 197 198 if (bootsyncdone) return; 199 200 bootsyncdone = true; 201 202 /* Make sure we can still manage to do things */ 203 if (GetCPSR() & I32_bit) { 204 /* 205 * If we get here then boot has been called without RB_NOSYNC 206 * and interrupts were disabled. This means the boot() call 207 * did not come from a user process e.g. shutdown, but must 208 * have come from somewhere in the kernel. 209 */ 210 IRQenable; 211 printf("Warning IRQ's disabled during boot()\n"); 212 } 213 214 vfs_shutdown(); 215 216 resettodr(); 217 } 218 219 /* 220 * void cpu_startup(void) 221 * 222 * Machine dependent startup code. 223 * 224 */ 225 void 226 cpu_startup(void) 227 { 228 vaddr_t minaddr; 229 vaddr_t maxaddr; 230 u_int loop; 231 char pbuf[9]; 232 233 /* 234 * Until we better locking, we have to live under the kernel lock. 235 */ 236 //KERNEL_LOCK(1, NULL); 237 238 /* Set the CPU control register */ 239 cpu_setup(boot_args); 240 241 /* Lock down zero page */ 242 vector_page_setprot(VM_PROT_READ); 243 244 /* 245 * Give pmap a chance to set up a few more things now the vm 246 * is initialised 247 */ 248 pmap_postinit(); 249 250 /* 251 * Initialize error message buffer (at end of core). 252 */ 253 254 /* msgbufphys was setup during the secondary boot strap */ 255 for (loop = 0; loop < btoc(MSGBUFSIZE); ++loop) 256 pmap_kenter_pa((vaddr_t)msgbufaddr + loop * PAGE_SIZE, 257 msgbufphys + loop * PAGE_SIZE, 258 VM_PROT_READ|VM_PROT_WRITE, 0); 259 pmap_update(pmap_kernel()); 260 initmsgbuf(msgbufaddr, round_page(MSGBUFSIZE)); 261 262 /* 263 * Identify ourselves for the msgbuf (everything printed earlier will 264 * not be buffered). 265 */ 266 printf("%s%s", copyright, version); 267 268 format_bytes(pbuf, sizeof(pbuf), arm_ptob(physmem)); 269 printf("total memory = %s\n", pbuf); 270 271 minaddr = 0; 272 273 /* 274 * Allocate a submap for physio 275 */ 276 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 277 VM_PHYS_SIZE, 0, false, NULL); 278 279 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 280 printf("avail memory = %s\n", pbuf); 281 282 struct lwp * const l = &lwp0; 283 struct pcb * const pcb = lwp_getpcb(l); 284 pcb->pcb_ksp = uvm_lwp_getuarea(l) + USPACE_SVC_STACK_TOP; 285 lwp_settrapframe(l, (struct trapframe *)pcb->pcb_ksp - 1); 286 } 287 288 /* 289 * machine dependent system variables. 290 */ 291 static int 292 sysctl_machdep_booted_device(SYSCTLFN_ARGS) 293 { 294 struct sysctlnode node; 295 296 if (booted_device == NULL) 297 return (EOPNOTSUPP); 298 299 node = *rnode; 300 node.sysctl_data = __UNCONST(device_xname(booted_device)); 301 node.sysctl_size = strlen(device_xname(booted_device)) + 1; 302 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 303 } 304 305 static int 306 sysctl_machdep_booted_kernel(SYSCTLFN_ARGS) 307 { 308 struct sysctlnode node; 309 310 if (booted_kernel == NULL || booted_kernel[0] == '\0') 311 return (EOPNOTSUPP); 312 313 node = *rnode; 314 node.sysctl_data = booted_kernel; 315 node.sysctl_size = strlen(booted_kernel) + 1; 316 return (sysctl_lookup(SYSCTLFN_CALL(&node))); 317 } 318 319 static int 320 sysctl_machdep_cpu_arch(SYSCTLFN_ARGS) 321 { 322 struct sysctlnode node = *rnode; 323 node.sysctl_data = __UNCONST(cpu_arch); 324 node.sysctl_size = strlen(cpu_arch) + 1; 325 return sysctl_lookup(SYSCTLFN_CALL(&node)); 326 } 327 328 static int 329 sysctl_machdep_powersave(SYSCTLFN_ARGS) 330 { 331 struct sysctlnode node = *rnode; 332 int error, newval; 333 334 newval = cpu_do_powersave; 335 node.sysctl_data = &newval; 336 if (cpufuncs.cf_sleep == (void *) cpufunc_nullop) 337 node.sysctl_flags &= ~CTLFLAG_READWRITE; 338 error = sysctl_lookup(SYSCTLFN_CALL(&node)); 339 if (error || newp == NULL || newval == cpu_do_powersave) 340 return (error); 341 342 if (newval < 0 || newval > 1) 343 return (EINVAL); 344 cpu_do_powersave = newval; 345 346 return (0); 347 } 348 349 SYSCTL_SETUP(sysctl_machdep_setup, "sysctl machdep subtree setup") 350 { 351 352 sysctl_createv(clog, 0, NULL, NULL, 353 CTLFLAG_PERMANENT, 354 CTLTYPE_NODE, "machdep", NULL, 355 NULL, 0, NULL, 0, 356 CTL_MACHDEP, CTL_EOL); 357 358 sysctl_createv(clog, 0, NULL, NULL, 359 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 360 CTLTYPE_INT, "debug", NULL, 361 NULL, 0, &kernel_debug, 0, 362 CTL_MACHDEP, CPU_DEBUG, CTL_EOL); 363 sysctl_createv(clog, 0, NULL, NULL, 364 CTLFLAG_PERMANENT, 365 CTLTYPE_STRING, "booted_device", NULL, 366 sysctl_machdep_booted_device, 0, NULL, 0, 367 CTL_MACHDEP, CPU_BOOTED_DEVICE, CTL_EOL); 368 sysctl_createv(clog, 0, NULL, NULL, 369 CTLFLAG_PERMANENT, 370 CTLTYPE_STRING, "booted_kernel", NULL, 371 sysctl_machdep_booted_kernel, 0, NULL, 0, 372 CTL_MACHDEP, CPU_BOOTED_KERNEL, CTL_EOL); 373 sysctl_createv(clog, 0, NULL, NULL, 374 CTLFLAG_PERMANENT, 375 CTLTYPE_STRUCT, "console_device", NULL, 376 sysctl_consdev, 0, NULL, sizeof(dev_t), 377 CTL_MACHDEP, CPU_CONSDEV, CTL_EOL); 378 sysctl_createv(clog, 0, NULL, NULL, 379 CTLFLAG_PERMANENT, 380 CTLTYPE_STRING, "cpu_arch", NULL, 381 sysctl_machdep_cpu_arch, 0, NULL, 0, 382 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 383 sysctl_createv(clog, 0, NULL, NULL, 384 CTLFLAG_PERMANENT|CTLFLAG_READWRITE, 385 CTLTYPE_INT, "powersave", NULL, 386 sysctl_machdep_powersave, 0, &cpu_do_powersave, 0, 387 CTL_MACHDEP, CPU_POWERSAVE, CTL_EOL); 388 sysctl_createv(clog, 0, NULL, NULL, 389 CTLFLAG_PERMANENT|CTLFLAG_IMMEDIATE, 390 CTLTYPE_INT, "cpu_id", NULL, 391 NULL, curcpu()->ci_arm_cpuid, NULL, 0, 392 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 393 #ifdef FPU_VFP 394 sysctl_createv(clog, 0, NULL, NULL, 395 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 396 CTLTYPE_INT, "fpu_id", NULL, 397 NULL, 0, &cpu_info_store.ci_vfp_id, 0, 398 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 399 #endif 400 sysctl_createv(clog, 0, NULL, NULL, 401 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 402 CTLTYPE_INT, "fpu_present", NULL, 403 NULL, 0, &cpu_fpu_present, 0, 404 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 405 sysctl_createv(clog, 0, NULL, NULL, 406 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 407 CTLTYPE_INT, "neon_present", NULL, 408 NULL, 0, &cpu_neon_present, 0, 409 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 410 sysctl_createv(clog, 0, NULL, NULL, 411 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 412 CTLTYPE_STRUCT, "id_isar", NULL, 413 NULL, 0, 414 cpu_instruction_set_attributes, 415 sizeof(cpu_instruction_set_attributes), 416 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 417 sysctl_createv(clog, 0, NULL, NULL, 418 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 419 CTLTYPE_STRUCT, "id_mmfr", NULL, 420 NULL, 0, 421 cpu_memory_model_features, 422 sizeof(cpu_memory_model_features), 423 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 424 sysctl_createv(clog, 0, NULL, NULL, 425 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 426 CTLTYPE_STRUCT, "id_pfr", NULL, 427 NULL, 0, 428 cpu_processor_features, 429 sizeof(cpu_processor_features), 430 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 431 sysctl_createv(clog, 0, NULL, NULL, 432 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 433 CTLTYPE_STRUCT, "id_mvfr", NULL, 434 NULL, 0, 435 cpu_media_and_vfp_features, 436 sizeof(cpu_media_and_vfp_features), 437 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 438 sysctl_createv(clog, 0, NULL, NULL, 439 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 440 CTLTYPE_INT, "simd_present", NULL, 441 NULL, 0, &cpu_simd_present, 0, 442 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 443 sysctl_createv(clog, 0, NULL, NULL, 444 CTLFLAG_PERMANENT|CTLFLAG_READONLY, 445 CTLTYPE_INT, "simdex_present", NULL, 446 NULL, 0, &cpu_simdex_present, 0, 447 CTL_MACHDEP, CTL_CREATE, CTL_EOL); 448 } 449 450 void 451 parse_mi_bootargs(char *args) 452 { 453 int integer; 454 455 if (get_bootconf_option(args, "single", BOOTOPT_TYPE_BOOLEAN, &integer) 456 || get_bootconf_option(args, "-s", BOOTOPT_TYPE_BOOLEAN, &integer)) 457 if (integer) 458 boothowto |= RB_SINGLE; 459 if (get_bootconf_option(args, "kdb", BOOTOPT_TYPE_BOOLEAN, &integer) 460 || get_bootconf_option(args, "-k", BOOTOPT_TYPE_BOOLEAN, &integer) 461 || get_bootconf_option(args, "-d", BOOTOPT_TYPE_BOOLEAN, &integer)) 462 if (integer) 463 boothowto |= RB_KDB; 464 if (get_bootconf_option(args, "ask", BOOTOPT_TYPE_BOOLEAN, &integer) 465 || get_bootconf_option(args, "-a", BOOTOPT_TYPE_BOOLEAN, &integer)) 466 if (integer) 467 boothowto |= RB_ASKNAME; 468 469 #ifdef PMAP_DEBUG 470 if (get_bootconf_option(args, "pmapdebug", BOOTOPT_TYPE_INT, &integer)) { 471 pmap_debug_level = integer; 472 pmap_debug(pmap_debug_level); 473 } 474 #endif /* PMAP_DEBUG */ 475 476 /* if (get_bootconf_option(args, "nbuf", BOOTOPT_TYPE_INT, &integer)) 477 bufpages = integer;*/ 478 479 #if defined(MEMORY_DISK_HOOKS) && !defined(MEMORY_DISK_ROOT_SIZE) 480 if (get_bootconf_option(args, "memorydisc", BOOTOPT_TYPE_INT, &integer) 481 || get_bootconf_option(args, "memorydisk", BOOTOPT_TYPE_INT, &integer)) { 482 md_root_size = integer; 483 md_root_size *= 1024; 484 if (md_root_size < 32*1024) 485 md_root_size = 32*1024; 486 if (md_root_size > 2048*1024) 487 md_root_size = 2048*1024; 488 } 489 #endif /* MEMORY_DISK_HOOKS && !MEMORY_DISK_ROOT_SIZE */ 490 491 if (get_bootconf_option(args, "quiet", BOOTOPT_TYPE_BOOLEAN, &integer) 492 || get_bootconf_option(args, "-q", BOOTOPT_TYPE_BOOLEAN, &integer)) 493 if (integer) 494 boothowto |= AB_QUIET; 495 if (get_bootconf_option(args, "verbose", BOOTOPT_TYPE_BOOLEAN, &integer) 496 || get_bootconf_option(args, "-v", BOOTOPT_TYPE_BOOLEAN, &integer)) 497 if (integer) 498 boothowto |= AB_VERBOSE; 499 } 500 501 #ifdef __HAVE_FAST_SOFTINTS 502 #if IPL_SOFTSERIAL != IPL_SOFTNET + 1 503 #error IPLs are screwed up 504 #elif IPL_SOFTNET != IPL_SOFTBIO + 1 505 #error IPLs are screwed up 506 #elif IPL_SOFTBIO != IPL_SOFTCLOCK + 1 507 #error IPLs are screwed up 508 #elif !(IPL_SOFTCLOCK > IPL_NONE) 509 #error IPLs are screwed up 510 #elif (IPL_NONE != 0) 511 #error IPLs are screwed up 512 #endif 513 514 #ifndef __HAVE_PIC_FAST_SOFTINTS 515 #define SOFTINT2IPLMAP \ 516 (((IPL_SOFTSERIAL - IPL_SOFTCLOCK) << (SOFTINT_SERIAL * 4)) | \ 517 ((IPL_SOFTNET - IPL_SOFTCLOCK) << (SOFTINT_NET * 4)) | \ 518 ((IPL_SOFTBIO - IPL_SOFTCLOCK) << (SOFTINT_BIO * 4)) | \ 519 ((IPL_SOFTCLOCK - IPL_SOFTCLOCK) << (SOFTINT_CLOCK * 4))) 520 #define SOFTINT2IPL(l) ((SOFTINT2IPLMAP >> ((l) * 4)) & 0x0f) 521 522 /* 523 * This returns a mask of softint IPLs that be dispatch at <ipl> 524 * SOFTIPLMASK(IPL_NONE) = 0x0000000f 525 * SOFTIPLMASK(IPL_SOFTCLOCK) = 0x0000000e 526 * SOFTIPLMASK(IPL_SOFTBIO) = 0x0000000c 527 * SOFTIPLMASK(IPL_SOFTNET) = 0x00000008 528 * SOFTIPLMASK(IPL_SOFTSERIAL) = 0x00000000 529 */ 530 #define SOFTIPLMASK(ipl) ((0x0f << (ipl)) & 0x0f) 531 532 void softint_switch(lwp_t *, int); 533 534 void 535 softint_trigger(uintptr_t mask) 536 { 537 curcpu()->ci_softints |= mask; 538 } 539 540 void 541 softint_init_md(lwp_t *l, u_int level, uintptr_t *machdep) 542 { 543 lwp_t ** lp = &l->l_cpu->ci_softlwps[level]; 544 KASSERT(*lp == NULL || *lp == l); 545 *lp = l; 546 *machdep = 1 << SOFTINT2IPL(level); 547 KASSERT(level != SOFTINT_CLOCK || *machdep == (1 << (IPL_SOFTCLOCK - IPL_SOFTCLOCK))); 548 KASSERT(level != SOFTINT_BIO || *machdep == (1 << (IPL_SOFTBIO - IPL_SOFTCLOCK))); 549 KASSERT(level != SOFTINT_NET || *machdep == (1 << (IPL_SOFTNET - IPL_SOFTCLOCK))); 550 KASSERT(level != SOFTINT_SERIAL || *machdep == (1 << (IPL_SOFTSERIAL - IPL_SOFTCLOCK))); 551 } 552 553 void 554 dosoftints(void) 555 { 556 struct cpu_info * const ci = curcpu(); 557 const int opl = ci->ci_cpl; 558 const uint32_t softiplmask = SOFTIPLMASK(opl); 559 560 splhigh(); 561 for (;;) { 562 u_int softints = ci->ci_softints & softiplmask; 563 KASSERT((softints != 0) == ((ci->ci_softints >> opl) != 0)); 564 KASSERT(opl == IPL_NONE || (softints & (1 << (opl - IPL_SOFTCLOCK))) == 0); 565 if (softints == 0) { 566 splx(opl); 567 return; 568 } 569 #define DOSOFTINT(n) \ 570 if (ci->ci_softints & (1 << (IPL_SOFT ## n - IPL_SOFTCLOCK))) { \ 571 ci->ci_softints &= \ 572 ~(1 << (IPL_SOFT ## n - IPL_SOFTCLOCK)); \ 573 softint_switch(ci->ci_softlwps[SOFTINT_ ## n], \ 574 IPL_SOFT ## n); \ 575 continue; \ 576 } 577 DOSOFTINT(SERIAL); 578 DOSOFTINT(NET); 579 DOSOFTINT(BIO); 580 DOSOFTINT(CLOCK); 581 panic("dosoftints wtf (softints=%u?, ipl=%d)", softints, opl); 582 } 583 } 584 #endif /* !__HAVE_PIC_FAST_SOFTINTS */ 585 #endif /* __HAVE_FAST_SOFTINTS */ 586 587 #ifdef MODULAR 588 /* 589 * Push any modules loaded by the boot loader. 590 */ 591 void 592 module_init_md(void) 593 { 594 } 595 #endif /* MODULAR */ 596 597 int 598 mm_md_physacc(paddr_t pa, vm_prot_t prot) 599 { 600 601 return (pa < ctob(physmem)) ? 0 : EFAULT; 602 } 603 604 #ifdef __HAVE_CPU_UAREA_ALLOC_IDLELWP 605 vaddr_t 606 cpu_uarea_alloc_idlelwp(struct cpu_info *ci) 607 { 608 const vaddr_t va = idlestack.pv_va + ci->ci_cpuid * USPACE; 609 // printf("%s: %s: va=%lx\n", __func__, ci->ci_data.cpu_name, va); 610 return va; 611 } 612 #endif 613 614 #ifdef MULTIPROCESSOR 615 void 616 cpu_boot_secondary_processors(void) 617 { 618 uint32_t mbox; 619 kcpuset_export_u32(kcpuset_attached, &mbox, sizeof(mbox)); 620 atomic_swap_32(&arm_cpu_mbox, mbox); 621 membar_producer(); 622 #ifdef _ARM_ARCH_7 623 __asm __volatile("sev; sev; sev"); 624 #endif 625 } 626 627 void 628 xc_send_ipi(struct cpu_info *ci) 629 { 630 KASSERT(kpreempt_disabled()); 631 KASSERT(curcpu() != ci); 632 633 634 if (ci) { 635 /* Unicast, remote CPU */ 636 printf("%s: -> %s", __func__, ci->ci_data.cpu_name); 637 intr_ipi_send(ci->ci_kcpuset, IPI_XCALL); 638 } else { 639 printf("%s: -> !%s", __func__, ci->ci_data.cpu_name); 640 /* Broadcast to all but ourselves */ 641 kcpuset_t *kcp; 642 kcpuset_create(&kcp, (ci != NULL)); 643 KASSERT(kcp != NULL); 644 kcpuset_copy(kcp, kcpuset_running); 645 kcpuset_clear(kcp, cpu_index(ci)); 646 intr_ipi_send(kcp, IPI_XCALL); 647 kcpuset_destroy(kcp); 648 } 649 printf("\n"); 650 } 651 #endif /* MULTIPROCESSOR */ 652 653 #ifdef __HAVE_MM_MD_DIRECT_MAPPED_PHYS 654 bool 655 mm_md_direct_mapped_phys(paddr_t pa, vaddr_t *vap) 656 { 657 if (physical_start <= pa && pa < physical_end) { 658 *vap = KERNEL_BASE + (pa - physical_start); 659 return true; 660 } 661 662 return false; 663 } 664 #endif 665
Indexes created Sun Sep 28 16:09:52 GMT 2025