armv7_generic_space.c revision 1.4 1 1.4 skrll /* $NetBSD: armv7_generic_space.c,v 1.4 2017/11/27 07:44:27 skrll Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2012 The NetBSD Foundation, Inc.
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * This code is derived from software contributed to The NetBSD Foundation
8 1.1 jmcneill * by Nick Hudson
9 1.1 jmcneill *
10 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
11 1.1 jmcneill * modification, are permitted provided that the following conditions
12 1.1 jmcneill * are met:
13 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
14 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
15 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
17 1.1 jmcneill * documentation and/or other materials provided with the distribution.
18 1.1 jmcneill *
19 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 jmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 jmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 jmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 jmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 jmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 jmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 jmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 jmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 jmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 jmcneill * POSSIBILITY OF SUCH DAMAGE.
30 1.1 jmcneill */
31 1.1 jmcneill
32 1.1 jmcneill
33 1.1 jmcneill #include <sys/cdefs.h>
34 1.4 skrll __KERNEL_RCSID(0, "$NetBSD: armv7_generic_space.c,v 1.4 2017/11/27 07:44:27 skrll Exp $");
35 1.1 jmcneill
36 1.1 jmcneill #include <sys/param.h>
37 1.1 jmcneill #include <sys/systm.h>
38 1.1 jmcneill
39 1.1 jmcneill #include <uvm/uvm_extern.h>
40 1.1 jmcneill
41 1.1 jmcneill #include <sys/bus.h>
42 1.1 jmcneill
43 1.1 jmcneill /* Prototypes for all the bus_space structure functions */
44 1.1 jmcneill bs_protos(armv7_generic);
45 1.1 jmcneill bs_protos(armv7_generic_a4x);
46 1.1 jmcneill bs_protos(a4x);
47 1.1 jmcneill bs_protos(bs_notimpl);
48 1.1 jmcneill bs_protos(generic);
49 1.1 jmcneill bs_protos(generic_armv4);
50 1.1 jmcneill
51 1.1 jmcneill #if __ARMEB__
52 1.1 jmcneill #define NSWAP(n) n ## _swap
53 1.1 jmcneill #else
54 1.1 jmcneill #define NSWAP(n) n
55 1.1 jmcneill #endif
56 1.1 jmcneill
57 1.1 jmcneill struct bus_space armv7_generic_bs_tag = {
58 1.1 jmcneill /* cookie */
59 1.1 jmcneill (void *) 0,
60 1.1 jmcneill
61 1.1 jmcneill /* mapping/unmapping */
62 1.1 jmcneill armv7_generic_bs_map,
63 1.1 jmcneill armv7_generic_bs_unmap,
64 1.1 jmcneill armv7_generic_bs_subregion,
65 1.1 jmcneill
66 1.1 jmcneill /* allocation/deallocation */
67 1.1 jmcneill armv7_generic_bs_alloc, /* not implemented */
68 1.1 jmcneill armv7_generic_bs_free, /* not implemented */
69 1.1 jmcneill
70 1.1 jmcneill /* get kernel virtual address */
71 1.1 jmcneill armv7_generic_bs_vaddr,
72 1.1 jmcneill
73 1.1 jmcneill /* mmap */
74 1.1 jmcneill armv7_generic_bs_mmap,
75 1.1 jmcneill
76 1.1 jmcneill /* barrier */
77 1.1 jmcneill armv7_generic_bs_barrier,
78 1.1 jmcneill
79 1.1 jmcneill /* read (single) */
80 1.1 jmcneill generic_bs_r_1,
81 1.1 jmcneill NSWAP(generic_armv4_bs_r_2),
82 1.1 jmcneill NSWAP(generic_bs_r_4),
83 1.1 jmcneill bs_notimpl_bs_r_8,
84 1.1 jmcneill
85 1.1 jmcneill /* read multiple */
86 1.1 jmcneill generic_bs_rm_1,
87 1.1 jmcneill NSWAP(generic_armv4_bs_rm_2),
88 1.1 jmcneill NSWAP(generic_bs_rm_4),
89 1.1 jmcneill bs_notimpl_bs_rm_8,
90 1.1 jmcneill
91 1.1 jmcneill /* read region */
92 1.1 jmcneill generic_bs_rr_1,
93 1.1 jmcneill NSWAP(generic_armv4_bs_rr_2),
94 1.1 jmcneill NSWAP(generic_bs_rr_4),
95 1.1 jmcneill bs_notimpl_bs_rr_8,
96 1.1 jmcneill
97 1.1 jmcneill /* write (single) */
98 1.1 jmcneill generic_bs_w_1,
99 1.1 jmcneill NSWAP(generic_armv4_bs_w_2),
100 1.1 jmcneill NSWAP(generic_bs_w_4),
101 1.1 jmcneill bs_notimpl_bs_w_8,
102 1.1 jmcneill
103 1.1 jmcneill /* write multiple */
104 1.1 jmcneill generic_bs_wm_1,
105 1.1 jmcneill NSWAP(generic_armv4_bs_wm_2),
106 1.1 jmcneill NSWAP(generic_bs_wm_4),
107 1.1 jmcneill bs_notimpl_bs_wm_8,
108 1.1 jmcneill
109 1.1 jmcneill /* write region */
110 1.1 jmcneill generic_bs_wr_1,
111 1.1 jmcneill NSWAP(generic_armv4_bs_wr_2),
112 1.1 jmcneill NSWAP(generic_bs_wr_4),
113 1.1 jmcneill bs_notimpl_bs_wr_8,
114 1.1 jmcneill
115 1.1 jmcneill /* set multiple */
116 1.1 jmcneill bs_notimpl_bs_sm_1,
117 1.1 jmcneill bs_notimpl_bs_sm_2,
118 1.1 jmcneill bs_notimpl_bs_sm_4,
119 1.1 jmcneill bs_notimpl_bs_sm_8,
120 1.1 jmcneill
121 1.1 jmcneill /* set region */
122 1.1 jmcneill generic_bs_sr_1,
123 1.1 jmcneill NSWAP(generic_armv4_bs_sr_2),
124 1.3 jakllsch NSWAP(generic_bs_sr_4),
125 1.1 jmcneill bs_notimpl_bs_sr_8,
126 1.1 jmcneill
127 1.1 jmcneill /* copy */
128 1.1 jmcneill bs_notimpl_bs_c_1,
129 1.1 jmcneill generic_armv4_bs_c_2,
130 1.1 jmcneill bs_notimpl_bs_c_4,
131 1.1 jmcneill bs_notimpl_bs_c_8,
132 1.1 jmcneill
133 1.1 jmcneill #ifdef __BUS_SPACE_HAS_STREAM_METHODS
134 1.1 jmcneill /* read (single) */
135 1.1 jmcneill generic_bs_r_1,
136 1.1 jmcneill NSWAP(generic_armv4_bs_r_2),
137 1.1 jmcneill NSWAP(generic_bs_r_4),
138 1.1 jmcneill bs_notimpl_bs_r_8,
139 1.1 jmcneill
140 1.1 jmcneill /* read multiple */
141 1.1 jmcneill generic_bs_rm_1,
142 1.1 jmcneill NSWAP(generic_armv4_bs_rm_2),
143 1.1 jmcneill NSWAP(generic_bs_rm_4),
144 1.1 jmcneill bs_notimpl_bs_rm_8,
145 1.1 jmcneill
146 1.1 jmcneill /* read region */
147 1.1 jmcneill generic_bs_rr_1,
148 1.1 jmcneill NSWAP(generic_armv4_bs_rr_2),
149 1.1 jmcneill NSWAP(generic_bs_rr_4),
150 1.1 jmcneill bs_notimpl_bs_rr_8,
151 1.1 jmcneill
152 1.1 jmcneill /* write (single) */
153 1.1 jmcneill generic_bs_w_1,
154 1.1 jmcneill NSWAP(generic_armv4_bs_w_2),
155 1.1 jmcneill NSWAP(generic_bs_w_4),
156 1.1 jmcneill bs_notimpl_bs_w_8,
157 1.1 jmcneill
158 1.1 jmcneill /* write multiple */
159 1.1 jmcneill generic_bs_wm_1,
160 1.1 jmcneill NSWAP(generic_armv4_bs_wm_2),
161 1.1 jmcneill NSWAP(generic_bs_wm_4),
162 1.1 jmcneill bs_notimpl_bs_wm_8,
163 1.1 jmcneill
164 1.1 jmcneill /* write region */
165 1.1 jmcneill generic_bs_wr_1,
166 1.1 jmcneill NSWAP(generic_armv4_bs_wr_2),
167 1.1 jmcneill NSWAP(generic_bs_wr_4),
168 1.1 jmcneill bs_notimpl_bs_wr_8,
169 1.1 jmcneill #endif
170 1.1 jmcneill };
171 1.1 jmcneill
172 1.1 jmcneill struct bus_space armv7_generic_a4x_bs_tag = {
173 1.1 jmcneill /* cookie */
174 1.1 jmcneill (void *) 0,
175 1.1 jmcneill
176 1.1 jmcneill /* mapping/unmapping */
177 1.1 jmcneill armv7_generic_bs_map,
178 1.1 jmcneill armv7_generic_bs_unmap,
179 1.1 jmcneill armv7_generic_a4x_bs_subregion,
180 1.1 jmcneill
181 1.1 jmcneill /* allocation/deallocation */
182 1.1 jmcneill armv7_generic_bs_alloc, /* not implemented */
183 1.1 jmcneill armv7_generic_bs_free, /* not implemented */
184 1.1 jmcneill
185 1.1 jmcneill /* get kernel virtual address */
186 1.1 jmcneill armv7_generic_bs_vaddr,
187 1.1 jmcneill
188 1.1 jmcneill /* mmap */
189 1.1 jmcneill armv7_generic_a4x_bs_mmap,
190 1.1 jmcneill
191 1.1 jmcneill /* barrier */
192 1.1 jmcneill armv7_generic_bs_barrier,
193 1.1 jmcneill
194 1.1 jmcneill /* read (single) */
195 1.1 jmcneill a4x_bs_r_1,
196 1.1 jmcneill NSWAP(a4x_bs_r_2),
197 1.1 jmcneill NSWAP(a4x_bs_r_4),
198 1.1 jmcneill bs_notimpl_bs_r_8,
199 1.1 jmcneill
200 1.1 jmcneill /* read multiple */
201 1.1 jmcneill a4x_bs_rm_1,
202 1.1 jmcneill NSWAP(a4x_bs_rm_2),
203 1.1 jmcneill NSWAP(a4x_bs_rm_4),
204 1.1 jmcneill bs_notimpl_bs_rm_8,
205 1.1 jmcneill
206 1.1 jmcneill /* read region */
207 1.1 jmcneill bs_notimpl_bs_rr_1,
208 1.1 jmcneill bs_notimpl_bs_rr_2,
209 1.1 jmcneill bs_notimpl_bs_rr_4,
210 1.1 jmcneill bs_notimpl_bs_rr_8,
211 1.1 jmcneill
212 1.1 jmcneill /* write (single) */
213 1.1 jmcneill a4x_bs_w_1,
214 1.1 jmcneill NSWAP(a4x_bs_w_2),
215 1.1 jmcneill NSWAP(a4x_bs_w_4),
216 1.1 jmcneill bs_notimpl_bs_w_8,
217 1.1 jmcneill
218 1.1 jmcneill /* write multiple */
219 1.1 jmcneill a4x_bs_wm_1,
220 1.1 jmcneill NSWAP(a4x_bs_wm_2),
221 1.1 jmcneill NSWAP(a4x_bs_wm_4),
222 1.1 jmcneill bs_notimpl_bs_wm_8,
223 1.1 jmcneill
224 1.1 jmcneill /* write region */
225 1.1 jmcneill bs_notimpl_bs_wr_1,
226 1.1 jmcneill bs_notimpl_bs_wr_2,
227 1.1 jmcneill bs_notimpl_bs_wr_4,
228 1.1 jmcneill bs_notimpl_bs_wr_8,
229 1.1 jmcneill
230 1.1 jmcneill /* set multiple */
231 1.1 jmcneill bs_notimpl_bs_sm_1,
232 1.1 jmcneill bs_notimpl_bs_sm_2,
233 1.1 jmcneill bs_notimpl_bs_sm_4,
234 1.1 jmcneill bs_notimpl_bs_sm_8,
235 1.1 jmcneill
236 1.1 jmcneill /* set region */
237 1.1 jmcneill bs_notimpl_bs_sr_1,
238 1.1 jmcneill bs_notimpl_bs_sr_2,
239 1.1 jmcneill bs_notimpl_bs_sr_4,
240 1.1 jmcneill bs_notimpl_bs_sr_8,
241 1.1 jmcneill
242 1.1 jmcneill /* copy */
243 1.1 jmcneill bs_notimpl_bs_c_1,
244 1.1 jmcneill bs_notimpl_bs_c_2,
245 1.1 jmcneill bs_notimpl_bs_c_4,
246 1.1 jmcneill bs_notimpl_bs_c_8,
247 1.1 jmcneill
248 1.1 jmcneill #ifdef __BUS_SPACE_HAS_STREAM_METHODS
249 1.1 jmcneill /* read (single) */
250 1.1 jmcneill a4x_bs_r_1,
251 1.1 jmcneill NSWAP(a4x_bs_r_2),
252 1.1 jmcneill NSWAP(a4x_bs_r_4),
253 1.1 jmcneill bs_notimpl_bs_r_8,
254 1.1 jmcneill
255 1.1 jmcneill /* read multiple */
256 1.1 jmcneill a4x_bs_rm_1,
257 1.1 jmcneill NSWAP(a4x_bs_rm_2),
258 1.1 jmcneill NSWAP(a4x_bs_rm_4),
259 1.1 jmcneill bs_notimpl_bs_rm_8,
260 1.1 jmcneill
261 1.1 jmcneill /* read region */
262 1.2 jmcneill bs_notimpl_bs_rr_1,
263 1.2 jmcneill bs_notimpl_bs_rr_2,
264 1.2 jmcneill bs_notimpl_bs_rr_4,
265 1.1 jmcneill bs_notimpl_bs_rr_8,
266 1.1 jmcneill
267 1.1 jmcneill /* write (single) */
268 1.1 jmcneill a4x_bs_w_1,
269 1.1 jmcneill NSWAP(a4x_bs_w_2),
270 1.1 jmcneill NSWAP(a4x_bs_w_4),
271 1.1 jmcneill bs_notimpl_bs_w_8,
272 1.1 jmcneill
273 1.1 jmcneill /* write multiple */
274 1.1 jmcneill a4x_bs_wm_1,
275 1.1 jmcneill NSWAP(a4x_bs_wm_2),
276 1.1 jmcneill NSWAP(a4x_bs_wm_4),
277 1.1 jmcneill bs_notimpl_bs_wm_8,
278 1.1 jmcneill
279 1.1 jmcneill /* write region */
280 1.2 jmcneill bs_notimpl_bs_wr_1,
281 1.2 jmcneill bs_notimpl_bs_wr_2,
282 1.2 jmcneill bs_notimpl_bs_wr_4,
283 1.1 jmcneill bs_notimpl_bs_wr_8,
284 1.1 jmcneill #endif
285 1.1 jmcneill };
286 1.1 jmcneill
287 1.1 jmcneill int
288 1.1 jmcneill armv7_generic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag,
289 1.1 jmcneill bus_space_handle_t *bshp)
290 1.1 jmcneill {
291 1.1 jmcneill u_long startpa, endpa, pa;
292 1.1 jmcneill const struct pmap_devmap *pd;
293 1.1 jmcneill vaddr_t va;
294 1.1 jmcneill
295 1.1 jmcneill if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) {
296 1.1 jmcneill /* Device was statically mapped. */
297 1.1 jmcneill *bshp = pd->pd_va + (bpa - pd->pd_pa);
298 1.1 jmcneill return 0;
299 1.1 jmcneill }
300 1.1 jmcneill
301 1.1 jmcneill startpa = trunc_page(bpa);
302 1.1 jmcneill endpa = round_page(bpa + size);
303 1.1 jmcneill
304 1.1 jmcneill /* XXX use extent manager to check duplicate mapping */
305 1.1 jmcneill
306 1.1 jmcneill va = uvm_km_alloc(kernel_map, endpa - startpa, 0,
307 1.1 jmcneill UVM_KMF_VAONLY | UVM_KMF_NOWAIT | UVM_KMF_COLORMATCH);
308 1.1 jmcneill if (!va)
309 1.1 jmcneill return ENOMEM;
310 1.1 jmcneill
311 1.1 jmcneill *bshp = (bus_space_handle_t)(va + (bpa - startpa));
312 1.1 jmcneill
313 1.1 jmcneill const int pmapflags =
314 1.1 jmcneill (flag & (BUS_SPACE_MAP_CACHEABLE|BUS_SPACE_MAP_PREFETCHABLE))
315 1.1 jmcneill ? 0
316 1.1 jmcneill : PMAP_NOCACHE;
317 1.1 jmcneill for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) {
318 1.1 jmcneill pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags);
319 1.1 jmcneill }
320 1.1 jmcneill pmap_update(pmap_kernel());
321 1.1 jmcneill
322 1.1 jmcneill return 0;
323 1.1 jmcneill }
324 1.1 jmcneill
325 1.1 jmcneill void
326 1.1 jmcneill armv7_generic_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size)
327 1.1 jmcneill {
328 1.1 jmcneill vaddr_t va;
329 1.1 jmcneill vsize_t sz;
330 1.1 jmcneill
331 1.1 jmcneill if (pmap_devmap_find_va(bsh, size) != NULL) {
332 1.1 jmcneill /* Device was statically mapped; nothing to do. */
333 1.1 jmcneill return;
334 1.1 jmcneill }
335 1.1 jmcneill
336 1.1 jmcneill va = trunc_page(bsh);
337 1.1 jmcneill sz = round_page(bsh + size) - va;
338 1.1 jmcneill
339 1.1 jmcneill pmap_kremove(va, sz);
340 1.1 jmcneill pmap_update(pmap_kernel());
341 1.1 jmcneill uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY);
342 1.1 jmcneill }
343 1.1 jmcneill
344 1.1 jmcneill
345 1.1 jmcneill int
346 1.1 jmcneill armv7_generic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
347 1.1 jmcneill bus_size_t size, bus_space_handle_t *nbshp)
348 1.1 jmcneill {
349 1.1 jmcneill
350 1.1 jmcneill *nbshp = bsh + offset;
351 1.4 skrll return 0;
352 1.1 jmcneill }
353 1.1 jmcneill
354 1.1 jmcneill int
355 1.1 jmcneill armv7_generic_a4x_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset,
356 1.1 jmcneill bus_size_t size, bus_space_handle_t *nbshp)
357 1.1 jmcneill {
358 1.1 jmcneill
359 1.1 jmcneill *nbshp = bsh + 4 * offset;
360 1.4 skrll return 0;
361 1.1 jmcneill }
362 1.1 jmcneill
363 1.1 jmcneill void
364 1.1 jmcneill armv7_generic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset,
365 1.1 jmcneill bus_size_t len, int flags)
366 1.1 jmcneill {
367 1.1 jmcneill flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE;
368 1.1 jmcneill
369 1.1 jmcneill if (flags)
370 1.1 jmcneill arm_dsb();
371 1.1 jmcneill }
372 1.1 jmcneill
373 1.1 jmcneill void *
374 1.1 jmcneill armv7_generic_bs_vaddr(void *t, bus_space_handle_t bsh)
375 1.1 jmcneill {
376 1.1 jmcneill
377 1.1 jmcneill return (void *)bsh;
378 1.1 jmcneill }
379 1.1 jmcneill
380 1.1 jmcneill paddr_t
381 1.1 jmcneill armv7_generic_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
382 1.1 jmcneill {
383 1.1 jmcneill paddr_t bus_flags = 0;
384 1.1 jmcneill
385 1.1 jmcneill if (flags & BUS_SPACE_MAP_PREFETCHABLE)
386 1.1 jmcneill bus_flags |= ARM32_MMAP_WRITECOMBINE;
387 1.1 jmcneill
388 1.4 skrll return arm_btop(bpa + offset) | bus_flags;
389 1.1 jmcneill }
390 1.1 jmcneill
391 1.1 jmcneill paddr_t
392 1.1 jmcneill armv7_generic_a4x_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags)
393 1.1 jmcneill {
394 1.1 jmcneill paddr_t bus_flags = 0;
395 1.1 jmcneill
396 1.1 jmcneill if (flags & BUS_SPACE_MAP_PREFETCHABLE)
397 1.1 jmcneill bus_flags |= ARM32_MMAP_WRITECOMBINE;
398 1.1 jmcneill
399 1.4 skrll return arm_btop(bpa + 4 * offset) | bus_flags;
400 1.1 jmcneill }
401 1.1 jmcneill
402 1.1 jmcneill int
403 1.1 jmcneill armv7_generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend,
404 1.1 jmcneill bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
405 1.1 jmcneill bus_addr_t *bpap, bus_space_handle_t *bshp)
406 1.1 jmcneill {
407 1.1 jmcneill
408 1.1 jmcneill panic("%s(): not implemented\n", __func__);
409 1.1 jmcneill }
410 1.1 jmcneill
411 1.1 jmcneill void
412 1.1 jmcneill armv7_generic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size)
413 1.1 jmcneill {
414 1.1 jmcneill
415 1.1 jmcneill panic("%s(): not implemented\n", __func__);
416 1.1 jmcneill }
417