armv7_generic_space.c revision 1.7
1 /* $NetBSD: armv7_generic_space.c,v 1.7 2018/03/16 17:56:31 ryo Exp $ */ 2 3 /*- 4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: armv7_generic_space.c,v 1.7 2018/03/16 17:56:31 ryo Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 39 #include <uvm/uvm_extern.h> 40 41 #include <sys/bus.h> 42 43 /* Prototypes for all the bus_space structure functions */ 44 bs_protos(armv7_generic); 45 bs_protos(armv7_generic_a4x); 46 bs_protos(a4x); 47 bs_protos(bs_notimpl); 48 bs_protos(generic); 49 bs_protos(generic_armv4); 50 51 #if __ARMEB__ 52 #define NSWAP(n) n ## _swap 53 #else 54 #define NSWAP(n) n 55 #endif 56 57 struct bus_space armv7_generic_bs_tag = { 58 /* cookie */ 59 .bs_cookie = (void *) 0, 60 61 /* mapping/unmapping */ 62 .bs_map = armv7_generic_bs_map, 63 .bs_unmap = armv7_generic_bs_unmap, 64 .bs_subregion = armv7_generic_bs_subregion, 65 66 /* allocation/deallocation */ 67 .bs_alloc = armv7_generic_bs_alloc, /* not implemented */ 68 .bs_free = armv7_generic_bs_free, /* not implemented */ 69 70 /* get kernel virtual address */ 71 .bs_vaddr = armv7_generic_bs_vaddr, 72 73 /* mmap */ 74 .bs_mmap = armv7_generic_bs_mmap, 75 76 /* barrier */ 77 .bs_barrier = armv7_generic_bs_barrier, 78 79 /* read (single) */ 80 .bs_r_1 = generic_bs_r_1, 81 .bs_r_2 = NSWAP(generic_armv4_bs_r_2), 82 .bs_r_4 = NSWAP(generic_bs_r_4), 83 .bs_r_8 = bs_notimpl_bs_r_8, 84 85 /* read multiple */ 86 .bs_rm_1 = generic_bs_rm_1, 87 .bs_rm_2 = NSWAP(generic_armv4_bs_rm_2), 88 .bs_rm_4 = NSWAP(generic_bs_rm_4), 89 .bs_rm_8 = bs_notimpl_bs_rm_8, 90 91 /* read region */ 92 .bs_rr_1 = generic_bs_rr_1, 93 .bs_rr_2 = NSWAP(generic_armv4_bs_rr_2), 94 .bs_rr_4 = NSWAP(generic_bs_rr_4), 95 .bs_rr_8 = bs_notimpl_bs_rr_8, 96 97 /* write (single) */ 98 .bs_w_1 = generic_bs_w_1, 99 .bs_w_2 = NSWAP(generic_armv4_bs_w_2), 100 .bs_w_4 = NSWAP(generic_bs_w_4), 101 .bs_w_8 = bs_notimpl_bs_w_8, 102 103 /* write multiple */ 104 .bs_wm_1 = generic_bs_wm_1, 105 .bs_wm_2 = NSWAP(generic_armv4_bs_wm_2), 106 .bs_wm_4 = NSWAP(generic_bs_wm_4), 107 .bs_wm_8 = bs_notimpl_bs_wm_8, 108 109 /* write region */ 110 .bs_wr_1 = generic_bs_wr_1, 111 .bs_wr_2 = NSWAP(generic_armv4_bs_wr_2), 112 .bs_wr_4 = NSWAP(generic_bs_wr_4), 113 .bs_wr_8 = bs_notimpl_bs_wr_8, 114 115 /* set multiple */ 116 .bs_sm_1 = bs_notimpl_bs_sm_1, 117 .bs_sm_2 = bs_notimpl_bs_sm_2, 118 .bs_sm_4 = bs_notimpl_bs_sm_4, 119 .bs_sm_8 = bs_notimpl_bs_sm_8, 120 121 /* set region */ 122 .bs_sr_1 = generic_bs_sr_1, 123 .bs_sr_2 = NSWAP(generic_armv4_bs_sr_2), 124 .bs_sr_4 = NSWAP(generic_bs_sr_4), 125 .bs_sr_8 = bs_notimpl_bs_sr_8, 126 127 /* copy */ 128 .bs_c_1 = bs_notimpl_bs_c_1, 129 .bs_c_2 = generic_armv4_bs_c_2, 130 .bs_c_4 = bs_notimpl_bs_c_4, 131 .bs_c_8 = bs_notimpl_bs_c_8, 132 133 #ifdef __BUS_SPACE_HAS_STREAM_METHODS 134 /* read (single) */ 135 .bs_r_1_s = generic_bs_r_1, 136 .bs_r_2_s = NSWAP(generic_armv4_bs_r_2), 137 .bs_r_4_s = NSWAP(generic_bs_r_4), 138 .bs_r_8_s = bs_notimpl_bs_r_8, 139 140 /* read multiple */ 141 .bs_rm_1_s = generic_bs_rm_1, 142 .bs_rm_2_s = NSWAP(generic_armv4_bs_rm_2), 143 .bs_rm_4_s = NSWAP(generic_bs_rm_4), 144 .bs_rm_8_s = bs_notimpl_bs_rm_8, 145 146 /* read region */ 147 .bs_rr_1_s = generic_bs_rr_1, 148 .bs_rr_2_s = NSWAP(generic_armv4_bs_rr_2), 149 .bs_rr_4_s = NSWAP(generic_bs_rr_4), 150 .bs_rr_8_s = bs_notimpl_bs_rr_8, 151 152 /* write (single) */ 153 .bs_w_1_s = generic_bs_w_1, 154 .bs_w_2_s = NSWAP(generic_armv4_bs_w_2), 155 .bs_w_4_s = NSWAP(generic_bs_w_4), 156 .bs_w_8_s = bs_notimpl_bs_w_8, 157 158 /* write multiple */ 159 .bs_wm_1_s = generic_bs_wm_1, 160 .bs_wm_2_s = NSWAP(generic_armv4_bs_wm_2), 161 .bs_wm_4_s = NSWAP(generic_bs_wm_4), 162 .bs_wm_8_s = bs_notimpl_bs_wm_8, 163 164 /* write region */ 165 .bs_wr_1_s = generic_bs_wr_1, 166 .bs_wr_2_s = NSWAP(generic_armv4_bs_wr_2), 167 .bs_wr_4_s = NSWAP(generic_bs_wr_4), 168 .bs_wr_8_s = bs_notimpl_bs_wr_8, 169 #endif 170 }; 171 172 struct bus_space armv7_generic_a4x_bs_tag = { 173 /* cookie */ 174 .bs_cookie = (void *) 0, 175 176 /* mapping/unmapping */ 177 .bs_map = armv7_generic_bs_map, 178 .bs_unmap = armv7_generic_bs_unmap, 179 .bs_subregion = armv7_generic_a4x_bs_subregion, 180 181 /* allocation/deallocation */ 182 .bs_alloc = armv7_generic_bs_alloc, /* not implemented */ 183 .bs_free = armv7_generic_bs_free, /* not implemented */ 184 185 /* get kernel virtual address */ 186 .bs_vaddr = armv7_generic_bs_vaddr, 187 188 /* mmap */ 189 .bs_mmap = armv7_generic_a4x_bs_mmap, 190 191 /* barrier */ 192 .bs_barrier = armv7_generic_bs_barrier, 193 194 /* read (single) */ 195 .bs_r_1 = a4x_bs_r_1, 196 .bs_r_2 = NSWAP(a4x_bs_r_2), 197 .bs_r_4 = NSWAP(a4x_bs_r_4), 198 .bs_r_8 = bs_notimpl_bs_r_8, 199 200 /* read multiple */ 201 .bs_rm_1 = a4x_bs_rm_1, 202 .bs_rm_2 = NSWAP(a4x_bs_rm_2), 203 .bs_rm_4 = NSWAP(a4x_bs_rm_4), 204 .bs_rm_8 = bs_notimpl_bs_rm_8, 205 206 /* read region */ 207 .bs_rr_1 = bs_notimpl_bs_rr_1, 208 .bs_rr_2 = bs_notimpl_bs_rr_2, 209 .bs_rr_4 = bs_notimpl_bs_rr_4, 210 .bs_rr_8 = bs_notimpl_bs_rr_8, 211 212 /* write (single) */ 213 .bs_w_1 = a4x_bs_w_1, 214 .bs_w_2 = NSWAP(a4x_bs_w_2), 215 .bs_w_4 = NSWAP(a4x_bs_w_4), 216 .bs_w_8 = bs_notimpl_bs_w_8, 217 218 /* write multiple */ 219 .bs_wm_1 = a4x_bs_wm_1, 220 .bs_wm_2 = NSWAP(a4x_bs_wm_2), 221 .bs_wm_4 = NSWAP(a4x_bs_wm_4), 222 .bs_wm_8 = bs_notimpl_bs_wm_8, 223 224 /* write region */ 225 .bs_wr_1 = bs_notimpl_bs_wr_1, 226 .bs_wr_2 = bs_notimpl_bs_wr_2, 227 .bs_wr_4 = bs_notimpl_bs_wr_4, 228 .bs_wr_8 = bs_notimpl_bs_wr_8, 229 230 /* set multiple */ 231 .bs_sm_1 = bs_notimpl_bs_sm_1, 232 .bs_sm_2 = bs_notimpl_bs_sm_2, 233 .bs_sm_4 = bs_notimpl_bs_sm_4, 234 .bs_sm_8 = bs_notimpl_bs_sm_8, 235 236 /* set region */ 237 .bs_sr_1 = bs_notimpl_bs_sr_1, 238 .bs_sr_2 = bs_notimpl_bs_sr_2, 239 .bs_sr_4 = bs_notimpl_bs_sr_4, 240 .bs_sr_8 = bs_notimpl_bs_sr_8, 241 242 /* copy */ 243 .bs_c_1 = bs_notimpl_bs_c_1, 244 .bs_c_2 = bs_notimpl_bs_c_2, 245 .bs_c_4 = bs_notimpl_bs_c_4, 246 .bs_c_8 = bs_notimpl_bs_c_8, 247 248 #ifdef __BUS_SPACE_HAS_STREAM_METHODS 249 /* read (single) */ 250 .bs_r_1_s = a4x_bs_r_1, 251 .bs_r_2_s = NSWAP(a4x_bs_r_2), 252 .bs_r_4_s = NSWAP(a4x_bs_r_4), 253 .bs_r_8_s = bs_notimpl_bs_r_8, 254 255 /* read multiple */ 256 .bs_rm_1_s = a4x_bs_rm_1, 257 .bs_rm_2_s = NSWAP(a4x_bs_rm_2), 258 .bs_rm_4_s = NSWAP(a4x_bs_rm_4), 259 .bs_rm_8_s = bs_notimpl_bs_rm_8, 260 261 /* read region */ 262 .bs_rr_1_s = bs_notimpl_bs_rr_1, 263 .bs_rr_2_s = bs_notimpl_bs_rr_2, 264 .bs_rr_4_s = bs_notimpl_bs_rr_4, 265 .bs_rr_8_s = bs_notimpl_bs_rr_8, 266 267 /* write (single) */ 268 .bs_w_1_s = a4x_bs_w_1, 269 .bs_w_2_s = NSWAP(a4x_bs_w_2), 270 .bs_w_4_s = NSWAP(a4x_bs_w_4), 271 .bs_w_8_s = bs_notimpl_bs_w_8, 272 273 /* write multiple */ 274 .bs_wm_1_s = a4x_bs_wm_1, 275 .bs_wm_2_s = NSWAP(a4x_bs_wm_2), 276 .bs_wm_4_s = NSWAP(a4x_bs_wm_4), 277 .bs_wm_8_s = bs_notimpl_bs_wm_8, 278 279 /* write region */ 280 .bs_wr_1_s = bs_notimpl_bs_wr_1, 281 .bs_wr_2_s = bs_notimpl_bs_wr_2, 282 .bs_wr_4_s = bs_notimpl_bs_wr_4, 283 .bs_wr_8_s = bs_notimpl_bs_wr_8, 284 #endif 285 }; 286 287 int 288 armv7_generic_bs_map(void *t, bus_addr_t bpa, bus_size_t size, int flag, 289 bus_space_handle_t *bshp) 290 { 291 u_long startpa, endpa, pa; 292 const struct pmap_devmap *pd; 293 int pmapflags; 294 vaddr_t va; 295 296 if ((pd = pmap_devmap_find_pa(bpa, size)) != NULL) { 297 /* Device was statically mapped. */ 298 *bshp = pd->pd_va + (bpa - pd->pd_pa); 299 return 0; 300 } 301 302 startpa = trunc_page(bpa); 303 endpa = round_page(bpa + size); 304 305 /* XXX use extent manager to check duplicate mapping */ 306 307 va = uvm_km_alloc(kernel_map, endpa - startpa, 0, 308 UVM_KMF_VAONLY | UVM_KMF_NOWAIT | UVM_KMF_COLORMATCH); 309 if (!va) 310 return ENOMEM; 311 312 *bshp = (bus_space_handle_t)(va + (bpa - startpa)); 313 314 if (flag & BUS_SPACE_MAP_PREFETCHABLE) 315 pmapflags = PMAP_WRITE_COMBINE; 316 else if (flag & BUS_SPACE_MAP_CACHEABLE) 317 pmapflags = 0; 318 else 319 pmapflags = PMAP_NOCACHE; 320 321 for (pa = startpa; pa < endpa; pa += PAGE_SIZE, va += PAGE_SIZE) { 322 pmap_kenter_pa(va, pa, VM_PROT_READ | VM_PROT_WRITE, pmapflags); 323 } 324 pmap_update(pmap_kernel()); 325 326 return 0; 327 } 328 329 void 330 armv7_generic_bs_unmap(void *t, bus_space_handle_t bsh, bus_size_t size) 331 { 332 vaddr_t va; 333 vsize_t sz; 334 335 if (pmap_devmap_find_va(bsh, size) != NULL) { 336 /* Device was statically mapped; nothing to do. */ 337 return; 338 } 339 340 va = trunc_page(bsh); 341 sz = round_page(bsh + size) - va; 342 343 pmap_kremove(va, sz); 344 pmap_update(pmap_kernel()); 345 uvm_km_free(kernel_map, va, sz, UVM_KMF_VAONLY); 346 } 347 348 349 int 350 armv7_generic_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, 351 bus_size_t size, bus_space_handle_t *nbshp) 352 { 353 354 *nbshp = bsh + offset; 355 return 0; 356 } 357 358 int 359 armv7_generic_a4x_bs_subregion(void *t, bus_space_handle_t bsh, bus_size_t offset, 360 bus_size_t size, bus_space_handle_t *nbshp) 361 { 362 363 *nbshp = bsh + 4 * offset; 364 return 0; 365 } 366 367 void 368 armv7_generic_bs_barrier(void *t, bus_space_handle_t bsh, bus_size_t offset, 369 bus_size_t len, int flags) 370 { 371 flags &= BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE; 372 373 if (flags) 374 arm_dsb(); 375 } 376 377 void * 378 armv7_generic_bs_vaddr(void *t, bus_space_handle_t bsh) 379 { 380 381 return (void *)bsh; 382 } 383 384 paddr_t 385 armv7_generic_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags) 386 { 387 paddr_t bus_flags = 0; 388 389 if (flags & BUS_SPACE_MAP_PREFETCHABLE) 390 bus_flags |= ARM32_MMAP_WRITECOMBINE; 391 392 return arm_btop(bpa + offset) | bus_flags; 393 } 394 395 paddr_t 396 armv7_generic_a4x_bs_mmap(void *t, bus_addr_t bpa, off_t offset, int prot, int flags) 397 { 398 paddr_t bus_flags = 0; 399 400 if (flags & BUS_SPACE_MAP_PREFETCHABLE) 401 bus_flags |= ARM32_MMAP_WRITECOMBINE; 402 403 return arm_btop(bpa + 4 * offset) | bus_flags; 404 } 405 406 int 407 armv7_generic_bs_alloc(void *t, bus_addr_t rstart, bus_addr_t rend, 408 bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags, 409 bus_addr_t *bpap, bus_space_handle_t *bshp) 410 { 411 412 panic("%s(): not implemented\n", __func__); 413 } 414 415 void 416 armv7_generic_bs_free(void *t, bus_space_handle_t bsh, bus_size_t size) 417 { 418 419 panic("%s(): not implemented\n", __func__); 420 } 421
Indexes created Sat Sep 27 14:09:57 GMT 2025