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bus_dma.c revision 1.3.4.11
      1  1.3.4.11  thorpej /*	$NetBSD: bus_dma.c,v 1.3.4.11 2002/08/27 06:03:15 thorpej Exp $	*/
      2   1.3.4.2  nathanw 
      3   1.3.4.2  nathanw /*-
      4   1.3.4.2  nathanw  * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
      5   1.3.4.2  nathanw  * All rights reserved.
      6   1.3.4.2  nathanw  *
      7   1.3.4.2  nathanw  * This code is derived from software contributed to The NetBSD Foundation
      8   1.3.4.2  nathanw  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9   1.3.4.2  nathanw  * NASA Ames Research Center.
     10   1.3.4.2  nathanw  *
     11   1.3.4.2  nathanw  * Redistribution and use in source and binary forms, with or without
     12   1.3.4.2  nathanw  * modification, are permitted provided that the following conditions
     13   1.3.4.2  nathanw  * are met:
     14   1.3.4.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     15   1.3.4.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     16   1.3.4.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     17   1.3.4.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     18   1.3.4.2  nathanw  *    documentation and/or other materials provided with the distribution.
     19   1.3.4.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     20   1.3.4.2  nathanw  *    must display the following acknowledgement:
     21   1.3.4.2  nathanw  *	This product includes software developed by the NetBSD
     22   1.3.4.2  nathanw  *	Foundation, Inc. and its contributors.
     23   1.3.4.2  nathanw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     24   1.3.4.2  nathanw  *    contributors may be used to endorse or promote products derived
     25   1.3.4.2  nathanw  *    from this software without specific prior written permission.
     26   1.3.4.2  nathanw  *
     27   1.3.4.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     28   1.3.4.2  nathanw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29   1.3.4.2  nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30   1.3.4.2  nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     31   1.3.4.2  nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32   1.3.4.2  nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33   1.3.4.2  nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34   1.3.4.2  nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35   1.3.4.2  nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36   1.3.4.2  nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37   1.3.4.2  nathanw  * POSSIBILITY OF SUCH DAMAGE.
     38   1.3.4.2  nathanw  */
     39   1.3.4.2  nathanw 
     40   1.3.4.2  nathanw #include <sys/param.h>
     41   1.3.4.2  nathanw #include <sys/systm.h>
     42   1.3.4.2  nathanw #include <sys/kernel.h>
     43   1.3.4.2  nathanw #include <sys/map.h>
     44   1.3.4.2  nathanw #include <sys/proc.h>
     45   1.3.4.2  nathanw #include <sys/buf.h>
     46   1.3.4.2  nathanw #include <sys/reboot.h>
     47   1.3.4.2  nathanw #include <sys/conf.h>
     48   1.3.4.2  nathanw #include <sys/file.h>
     49   1.3.4.2  nathanw #include <sys/malloc.h>
     50   1.3.4.2  nathanw #include <sys/mbuf.h>
     51   1.3.4.2  nathanw #include <sys/vnode.h>
     52   1.3.4.2  nathanw #include <sys/device.h>
     53   1.3.4.2  nathanw 
     54   1.3.4.2  nathanw #include <uvm/uvm_extern.h>
     55   1.3.4.2  nathanw 
     56   1.3.4.2  nathanw #define _ARM32_BUS_DMA_PRIVATE
     57   1.3.4.2  nathanw #include <machine/bus.h>
     58   1.3.4.2  nathanw 
     59   1.3.4.2  nathanw #include <machine/cpu.h>
     60   1.3.4.2  nathanw 
     61   1.3.4.2  nathanw #include <arm/cpufunc.h>
     62   1.3.4.2  nathanw 
     63   1.3.4.3  nathanw int	_bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
     64   1.3.4.6  nathanw 	    bus_size_t, struct proc *, int, paddr_t *, int *, int);
     65   1.3.4.9  nathanw struct arm32_dma_range *_bus_dma_inrange(struct arm32_dma_range *,
     66   1.3.4.9  nathanw 	    int, bus_addr_t);
     67   1.3.4.2  nathanw 
     68   1.3.4.2  nathanw /*
     69  1.3.4.10  thorpej  * Check to see if the specified page is in an allowed DMA range.
     70  1.3.4.10  thorpej  */
     71  1.3.4.10  thorpej __inline struct arm32_dma_range *
     72  1.3.4.10  thorpej _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
     73  1.3.4.10  thorpej     bus_addr_t curaddr)
     74  1.3.4.10  thorpej {
     75  1.3.4.10  thorpej 	struct arm32_dma_range *dr;
     76  1.3.4.10  thorpej 	int i;
     77  1.3.4.10  thorpej 
     78  1.3.4.10  thorpej 	for (i = 0, dr = ranges; i < nranges; i++, dr++) {
     79  1.3.4.10  thorpej 		if (curaddr >= dr->dr_sysbase &&
     80  1.3.4.10  thorpej 		    round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
     81  1.3.4.10  thorpej 			return (dr);
     82  1.3.4.10  thorpej 	}
     83  1.3.4.10  thorpej 
     84  1.3.4.10  thorpej 	return (NULL);
     85  1.3.4.10  thorpej }
     86  1.3.4.10  thorpej 
     87  1.3.4.10  thorpej /*
     88   1.3.4.2  nathanw  * Common function for DMA map creation.  May be called by bus-specific
     89   1.3.4.2  nathanw  * DMA map creation functions.
     90   1.3.4.2  nathanw  */
     91   1.3.4.2  nathanw int
     92   1.3.4.3  nathanw _bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
     93   1.3.4.3  nathanw     bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
     94   1.3.4.2  nathanw {
     95   1.3.4.2  nathanw 	struct arm32_bus_dmamap *map;
     96   1.3.4.2  nathanw 	void *mapstore;
     97   1.3.4.2  nathanw 	size_t mapsize;
     98   1.3.4.2  nathanw 
     99   1.3.4.2  nathanw #ifdef DEBUG_DMA
    100   1.3.4.2  nathanw 	printf("dmamap_create: t=%p size=%lx nseg=%x msegsz=%lx boundary=%lx flags=%x\n",
    101   1.3.4.2  nathanw 	    t, size, nsegments, maxsegsz, boundary, flags);
    102   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    103   1.3.4.2  nathanw 
    104   1.3.4.2  nathanw 	/*
    105   1.3.4.2  nathanw 	 * Allocate and initialize the DMA map.  The end of the map
    106   1.3.4.2  nathanw 	 * is a variable-sized array of segments, so we allocate enough
    107   1.3.4.2  nathanw 	 * room for them in one shot.
    108   1.3.4.2  nathanw 	 *
    109   1.3.4.2  nathanw 	 * Note we don't preserve the WAITOK or NOWAIT flags.  Preservation
    110   1.3.4.2  nathanw 	 * of ALLOCNOW notifies others that we've reserved these resources,
    111   1.3.4.2  nathanw 	 * and they are not to be freed.
    112   1.3.4.2  nathanw 	 *
    113   1.3.4.2  nathanw 	 * The bus_dmamap_t includes one bus_dma_segment_t, hence
    114   1.3.4.2  nathanw 	 * the (nsegments - 1).
    115   1.3.4.2  nathanw 	 */
    116   1.3.4.2  nathanw 	mapsize = sizeof(struct arm32_bus_dmamap) +
    117   1.3.4.2  nathanw 	    (sizeof(bus_dma_segment_t) * (nsegments - 1));
    118   1.3.4.2  nathanw 	if ((mapstore = malloc(mapsize, M_DMAMAP,
    119   1.3.4.2  nathanw 	    (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
    120   1.3.4.2  nathanw 		return (ENOMEM);
    121   1.3.4.2  nathanw 
    122   1.3.4.2  nathanw 	memset(mapstore, 0, mapsize);
    123   1.3.4.2  nathanw 	map = (struct arm32_bus_dmamap *)mapstore;
    124   1.3.4.2  nathanw 	map->_dm_size = size;
    125   1.3.4.2  nathanw 	map->_dm_segcnt = nsegments;
    126   1.3.4.2  nathanw 	map->_dm_maxsegsz = maxsegsz;
    127   1.3.4.2  nathanw 	map->_dm_boundary = boundary;
    128   1.3.4.2  nathanw 	map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
    129   1.3.4.9  nathanw 	map->_dm_origbuf = NULL;
    130   1.3.4.9  nathanw 	map->_dm_buftype = ARM32_BUFTYPE_INVALID;
    131   1.3.4.3  nathanw 	map->_dm_proc = NULL;
    132   1.3.4.2  nathanw 	map->dm_mapsize = 0;		/* no valid mappings */
    133   1.3.4.2  nathanw 	map->dm_nsegs = 0;
    134   1.3.4.2  nathanw 
    135   1.3.4.2  nathanw 	*dmamp = map;
    136   1.3.4.2  nathanw #ifdef DEBUG_DMA
    137   1.3.4.2  nathanw 	printf("dmamap_create:map=%p\n", map);
    138   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    139   1.3.4.2  nathanw 	return (0);
    140   1.3.4.2  nathanw }
    141   1.3.4.2  nathanw 
    142   1.3.4.2  nathanw /*
    143   1.3.4.2  nathanw  * Common function for DMA map destruction.  May be called by bus-specific
    144   1.3.4.2  nathanw  * DMA map destruction functions.
    145   1.3.4.2  nathanw  */
    146   1.3.4.2  nathanw void
    147   1.3.4.3  nathanw _bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
    148   1.3.4.2  nathanw {
    149   1.3.4.2  nathanw 
    150   1.3.4.2  nathanw #ifdef DEBUG_DMA
    151   1.3.4.2  nathanw 	printf("dmamap_destroy: t=%p map=%p\n", t, map);
    152   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    153   1.3.4.9  nathanw 
    154   1.3.4.9  nathanw 	/*
    155   1.3.4.9  nathanw 	 * Explicit unload.
    156   1.3.4.9  nathanw 	 */
    157   1.3.4.9  nathanw 	map->dm_mapsize = 0;
    158   1.3.4.9  nathanw 	map->dm_nsegs = 0;
    159   1.3.4.9  nathanw 	map->_dm_origbuf = NULL;
    160   1.3.4.9  nathanw 	map->_dm_buftype = ARM32_BUFTYPE_INVALID;
    161   1.3.4.9  nathanw 	map->_dm_proc = NULL;
    162   1.3.4.9  nathanw 
    163   1.3.4.2  nathanw 	free(map, M_DEVBUF);
    164   1.3.4.2  nathanw }
    165   1.3.4.2  nathanw 
    166   1.3.4.2  nathanw /*
    167   1.3.4.2  nathanw  * Common function for loading a DMA map with a linear buffer.  May
    168   1.3.4.2  nathanw  * be called by bus-specific DMA map load functions.
    169   1.3.4.2  nathanw  */
    170   1.3.4.2  nathanw int
    171   1.3.4.3  nathanw _bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
    172   1.3.4.3  nathanw     bus_size_t buflen, struct proc *p, int flags)
    173   1.3.4.2  nathanw {
    174   1.3.4.6  nathanw 	paddr_t lastaddr;
    175   1.3.4.2  nathanw 	int seg, error;
    176   1.3.4.2  nathanw 
    177   1.3.4.2  nathanw #ifdef DEBUG_DMA
    178   1.3.4.2  nathanw 	printf("dmamap_load: t=%p map=%p buf=%p len=%lx p=%p f=%d\n",
    179   1.3.4.2  nathanw 	    t, map, buf, buflen, p, flags);
    180   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    181   1.3.4.2  nathanw 
    182   1.3.4.2  nathanw 	/*
    183   1.3.4.2  nathanw 	 * Make sure that on error condition we return "no valid mappings".
    184   1.3.4.2  nathanw 	 */
    185   1.3.4.2  nathanw 	map->dm_mapsize = 0;
    186   1.3.4.2  nathanw 	map->dm_nsegs = 0;
    187   1.3.4.2  nathanw 
    188   1.3.4.2  nathanw 	if (buflen > map->_dm_size)
    189   1.3.4.2  nathanw 		return (EINVAL);
    190   1.3.4.2  nathanw 
    191  1.3.4.10  thorpej 	/* _bus_dmamap_load_buffer() clears this if we're not... */
    192  1.3.4.10  thorpej 	map->_dm_flags |= ARM32_DMAMAP_COHERENT;
    193  1.3.4.10  thorpej 
    194   1.3.4.2  nathanw 	seg = 0;
    195   1.3.4.2  nathanw 	error = _bus_dmamap_load_buffer(t, map, buf, buflen, p, flags,
    196   1.3.4.2  nathanw 	    &lastaddr, &seg, 1);
    197   1.3.4.2  nathanw 	if (error == 0) {
    198   1.3.4.2  nathanw 		map->dm_mapsize = buflen;
    199   1.3.4.2  nathanw 		map->dm_nsegs = seg + 1;
    200   1.3.4.9  nathanw 		map->_dm_origbuf = buf;
    201   1.3.4.9  nathanw 		map->_dm_buftype = ARM32_BUFTYPE_LINEAR;
    202   1.3.4.3  nathanw 		map->_dm_proc = p;
    203   1.3.4.2  nathanw 	}
    204   1.3.4.2  nathanw #ifdef DEBUG_DMA
    205   1.3.4.2  nathanw 	printf("dmamap_load: error=%d\n", error);
    206   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    207   1.3.4.2  nathanw 	return (error);
    208   1.3.4.2  nathanw }
    209   1.3.4.2  nathanw 
    210   1.3.4.2  nathanw /*
    211   1.3.4.2  nathanw  * Like _bus_dmamap_load(), but for mbufs.
    212   1.3.4.2  nathanw  */
    213   1.3.4.2  nathanw int
    214   1.3.4.3  nathanw _bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
    215   1.3.4.3  nathanw     int flags)
    216   1.3.4.2  nathanw {
    217   1.3.4.6  nathanw 	paddr_t lastaddr;
    218   1.3.4.2  nathanw 	int seg, error, first;
    219   1.3.4.2  nathanw 	struct mbuf *m;
    220   1.3.4.2  nathanw 
    221   1.3.4.2  nathanw #ifdef DEBUG_DMA
    222   1.3.4.2  nathanw 	printf("dmamap_load_mbuf: t=%p map=%p m0=%p f=%d\n",
    223   1.3.4.2  nathanw 	    t, map, m0, flags);
    224   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    225   1.3.4.2  nathanw 
    226   1.3.4.2  nathanw 	/*
    227   1.3.4.2  nathanw 	 * Make sure that on error condition we return "no valid mappings."
    228   1.3.4.2  nathanw 	 */
    229   1.3.4.2  nathanw 	map->dm_mapsize = 0;
    230   1.3.4.2  nathanw 	map->dm_nsegs = 0;
    231   1.3.4.2  nathanw 
    232   1.3.4.2  nathanw #ifdef DIAGNOSTIC
    233   1.3.4.2  nathanw 	if ((m0->m_flags & M_PKTHDR) == 0)
    234   1.3.4.2  nathanw 		panic("_bus_dmamap_load_mbuf: no packet header");
    235   1.3.4.2  nathanw #endif	/* DIAGNOSTIC */
    236   1.3.4.2  nathanw 
    237   1.3.4.2  nathanw 	if (m0->m_pkthdr.len > map->_dm_size)
    238   1.3.4.2  nathanw 		return (EINVAL);
    239   1.3.4.2  nathanw 
    240  1.3.4.10  thorpej 	/* _bus_dmamap_load_buffer() clears this if we're not... */
    241  1.3.4.10  thorpej 	map->_dm_flags |= ARM32_DMAMAP_COHERENT;
    242  1.3.4.10  thorpej 
    243   1.3.4.2  nathanw 	first = 1;
    244   1.3.4.2  nathanw 	seg = 0;
    245   1.3.4.2  nathanw 	error = 0;
    246   1.3.4.2  nathanw 	for (m = m0; m != NULL && error == 0; m = m->m_next) {
    247   1.3.4.2  nathanw 		error = _bus_dmamap_load_buffer(t, map, m->m_data, m->m_len,
    248   1.3.4.2  nathanw 		    NULL, flags, &lastaddr, &seg, first);
    249   1.3.4.2  nathanw 		first = 0;
    250   1.3.4.2  nathanw 	}
    251   1.3.4.2  nathanw 	if (error == 0) {
    252   1.3.4.2  nathanw 		map->dm_mapsize = m0->m_pkthdr.len;
    253   1.3.4.2  nathanw 		map->dm_nsegs = seg + 1;
    254   1.3.4.9  nathanw 		map->_dm_origbuf = m0;
    255   1.3.4.9  nathanw 		map->_dm_buftype = ARM32_BUFTYPE_MBUF;
    256   1.3.4.3  nathanw 		map->_dm_proc = NULL;	/* always kernel */
    257   1.3.4.2  nathanw 	}
    258   1.3.4.2  nathanw #ifdef DEBUG_DMA
    259   1.3.4.2  nathanw 	printf("dmamap_load_mbuf: error=%d\n", error);
    260   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    261   1.3.4.2  nathanw 	return (error);
    262   1.3.4.2  nathanw }
    263   1.3.4.2  nathanw 
    264   1.3.4.2  nathanw /*
    265   1.3.4.2  nathanw  * Like _bus_dmamap_load(), but for uios.
    266   1.3.4.2  nathanw  */
    267   1.3.4.2  nathanw int
    268   1.3.4.3  nathanw _bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
    269   1.3.4.3  nathanw     int flags)
    270   1.3.4.2  nathanw {
    271   1.3.4.6  nathanw 	paddr_t lastaddr;
    272   1.3.4.2  nathanw 	int seg, i, error, first;
    273   1.3.4.2  nathanw 	bus_size_t minlen, resid;
    274   1.3.4.2  nathanw 	struct proc *p = NULL;
    275   1.3.4.2  nathanw 	struct iovec *iov;
    276   1.3.4.2  nathanw 	caddr_t addr;
    277   1.3.4.2  nathanw 
    278   1.3.4.2  nathanw 	/*
    279   1.3.4.2  nathanw 	 * Make sure that on error condition we return "no valid mappings."
    280   1.3.4.2  nathanw 	 */
    281   1.3.4.2  nathanw 	map->dm_mapsize = 0;
    282   1.3.4.2  nathanw 	map->dm_nsegs = 0;
    283   1.3.4.2  nathanw 
    284   1.3.4.2  nathanw 	resid = uio->uio_resid;
    285   1.3.4.2  nathanw 	iov = uio->uio_iov;
    286   1.3.4.2  nathanw 
    287   1.3.4.2  nathanw 	if (uio->uio_segflg == UIO_USERSPACE) {
    288   1.3.4.2  nathanw 		p = uio->uio_procp;
    289   1.3.4.2  nathanw #ifdef DIAGNOSTIC
    290   1.3.4.2  nathanw 		if (p == NULL)
    291   1.3.4.2  nathanw 			panic("_bus_dmamap_load_uio: USERSPACE but no proc");
    292   1.3.4.2  nathanw #endif
    293   1.3.4.2  nathanw 	}
    294   1.3.4.2  nathanw 
    295  1.3.4.10  thorpej 	/* _bus_dmamap_load_buffer() clears this if we're not... */
    296  1.3.4.10  thorpej 	map->_dm_flags |= ARM32_DMAMAP_COHERENT;
    297  1.3.4.10  thorpej 
    298   1.3.4.2  nathanw 	first = 1;
    299   1.3.4.2  nathanw 	seg = 0;
    300   1.3.4.2  nathanw 	error = 0;
    301   1.3.4.2  nathanw 	for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
    302   1.3.4.2  nathanw 		/*
    303   1.3.4.2  nathanw 		 * Now at the first iovec to load.  Load each iovec
    304   1.3.4.2  nathanw 		 * until we have exhausted the residual count.
    305   1.3.4.2  nathanw 		 */
    306   1.3.4.2  nathanw 		minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
    307   1.3.4.2  nathanw 		addr = (caddr_t)iov[i].iov_base;
    308   1.3.4.2  nathanw 
    309   1.3.4.2  nathanw 		error = _bus_dmamap_load_buffer(t, map, addr, minlen,
    310   1.3.4.2  nathanw 		    p, flags, &lastaddr, &seg, first);
    311   1.3.4.2  nathanw 		first = 0;
    312   1.3.4.2  nathanw 
    313   1.3.4.2  nathanw 		resid -= minlen;
    314   1.3.4.2  nathanw 	}
    315   1.3.4.2  nathanw 	if (error == 0) {
    316   1.3.4.2  nathanw 		map->dm_mapsize = uio->uio_resid;
    317   1.3.4.2  nathanw 		map->dm_nsegs = seg + 1;
    318   1.3.4.9  nathanw 		map->_dm_origbuf = uio;
    319   1.3.4.9  nathanw 		map->_dm_buftype = ARM32_BUFTYPE_UIO;
    320   1.3.4.3  nathanw 		map->_dm_proc = p;
    321   1.3.4.2  nathanw 	}
    322   1.3.4.2  nathanw 	return (error);
    323   1.3.4.2  nathanw }
    324   1.3.4.2  nathanw 
    325   1.3.4.2  nathanw /*
    326   1.3.4.2  nathanw  * Like _bus_dmamap_load(), but for raw memory allocated with
    327   1.3.4.2  nathanw  * bus_dmamem_alloc().
    328   1.3.4.2  nathanw  */
    329   1.3.4.2  nathanw int
    330   1.3.4.3  nathanw _bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
    331   1.3.4.3  nathanw     bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
    332   1.3.4.2  nathanw {
    333   1.3.4.2  nathanw 
    334   1.3.4.2  nathanw 	panic("_bus_dmamap_load_raw: not implemented");
    335   1.3.4.2  nathanw }
    336   1.3.4.2  nathanw 
    337   1.3.4.2  nathanw /*
    338   1.3.4.2  nathanw  * Common function for unloading a DMA map.  May be called by
    339   1.3.4.2  nathanw  * bus-specific DMA map unload functions.
    340   1.3.4.2  nathanw  */
    341   1.3.4.2  nathanw void
    342   1.3.4.3  nathanw _bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
    343   1.3.4.2  nathanw {
    344   1.3.4.2  nathanw 
    345   1.3.4.2  nathanw #ifdef DEBUG_DMA
    346   1.3.4.2  nathanw 	printf("dmamap_unload: t=%p map=%p\n", t, map);
    347   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    348   1.3.4.2  nathanw 
    349   1.3.4.2  nathanw 	/*
    350   1.3.4.2  nathanw 	 * No resources to free; just mark the mappings as
    351   1.3.4.2  nathanw 	 * invalid.
    352   1.3.4.2  nathanw 	 */
    353   1.3.4.2  nathanw 	map->dm_mapsize = 0;
    354   1.3.4.2  nathanw 	map->dm_nsegs = 0;
    355   1.3.4.9  nathanw 	map->_dm_origbuf = NULL;
    356   1.3.4.9  nathanw 	map->_dm_buftype = ARM32_BUFTYPE_INVALID;
    357   1.3.4.3  nathanw 	map->_dm_proc = NULL;
    358   1.3.4.2  nathanw }
    359   1.3.4.2  nathanw 
    360  1.3.4.10  thorpej static __inline void
    361   1.3.4.9  nathanw _bus_dmamap_sync_linear(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
    362   1.3.4.9  nathanw     bus_size_t len, int ops)
    363   1.3.4.9  nathanw {
    364   1.3.4.9  nathanw 	vaddr_t addr = (vaddr_t) map->_dm_origbuf;
    365   1.3.4.9  nathanw 
    366   1.3.4.9  nathanw 	addr += offset;
    367   1.3.4.9  nathanw 
    368   1.3.4.9  nathanw 	switch (ops) {
    369   1.3.4.9  nathanw 	case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
    370   1.3.4.9  nathanw 		cpu_dcache_wbinv_range(addr, len);
    371   1.3.4.9  nathanw 		break;
    372   1.3.4.9  nathanw 
    373   1.3.4.9  nathanw 	case BUS_DMASYNC_PREREAD:
    374  1.3.4.10  thorpej 		if (((addr | len) & arm_dcache_align_mask) == 0)
    375  1.3.4.10  thorpej 			cpu_dcache_inv_range(addr, len);
    376  1.3.4.10  thorpej 		else
    377  1.3.4.10  thorpej 			cpu_dcache_wbinv_range(addr, len);
    378   1.3.4.9  nathanw 		break;
    379   1.3.4.9  nathanw 
    380   1.3.4.9  nathanw 	case BUS_DMASYNC_PREWRITE:
    381   1.3.4.9  nathanw 		cpu_dcache_wb_range(addr, len);
    382   1.3.4.9  nathanw 		break;
    383   1.3.4.9  nathanw 	}
    384   1.3.4.9  nathanw }
    385   1.3.4.9  nathanw 
    386  1.3.4.10  thorpej static __inline void
    387   1.3.4.9  nathanw _bus_dmamap_sync_mbuf(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
    388   1.3.4.9  nathanw     bus_size_t len, int ops)
    389   1.3.4.9  nathanw {
    390   1.3.4.9  nathanw 	struct mbuf *m, *m0 = map->_dm_origbuf;
    391   1.3.4.9  nathanw 	bus_size_t minlen, moff;
    392   1.3.4.9  nathanw 	vaddr_t maddr;
    393   1.3.4.9  nathanw 
    394   1.3.4.9  nathanw 	for (moff = offset, m = m0; m != NULL && len != 0;
    395   1.3.4.9  nathanw 	     m = m->m_next) {
    396   1.3.4.9  nathanw 		/* Find the beginning mbuf. */
    397   1.3.4.9  nathanw 		if (moff >= m->m_len) {
    398   1.3.4.9  nathanw 			moff -= m->m_len;
    399   1.3.4.9  nathanw 			continue;
    400   1.3.4.9  nathanw 		}
    401   1.3.4.9  nathanw 
    402   1.3.4.9  nathanw 		/*
    403   1.3.4.9  nathanw 		 * Now at the first mbuf to sync; nail each one until
    404   1.3.4.9  nathanw 		 * we have exhausted the length.
    405   1.3.4.9  nathanw 		 */
    406   1.3.4.9  nathanw 		minlen = m->m_len - moff;
    407   1.3.4.9  nathanw 		if (len < minlen)
    408   1.3.4.9  nathanw 			minlen = len;
    409   1.3.4.9  nathanw 
    410   1.3.4.9  nathanw 		maddr = mtod(m, vaddr_t);
    411   1.3.4.9  nathanw 		maddr += moff;
    412   1.3.4.9  nathanw 
    413   1.3.4.9  nathanw 		switch (ops) {
    414   1.3.4.9  nathanw 		case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
    415   1.3.4.9  nathanw 			cpu_dcache_wbinv_range(maddr, minlen);
    416   1.3.4.9  nathanw 			break;
    417   1.3.4.9  nathanw 
    418   1.3.4.9  nathanw 		case BUS_DMASYNC_PREREAD:
    419  1.3.4.10  thorpej 			if (((maddr | minlen) & arm_dcache_align_mask) == 0)
    420  1.3.4.10  thorpej 				cpu_dcache_inv_range(maddr, minlen);
    421  1.3.4.10  thorpej 			else
    422  1.3.4.10  thorpej 				cpu_dcache_wbinv_range(maddr, minlen);
    423   1.3.4.9  nathanw 			break;
    424   1.3.4.9  nathanw 
    425   1.3.4.9  nathanw 		case BUS_DMASYNC_PREWRITE:
    426   1.3.4.9  nathanw 			cpu_dcache_wb_range(maddr, minlen);
    427   1.3.4.9  nathanw 			break;
    428   1.3.4.9  nathanw 		}
    429   1.3.4.9  nathanw 		moff = 0;
    430   1.3.4.9  nathanw 		len -= minlen;
    431   1.3.4.9  nathanw 	}
    432   1.3.4.9  nathanw }
    433   1.3.4.9  nathanw 
    434  1.3.4.10  thorpej static __inline void
    435   1.3.4.9  nathanw _bus_dmamap_sync_uio(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
    436   1.3.4.9  nathanw     bus_size_t len, int ops)
    437   1.3.4.9  nathanw {
    438   1.3.4.9  nathanw 	struct uio *uio = map->_dm_origbuf;
    439   1.3.4.9  nathanw 	struct iovec *iov;
    440   1.3.4.9  nathanw 	bus_size_t minlen, ioff;
    441   1.3.4.9  nathanw 	vaddr_t addr;
    442   1.3.4.9  nathanw 
    443   1.3.4.9  nathanw 	for (iov = uio->uio_iov, ioff = offset; len != 0; iov++) {
    444   1.3.4.9  nathanw 		/* Find the beginning iovec. */
    445   1.3.4.9  nathanw 		if (ioff >= iov->iov_len) {
    446   1.3.4.9  nathanw 			ioff -= iov->iov_len;
    447   1.3.4.9  nathanw 			continue;
    448   1.3.4.9  nathanw 		}
    449   1.3.4.9  nathanw 
    450   1.3.4.9  nathanw 		/*
    451   1.3.4.9  nathanw 		 * Now at the first iovec to sync; nail each one until
    452   1.3.4.9  nathanw 		 * we have exhausted the length.
    453   1.3.4.9  nathanw 		 */
    454   1.3.4.9  nathanw 		minlen = iov->iov_len - ioff;
    455   1.3.4.9  nathanw 		if (len < minlen)
    456   1.3.4.9  nathanw 			minlen = len;
    457   1.3.4.9  nathanw 
    458   1.3.4.9  nathanw 		addr = (vaddr_t) iov->iov_base;
    459   1.3.4.9  nathanw 		addr += ioff;
    460   1.3.4.9  nathanw 
    461   1.3.4.9  nathanw 		switch (ops) {
    462   1.3.4.9  nathanw 		case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
    463   1.3.4.9  nathanw 			cpu_dcache_wbinv_range(addr, minlen);
    464   1.3.4.9  nathanw 			break;
    465   1.3.4.9  nathanw 
    466   1.3.4.9  nathanw 		case BUS_DMASYNC_PREREAD:
    467  1.3.4.10  thorpej 			if (((addr | minlen) & arm_dcache_align_mask) == 0)
    468  1.3.4.10  thorpej 				cpu_dcache_inv_range(addr, minlen);
    469  1.3.4.10  thorpej 			else
    470  1.3.4.10  thorpej 				cpu_dcache_wbinv_range(addr, minlen);
    471   1.3.4.9  nathanw 			break;
    472   1.3.4.9  nathanw 
    473   1.3.4.9  nathanw 		case BUS_DMASYNC_PREWRITE:
    474   1.3.4.9  nathanw 			cpu_dcache_wb_range(addr, minlen);
    475   1.3.4.9  nathanw 			break;
    476   1.3.4.9  nathanw 		}
    477   1.3.4.9  nathanw 		ioff = 0;
    478   1.3.4.9  nathanw 		len -= minlen;
    479   1.3.4.9  nathanw 	}
    480   1.3.4.9  nathanw }
    481   1.3.4.9  nathanw 
    482   1.3.4.2  nathanw /*
    483   1.3.4.2  nathanw  * Common function for DMA map synchronization.  May be called
    484   1.3.4.2  nathanw  * by bus-specific DMA map synchronization functions.
    485   1.3.4.3  nathanw  *
    486   1.3.4.3  nathanw  * This version works for the Virtually Indexed Virtually Tagged
    487   1.3.4.3  nathanw  * cache found on 32-bit ARM processors.
    488   1.3.4.3  nathanw  *
    489   1.3.4.3  nathanw  * XXX Should have separate versions for write-through vs.
    490   1.3.4.3  nathanw  * XXX write-back caches.  We currently assume write-back
    491   1.3.4.3  nathanw  * XXX here, which is not as efficient as it could be for
    492   1.3.4.3  nathanw  * XXX the write-through case.
    493   1.3.4.2  nathanw  */
    494   1.3.4.2  nathanw void
    495   1.3.4.3  nathanw _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
    496   1.3.4.3  nathanw     bus_size_t len, int ops)
    497   1.3.4.3  nathanw {
    498   1.3.4.2  nathanw 
    499   1.3.4.2  nathanw #ifdef DEBUG_DMA
    500   1.3.4.2  nathanw 	printf("dmamap_sync: t=%p map=%p offset=%lx len=%lx ops=%x\n",
    501   1.3.4.2  nathanw 	    t, map, offset, len, ops);
    502   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    503   1.3.4.2  nathanw 
    504   1.3.4.3  nathanw 	/*
    505   1.3.4.3  nathanw 	 * Mixing of PRE and POST operations is not allowed.
    506   1.3.4.3  nathanw 	 */
    507   1.3.4.3  nathanw 	if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
    508   1.3.4.3  nathanw 	    (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
    509   1.3.4.3  nathanw 		panic("_bus_dmamap_sync: mix PRE and POST");
    510   1.3.4.3  nathanw 
    511   1.3.4.3  nathanw #ifdef DIAGNOSTIC
    512   1.3.4.3  nathanw 	if (offset >= map->dm_mapsize)
    513   1.3.4.3  nathanw 		panic("_bus_dmamap_sync: bad offset %lu (map size is %lu)",
    514   1.3.4.3  nathanw 		    offset, map->dm_mapsize);
    515   1.3.4.3  nathanw 	if (len == 0 || (offset + len) > map->dm_mapsize)
    516   1.3.4.3  nathanw 		panic("_bus_dmamap_sync: bad length");
    517   1.3.4.3  nathanw #endif
    518   1.3.4.3  nathanw 
    519   1.3.4.3  nathanw 	/*
    520   1.3.4.3  nathanw 	 * For a virtually-indexed write-back cache, we need
    521   1.3.4.3  nathanw 	 * to do the following things:
    522   1.3.4.3  nathanw 	 *
    523   1.3.4.3  nathanw 	 *	PREREAD -- Invalidate the D-cache.  We do this
    524   1.3.4.3  nathanw 	 *	here in case a write-back is required by the back-end.
    525   1.3.4.3  nathanw 	 *
    526   1.3.4.3  nathanw 	 *	PREWRITE -- Write-back the D-cache.  Note that if
    527   1.3.4.3  nathanw 	 *	we are doing a PREREAD|PREWRITE, we can collapse
    528   1.3.4.3  nathanw 	 *	the whole thing into a single Wb-Inv.
    529   1.3.4.3  nathanw 	 *
    530   1.3.4.3  nathanw 	 *	POSTREAD -- Nothing.
    531   1.3.4.3  nathanw 	 *
    532   1.3.4.3  nathanw 	 *	POSTWRITE -- Nothing.
    533   1.3.4.3  nathanw 	 */
    534   1.3.4.3  nathanw 
    535   1.3.4.3  nathanw 	ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
    536   1.3.4.3  nathanw 	if (ops == 0)
    537   1.3.4.3  nathanw 		return;
    538   1.3.4.3  nathanw 
    539  1.3.4.10  thorpej 	/* Skip cache frobbing if mapping was COHERENT. */
    540  1.3.4.10  thorpej 	if (map->_dm_flags & ARM32_DMAMAP_COHERENT) {
    541  1.3.4.10  thorpej 		/* Drain the write buffer. */
    542  1.3.4.10  thorpej 		cpu_drain_writebuf();
    543  1.3.4.10  thorpej 		return;
    544  1.3.4.10  thorpej 	}
    545   1.3.4.3  nathanw 
    546   1.3.4.3  nathanw 	/*
    547   1.3.4.3  nathanw 	 * If the mapping is not the kernel's and also not the
    548   1.3.4.3  nathanw 	 * current process's (XXX actually, vmspace), then we
    549   1.3.4.3  nathanw 	 * don't have anything to do, since the cache is Wb-Inv'd
    550   1.3.4.3  nathanw 	 * on context switch.
    551   1.3.4.3  nathanw 	 *
    552   1.3.4.3  nathanw 	 * XXX REVISIT WHEN WE DO FCSE!
    553   1.3.4.3  nathanw 	 */
    554   1.3.4.5  thorpej 	if (__predict_false(map->_dm_proc != NULL &&
    555   1.3.4.8  nathanw 	    curlwp != NULL && map->_dm_proc != curproc))
    556   1.3.4.3  nathanw 		return;
    557   1.3.4.3  nathanw 
    558   1.3.4.9  nathanw 	switch (map->_dm_buftype) {
    559   1.3.4.9  nathanw 	case ARM32_BUFTYPE_LINEAR:
    560   1.3.4.9  nathanw 		_bus_dmamap_sync_linear(t, map, offset, len, ops);
    561   1.3.4.9  nathanw 		break;
    562   1.3.4.9  nathanw 
    563   1.3.4.9  nathanw 	case ARM32_BUFTYPE_MBUF:
    564   1.3.4.9  nathanw 		_bus_dmamap_sync_mbuf(t, map, offset, len, ops);
    565   1.3.4.9  nathanw 		break;
    566   1.3.4.9  nathanw 
    567   1.3.4.9  nathanw 	case ARM32_BUFTYPE_UIO:
    568   1.3.4.9  nathanw 		_bus_dmamap_sync_uio(t, map, offset, len, ops);
    569   1.3.4.9  nathanw 		break;
    570   1.3.4.9  nathanw 
    571   1.3.4.9  nathanw 	case ARM32_BUFTYPE_RAW:
    572   1.3.4.9  nathanw 		panic("_bus_dmamap_sync: ARM32_BUFTYPE_RAW");
    573   1.3.4.9  nathanw 		break;
    574   1.3.4.9  nathanw 
    575   1.3.4.9  nathanw 	case ARM32_BUFTYPE_INVALID:
    576   1.3.4.9  nathanw 		panic("_bus_dmamap_sync: ARM32_BUFTYPE_INVALID");
    577   1.3.4.9  nathanw 		break;
    578   1.3.4.9  nathanw 
    579   1.3.4.9  nathanw 	default:
    580   1.3.4.9  nathanw 		printf("unknown buffer type %d\n", map->_dm_buftype);
    581   1.3.4.9  nathanw 		panic("_bus_dmamap_sync");
    582   1.3.4.2  nathanw 	}
    583   1.3.4.3  nathanw 
    584   1.3.4.3  nathanw 	/* Drain the write buffer. */
    585   1.3.4.3  nathanw 	cpu_drain_writebuf();
    586   1.3.4.2  nathanw }
    587   1.3.4.2  nathanw 
    588   1.3.4.2  nathanw /*
    589   1.3.4.2  nathanw  * Common function for DMA-safe memory allocation.  May be called
    590   1.3.4.2  nathanw  * by bus-specific DMA memory allocation functions.
    591   1.3.4.2  nathanw  */
    592   1.3.4.2  nathanw 
    593   1.3.4.6  nathanw extern paddr_t physical_start;
    594   1.3.4.6  nathanw extern paddr_t physical_freestart;
    595   1.3.4.6  nathanw extern paddr_t physical_freeend;
    596   1.3.4.6  nathanw extern paddr_t physical_end;
    597   1.3.4.2  nathanw 
    598   1.3.4.2  nathanw int
    599   1.3.4.3  nathanw _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
    600   1.3.4.3  nathanw     bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
    601   1.3.4.3  nathanw     int flags)
    602   1.3.4.2  nathanw {
    603   1.3.4.9  nathanw 	struct arm32_dma_range *dr;
    604   1.3.4.9  nathanw 	int error, i;
    605   1.3.4.9  nathanw 
    606   1.3.4.2  nathanw #ifdef DEBUG_DMA
    607   1.3.4.9  nathanw 	printf("dmamem_alloc t=%p size=%lx align=%lx boundary=%lx "
    608   1.3.4.9  nathanw 	    "segs=%p nsegs=%x rsegs=%p flags=%x\n", t, size, alignment,
    609   1.3.4.9  nathanw 	    boundary, segs, nsegs, rsegs, flags);
    610   1.3.4.9  nathanw #endif
    611   1.3.4.9  nathanw 
    612   1.3.4.9  nathanw 	if ((dr = t->_ranges) != NULL) {
    613   1.3.4.9  nathanw 		for (i = 0; i < t->_nranges; i++, dr++) {
    614   1.3.4.9  nathanw 			if (dr->dr_len == 0) {
    615   1.3.4.9  nathanw 				error = ENOMEM;
    616   1.3.4.9  nathanw 				continue;
    617   1.3.4.9  nathanw 			}
    618   1.3.4.9  nathanw 			error = _bus_dmamem_alloc_range(t, size, alignment,
    619   1.3.4.9  nathanw 			    boundary, segs, nsegs, rsegs, flags,
    620   1.3.4.9  nathanw 			    trunc_page(dr->dr_sysbase),
    621   1.3.4.9  nathanw 			    trunc_page(dr->dr_sysbase + dr->dr_len));
    622   1.3.4.9  nathanw 			if (error == 0)
    623   1.3.4.9  nathanw 				break;
    624   1.3.4.9  nathanw 		}
    625   1.3.4.9  nathanw 	} else {
    626   1.3.4.9  nathanw 		error = _bus_dmamem_alloc_range(t, size, alignment, boundary,
    627   1.3.4.9  nathanw 		    segs, nsegs, rsegs, flags, trunc_page(physical_start),
    628   1.3.4.9  nathanw 		    trunc_page(physical_end));
    629   1.3.4.9  nathanw 	}
    630   1.3.4.9  nathanw 
    631   1.3.4.2  nathanw #ifdef DEBUG_DMA
    632   1.3.4.2  nathanw 	printf("dmamem_alloc: =%d\n", error);
    633   1.3.4.9  nathanw #endif
    634   1.3.4.9  nathanw 
    635   1.3.4.2  nathanw 	return(error);
    636   1.3.4.2  nathanw }
    637   1.3.4.2  nathanw 
    638   1.3.4.2  nathanw /*
    639   1.3.4.2  nathanw  * Common function for freeing DMA-safe memory.  May be called by
    640   1.3.4.2  nathanw  * bus-specific DMA memory free functions.
    641   1.3.4.2  nathanw  */
    642   1.3.4.2  nathanw void
    643   1.3.4.3  nathanw _bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
    644   1.3.4.2  nathanw {
    645   1.3.4.2  nathanw 	struct vm_page *m;
    646   1.3.4.2  nathanw 	bus_addr_t addr;
    647   1.3.4.2  nathanw 	struct pglist mlist;
    648   1.3.4.2  nathanw 	int curseg;
    649   1.3.4.2  nathanw 
    650   1.3.4.2  nathanw #ifdef DEBUG_DMA
    651   1.3.4.2  nathanw 	printf("dmamem_free: t=%p segs=%p nsegs=%x\n", t, segs, nsegs);
    652   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    653   1.3.4.2  nathanw 
    654   1.3.4.2  nathanw 	/*
    655   1.3.4.2  nathanw 	 * Build a list of pages to free back to the VM system.
    656   1.3.4.2  nathanw 	 */
    657   1.3.4.2  nathanw 	TAILQ_INIT(&mlist);
    658   1.3.4.2  nathanw 	for (curseg = 0; curseg < nsegs; curseg++) {
    659   1.3.4.2  nathanw 		for (addr = segs[curseg].ds_addr;
    660   1.3.4.2  nathanw 		    addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
    661   1.3.4.2  nathanw 		    addr += PAGE_SIZE) {
    662   1.3.4.2  nathanw 			m = PHYS_TO_VM_PAGE(addr);
    663   1.3.4.2  nathanw 			TAILQ_INSERT_TAIL(&mlist, m, pageq);
    664   1.3.4.2  nathanw 		}
    665   1.3.4.2  nathanw 	}
    666   1.3.4.2  nathanw 	uvm_pglistfree(&mlist);
    667   1.3.4.2  nathanw }
    668   1.3.4.2  nathanw 
    669   1.3.4.2  nathanw /*
    670   1.3.4.2  nathanw  * Common function for mapping DMA-safe memory.  May be called by
    671   1.3.4.2  nathanw  * bus-specific DMA memory map functions.
    672   1.3.4.2  nathanw  */
    673   1.3.4.2  nathanw int
    674   1.3.4.3  nathanw _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
    675   1.3.4.3  nathanw     size_t size, caddr_t *kvap, int flags)
    676   1.3.4.2  nathanw {
    677   1.3.4.6  nathanw 	vaddr_t va;
    678   1.3.4.2  nathanw 	bus_addr_t addr;
    679   1.3.4.2  nathanw 	int curseg;
    680   1.3.4.2  nathanw 	pt_entry_t *ptep/*, pte*/;
    681   1.3.4.2  nathanw 
    682   1.3.4.2  nathanw #ifdef DEBUG_DMA
    683   1.3.4.2  nathanw 	printf("dmamem_map: t=%p segs=%p nsegs=%x size=%lx flags=%x\n", t,
    684   1.3.4.2  nathanw 	    segs, nsegs, (unsigned long)size, flags);
    685   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    686   1.3.4.2  nathanw 
    687   1.3.4.2  nathanw 	size = round_page(size);
    688   1.3.4.2  nathanw 	va = uvm_km_valloc(kernel_map, size);
    689   1.3.4.2  nathanw 
    690   1.3.4.2  nathanw 	if (va == 0)
    691   1.3.4.2  nathanw 		return (ENOMEM);
    692   1.3.4.2  nathanw 
    693   1.3.4.2  nathanw 	*kvap = (caddr_t)va;
    694   1.3.4.2  nathanw 
    695   1.3.4.2  nathanw 	for (curseg = 0; curseg < nsegs; curseg++) {
    696   1.3.4.2  nathanw 		for (addr = segs[curseg].ds_addr;
    697   1.3.4.2  nathanw 		    addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
    698   1.3.4.2  nathanw 		    addr += NBPG, va += NBPG, size -= NBPG) {
    699   1.3.4.2  nathanw #ifdef DEBUG_DMA
    700   1.3.4.2  nathanw 			printf("wiring p%lx to v%lx", addr, va);
    701   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    702   1.3.4.2  nathanw 			if (size == 0)
    703   1.3.4.2  nathanw 				panic("_bus_dmamem_map: size botch");
    704   1.3.4.2  nathanw 			pmap_enter(pmap_kernel(), va, addr,
    705   1.3.4.2  nathanw 			    VM_PROT_READ | VM_PROT_WRITE,
    706   1.3.4.2  nathanw 			    VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
    707   1.3.4.2  nathanw 			/*
    708   1.3.4.2  nathanw 			 * If the memory must remain coherent with the
    709   1.3.4.2  nathanw 			 * cache then we must make the memory uncacheable
    710   1.3.4.2  nathanw 			 * in order to maintain virtual cache coherency.
    711   1.3.4.2  nathanw 			 * We must also guarentee the cache does not already
    712   1.3.4.2  nathanw 			 * contain the virtal addresses we are making
    713   1.3.4.2  nathanw 			 * uncacheable.
    714   1.3.4.2  nathanw 			 */
    715   1.3.4.2  nathanw 			if (flags & BUS_DMA_COHERENT) {
    716   1.3.4.3  nathanw 				cpu_dcache_wbinv_range(va, NBPG);
    717   1.3.4.2  nathanw 				cpu_drain_writebuf();
    718   1.3.4.2  nathanw 				ptep = vtopte(va);
    719  1.3.4.10  thorpej 				*ptep &= ~L2_S_CACHE_MASK;
    720  1.3.4.11  thorpej 				PTE_SYNC(ptep);
    721   1.3.4.2  nathanw 				tlb_flush();
    722   1.3.4.2  nathanw 			}
    723   1.3.4.2  nathanw #ifdef DEBUG_DMA
    724   1.3.4.2  nathanw 			ptep = vtopte(va);
    725   1.3.4.2  nathanw 			printf(" pte=v%p *pte=%x\n", ptep, *ptep);
    726   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    727   1.3.4.2  nathanw 		}
    728   1.3.4.2  nathanw 	}
    729   1.3.4.2  nathanw 	pmap_update(pmap_kernel());
    730   1.3.4.2  nathanw #ifdef DEBUG_DMA
    731   1.3.4.2  nathanw 	printf("dmamem_map: =%p\n", *kvap);
    732   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    733   1.3.4.2  nathanw 	return (0);
    734   1.3.4.2  nathanw }
    735   1.3.4.2  nathanw 
    736   1.3.4.2  nathanw /*
    737   1.3.4.2  nathanw  * Common function for unmapping DMA-safe memory.  May be called by
    738   1.3.4.2  nathanw  * bus-specific DMA memory unmapping functions.
    739   1.3.4.2  nathanw  */
    740   1.3.4.2  nathanw void
    741   1.3.4.3  nathanw _bus_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
    742   1.3.4.2  nathanw {
    743   1.3.4.2  nathanw 
    744   1.3.4.2  nathanw #ifdef DEBUG_DMA
    745   1.3.4.2  nathanw 	printf("dmamem_unmap: t=%p kva=%p size=%lx\n", t, kva,
    746   1.3.4.2  nathanw 	    (unsigned long)size);
    747   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    748   1.3.4.2  nathanw #ifdef DIAGNOSTIC
    749   1.3.4.2  nathanw 	if ((u_long)kva & PGOFSET)
    750   1.3.4.2  nathanw 		panic("_bus_dmamem_unmap");
    751   1.3.4.2  nathanw #endif	/* DIAGNOSTIC */
    752   1.3.4.2  nathanw 
    753   1.3.4.2  nathanw 	size = round_page(size);
    754   1.3.4.6  nathanw 	uvm_km_free(kernel_map, (vaddr_t)kva, size);
    755   1.3.4.2  nathanw }
    756   1.3.4.2  nathanw 
    757   1.3.4.2  nathanw /*
    758   1.3.4.2  nathanw  * Common functin for mmap(2)'ing DMA-safe memory.  May be called by
    759   1.3.4.2  nathanw  * bus-specific DMA mmap(2)'ing functions.
    760   1.3.4.2  nathanw  */
    761   1.3.4.2  nathanw paddr_t
    762   1.3.4.3  nathanw _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
    763   1.3.4.3  nathanw     off_t off, int prot, int flags)
    764   1.3.4.2  nathanw {
    765   1.3.4.2  nathanw 	int i;
    766   1.3.4.2  nathanw 
    767   1.3.4.2  nathanw 	for (i = 0; i < nsegs; i++) {
    768   1.3.4.2  nathanw #ifdef DIAGNOSTIC
    769   1.3.4.2  nathanw 		if (off & PGOFSET)
    770   1.3.4.2  nathanw 			panic("_bus_dmamem_mmap: offset unaligned");
    771   1.3.4.2  nathanw 		if (segs[i].ds_addr & PGOFSET)
    772   1.3.4.2  nathanw 			panic("_bus_dmamem_mmap: segment unaligned");
    773   1.3.4.2  nathanw 		if (segs[i].ds_len & PGOFSET)
    774   1.3.4.2  nathanw 			panic("_bus_dmamem_mmap: segment size not multiple"
    775   1.3.4.2  nathanw 			    " of page size");
    776   1.3.4.2  nathanw #endif	/* DIAGNOSTIC */
    777   1.3.4.2  nathanw 		if (off >= segs[i].ds_len) {
    778   1.3.4.2  nathanw 			off -= segs[i].ds_len;
    779   1.3.4.2  nathanw 			continue;
    780   1.3.4.2  nathanw 		}
    781   1.3.4.2  nathanw 
    782   1.3.4.4  nathanw 		return (arm_btop((u_long)segs[i].ds_addr + off));
    783   1.3.4.2  nathanw 	}
    784   1.3.4.2  nathanw 
    785   1.3.4.2  nathanw 	/* Page not found. */
    786   1.3.4.2  nathanw 	return (-1);
    787   1.3.4.2  nathanw }
    788   1.3.4.2  nathanw 
    789   1.3.4.2  nathanw /**********************************************************************
    790   1.3.4.2  nathanw  * DMA utility functions
    791   1.3.4.2  nathanw  **********************************************************************/
    792   1.3.4.2  nathanw 
    793   1.3.4.2  nathanw /*
    794   1.3.4.2  nathanw  * Utility function to load a linear buffer.  lastaddrp holds state
    795   1.3.4.2  nathanw  * between invocations (for multiple-buffer loads).  segp contains
    796   1.3.4.2  nathanw  * the starting segment on entrace, and the ending segment on exit.
    797   1.3.4.2  nathanw  * first indicates if this is the first invocation of this function.
    798   1.3.4.2  nathanw  */
    799   1.3.4.2  nathanw int
    800   1.3.4.3  nathanw _bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
    801   1.3.4.6  nathanw     bus_size_t buflen, struct proc *p, int flags, paddr_t *lastaddrp,
    802   1.3.4.3  nathanw     int *segp, int first)
    803   1.3.4.2  nathanw {
    804   1.3.4.9  nathanw 	struct arm32_dma_range *dr;
    805   1.3.4.2  nathanw 	bus_size_t sgsize;
    806   1.3.4.2  nathanw 	bus_addr_t curaddr, lastaddr, baddr, bmask;
    807   1.3.4.6  nathanw 	vaddr_t vaddr = (vaddr_t)buf;
    808  1.3.4.10  thorpej 	pd_entry_t *pde;
    809  1.3.4.10  thorpej 	pt_entry_t pte;
    810   1.3.4.2  nathanw 	int seg;
    811   1.3.4.2  nathanw 	pmap_t pmap;
    812   1.3.4.2  nathanw 
    813   1.3.4.2  nathanw #ifdef DEBUG_DMA
    814   1.3.4.2  nathanw 	printf("_bus_dmamem_load_buffer(buf=%p, len=%lx, flags=%d, 1st=%d)\n",
    815   1.3.4.2  nathanw 	    buf, buflen, flags, first);
    816   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    817   1.3.4.2  nathanw 
    818   1.3.4.2  nathanw 	if (p != NULL)
    819   1.3.4.2  nathanw 		pmap = p->p_vmspace->vm_map.pmap;
    820   1.3.4.2  nathanw 	else
    821   1.3.4.2  nathanw 		pmap = pmap_kernel();
    822   1.3.4.2  nathanw 
    823   1.3.4.2  nathanw 	lastaddr = *lastaddrp;
    824   1.3.4.2  nathanw 	bmask  = ~(map->_dm_boundary - 1);
    825   1.3.4.2  nathanw 
    826   1.3.4.2  nathanw 	for (seg = *segp; buflen > 0; ) {
    827   1.3.4.2  nathanw 		/*
    828   1.3.4.2  nathanw 		 * Get the physical address for this segment.
    829  1.3.4.10  thorpej 		 *
    830  1.3.4.10  thorpej 		 * XXX Don't support checking for coherent mappings
    831  1.3.4.10  thorpej 		 * XXX in user address space.
    832   1.3.4.2  nathanw 		 */
    833  1.3.4.10  thorpej 		if (__predict_true(pmap == pmap_kernel())) {
    834  1.3.4.10  thorpej 			pde = pmap_pde(pmap, vaddr);
    835  1.3.4.10  thorpej 			if (__predict_false(pmap_pde_section(pde))) {
    836  1.3.4.10  thorpej 				curaddr = (*pde & L1_S_FRAME) |
    837  1.3.4.10  thorpej 				    (vaddr & L1_S_OFFSET);
    838  1.3.4.10  thorpej 				if (*pde & L1_S_CACHE_MASK) {
    839  1.3.4.10  thorpej 					map->_dm_flags &=
    840  1.3.4.10  thorpej 					    ~ARM32_DMAMAP_COHERENT;
    841  1.3.4.10  thorpej 				}
    842  1.3.4.10  thorpej 			} else {
    843  1.3.4.10  thorpej 				pte = *vtopte(vaddr);
    844  1.3.4.10  thorpej 				KDASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV);
    845  1.3.4.10  thorpej 				if (__predict_false((pte & L2_TYPE_MASK)
    846  1.3.4.10  thorpej 						    == L2_TYPE_L)) {
    847  1.3.4.10  thorpej 					curaddr = (pte & L2_L_FRAME) |
    848  1.3.4.10  thorpej 					    (vaddr & L2_L_OFFSET);
    849  1.3.4.10  thorpej 					if (pte & L2_L_CACHE_MASK) {
    850  1.3.4.10  thorpej 						map->_dm_flags &=
    851  1.3.4.10  thorpej 						    ~ARM32_DMAMAP_COHERENT;
    852  1.3.4.10  thorpej 					}
    853  1.3.4.10  thorpej 				} else {
    854  1.3.4.10  thorpej 					curaddr = (pte & L2_S_FRAME) |
    855  1.3.4.10  thorpej 					    (vaddr & L2_S_OFFSET);
    856  1.3.4.10  thorpej 					if (pte & L2_S_CACHE_MASK) {
    857  1.3.4.10  thorpej 						map->_dm_flags &=
    858  1.3.4.10  thorpej 						    ~ARM32_DMAMAP_COHERENT;
    859  1.3.4.10  thorpej 					}
    860  1.3.4.10  thorpej 				}
    861  1.3.4.10  thorpej 			}
    862  1.3.4.10  thorpej 		} else
    863  1.3.4.10  thorpej 			(void) pmap_extract(pmap, vaddr, &curaddr);
    864   1.3.4.2  nathanw 
    865   1.3.4.2  nathanw 		/*
    866   1.3.4.2  nathanw 		 * Make sure we're in an allowed DMA range.
    867   1.3.4.2  nathanw 		 */
    868   1.3.4.9  nathanw 		if (t->_ranges != NULL) {
    869   1.3.4.9  nathanw 			/* XXX cache last result? */
    870   1.3.4.9  nathanw 			dr = _bus_dma_inrange(t->_ranges, t->_nranges,
    871   1.3.4.9  nathanw 			    curaddr);
    872   1.3.4.9  nathanw 			if (dr == NULL)
    873   1.3.4.9  nathanw 				return (EINVAL);
    874   1.3.4.9  nathanw 
    875   1.3.4.9  nathanw 			/*
    876   1.3.4.9  nathanw 			 * In a valid DMA range.  Translate the physical
    877   1.3.4.9  nathanw 			 * memory address to an address in the DMA window.
    878   1.3.4.9  nathanw 			 */
    879   1.3.4.9  nathanw 			curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
    880   1.3.4.9  nathanw 		}
    881   1.3.4.2  nathanw 
    882   1.3.4.2  nathanw 		/*
    883   1.3.4.2  nathanw 		 * Compute the segment size, and adjust counts.
    884   1.3.4.2  nathanw 		 */
    885   1.3.4.2  nathanw 		sgsize = NBPG - ((u_long)vaddr & PGOFSET);
    886   1.3.4.2  nathanw 		if (buflen < sgsize)
    887   1.3.4.2  nathanw 			sgsize = buflen;
    888   1.3.4.2  nathanw 
    889   1.3.4.2  nathanw 		/*
    890   1.3.4.2  nathanw 		 * Make sure we don't cross any boundaries.
    891   1.3.4.2  nathanw 		 */
    892   1.3.4.2  nathanw 		if (map->_dm_boundary > 0) {
    893   1.3.4.2  nathanw 			baddr = (curaddr + map->_dm_boundary) & bmask;
    894   1.3.4.2  nathanw 			if (sgsize > (baddr - curaddr))
    895   1.3.4.2  nathanw 				sgsize = (baddr - curaddr);
    896   1.3.4.2  nathanw 		}
    897   1.3.4.2  nathanw 
    898   1.3.4.2  nathanw 		/*
    899   1.3.4.2  nathanw 		 * Insert chunk into a segment, coalescing with
    900   1.3.4.2  nathanw 		 * previous segment if possible.
    901   1.3.4.2  nathanw 		 */
    902   1.3.4.2  nathanw 		if (first) {
    903   1.3.4.2  nathanw 			map->dm_segs[seg].ds_addr = curaddr;
    904   1.3.4.2  nathanw 			map->dm_segs[seg].ds_len = sgsize;
    905   1.3.4.2  nathanw 			first = 0;
    906   1.3.4.2  nathanw 		} else {
    907   1.3.4.2  nathanw 			if (curaddr == lastaddr &&
    908   1.3.4.2  nathanw 			    (map->dm_segs[seg].ds_len + sgsize) <=
    909   1.3.4.2  nathanw 			     map->_dm_maxsegsz &&
    910   1.3.4.2  nathanw 			    (map->_dm_boundary == 0 ||
    911   1.3.4.2  nathanw 			     (map->dm_segs[seg].ds_addr & bmask) ==
    912   1.3.4.2  nathanw 			     (curaddr & bmask)))
    913   1.3.4.2  nathanw 				map->dm_segs[seg].ds_len += sgsize;
    914   1.3.4.2  nathanw 			else {
    915   1.3.4.2  nathanw 				if (++seg >= map->_dm_segcnt)
    916   1.3.4.2  nathanw 					break;
    917   1.3.4.2  nathanw 				map->dm_segs[seg].ds_addr = curaddr;
    918   1.3.4.2  nathanw 				map->dm_segs[seg].ds_len = sgsize;
    919   1.3.4.2  nathanw 			}
    920   1.3.4.2  nathanw 		}
    921   1.3.4.2  nathanw 
    922   1.3.4.2  nathanw 		lastaddr = curaddr + sgsize;
    923   1.3.4.2  nathanw 		vaddr += sgsize;
    924   1.3.4.2  nathanw 		buflen -= sgsize;
    925   1.3.4.2  nathanw 	}
    926   1.3.4.2  nathanw 
    927   1.3.4.2  nathanw 	*segp = seg;
    928   1.3.4.2  nathanw 	*lastaddrp = lastaddr;
    929   1.3.4.2  nathanw 
    930   1.3.4.2  nathanw 	/*
    931   1.3.4.2  nathanw 	 * Did we fit?
    932   1.3.4.2  nathanw 	 */
    933   1.3.4.2  nathanw 	if (buflen != 0)
    934   1.3.4.2  nathanw 		return (EFBIG);		/* XXX better return value here? */
    935   1.3.4.2  nathanw 	return (0);
    936   1.3.4.2  nathanw }
    937   1.3.4.2  nathanw 
    938   1.3.4.2  nathanw /*
    939   1.3.4.2  nathanw  * Allocate physical memory from the given physical address range.
    940   1.3.4.2  nathanw  * Called by DMA-safe memory allocation methods.
    941   1.3.4.2  nathanw  */
    942   1.3.4.2  nathanw int
    943   1.3.4.3  nathanw _bus_dmamem_alloc_range(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
    944   1.3.4.3  nathanw     bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
    945   1.3.4.6  nathanw     int flags, paddr_t low, paddr_t high)
    946   1.3.4.2  nathanw {
    947   1.3.4.6  nathanw 	paddr_t curaddr, lastaddr;
    948   1.3.4.2  nathanw 	struct vm_page *m;
    949   1.3.4.2  nathanw 	struct pglist mlist;
    950   1.3.4.2  nathanw 	int curseg, error;
    951   1.3.4.2  nathanw 
    952   1.3.4.2  nathanw #ifdef DEBUG_DMA
    953   1.3.4.2  nathanw 	printf("alloc_range: t=%p size=%lx align=%lx boundary=%lx segs=%p nsegs=%x rsegs=%p flags=%x lo=%lx hi=%lx\n",
    954   1.3.4.2  nathanw 	    t, size, alignment, boundary, segs, nsegs, rsegs, flags, low, high);
    955   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    956   1.3.4.2  nathanw 
    957   1.3.4.2  nathanw 	/* Always round the size. */
    958   1.3.4.2  nathanw 	size = round_page(size);
    959   1.3.4.2  nathanw 
    960   1.3.4.2  nathanw 	/*
    961   1.3.4.2  nathanw 	 * Allocate pages from the VM system.
    962   1.3.4.2  nathanw 	 */
    963   1.3.4.2  nathanw 	error = uvm_pglistalloc(size, low, high, alignment, boundary,
    964   1.3.4.2  nathanw 	    &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
    965   1.3.4.2  nathanw 	if (error)
    966   1.3.4.2  nathanw 		return (error);
    967   1.3.4.2  nathanw 
    968   1.3.4.2  nathanw 	/*
    969   1.3.4.2  nathanw 	 * Compute the location, size, and number of segments actually
    970   1.3.4.2  nathanw 	 * returned by the VM code.
    971   1.3.4.2  nathanw 	 */
    972   1.3.4.2  nathanw 	m = mlist.tqh_first;
    973   1.3.4.2  nathanw 	curseg = 0;
    974   1.3.4.2  nathanw 	lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
    975   1.3.4.2  nathanw 	segs[curseg].ds_len = PAGE_SIZE;
    976   1.3.4.2  nathanw #ifdef DEBUG_DMA
    977   1.3.4.2  nathanw 		printf("alloc: page %lx\n", lastaddr);
    978   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    979   1.3.4.2  nathanw 	m = m->pageq.tqe_next;
    980   1.3.4.2  nathanw 
    981   1.3.4.2  nathanw 	for (; m != NULL; m = m->pageq.tqe_next) {
    982   1.3.4.2  nathanw 		curaddr = VM_PAGE_TO_PHYS(m);
    983   1.3.4.2  nathanw #ifdef DIAGNOSTIC
    984   1.3.4.2  nathanw 		if (curaddr < low || curaddr >= high) {
    985   1.3.4.2  nathanw 			printf("uvm_pglistalloc returned non-sensical"
    986   1.3.4.2  nathanw 			    " address 0x%lx\n", curaddr);
    987   1.3.4.2  nathanw 			panic("_bus_dmamem_alloc_range");
    988   1.3.4.2  nathanw 		}
    989   1.3.4.2  nathanw #endif	/* DIAGNOSTIC */
    990   1.3.4.2  nathanw #ifdef DEBUG_DMA
    991   1.3.4.2  nathanw 		printf("alloc: page %lx\n", curaddr);
    992   1.3.4.2  nathanw #endif	/* DEBUG_DMA */
    993   1.3.4.2  nathanw 		if (curaddr == (lastaddr + PAGE_SIZE))
    994   1.3.4.2  nathanw 			segs[curseg].ds_len += PAGE_SIZE;
    995   1.3.4.2  nathanw 		else {
    996   1.3.4.2  nathanw 			curseg++;
    997   1.3.4.2  nathanw 			segs[curseg].ds_addr = curaddr;
    998   1.3.4.2  nathanw 			segs[curseg].ds_len = PAGE_SIZE;
    999   1.3.4.2  nathanw 		}
   1000   1.3.4.2  nathanw 		lastaddr = curaddr;
   1001   1.3.4.2  nathanw 	}
   1002   1.3.4.2  nathanw 
   1003   1.3.4.2  nathanw 	*rsegs = curseg + 1;
   1004   1.3.4.2  nathanw 
   1005   1.3.4.2  nathanw 	return (0);
   1006   1.3.4.2  nathanw }
   1007   1.3.4.9  nathanw 
   1008   1.3.4.9  nathanw /*
   1009   1.3.4.9  nathanw  * Check if a memory region intersects with a DMA range, and return the
   1010   1.3.4.9  nathanw  * page-rounded intersection if it does.
   1011   1.3.4.9  nathanw  */
   1012   1.3.4.9  nathanw int
   1013   1.3.4.9  nathanw arm32_dma_range_intersect(struct arm32_dma_range *ranges, int nranges,
   1014   1.3.4.9  nathanw     paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep)
   1015   1.3.4.9  nathanw {
   1016   1.3.4.9  nathanw 	struct arm32_dma_range *dr;
   1017   1.3.4.9  nathanw 	int i;
   1018   1.3.4.9  nathanw 
   1019   1.3.4.9  nathanw 	if (ranges == NULL)
   1020   1.3.4.9  nathanw 		return (0);
   1021   1.3.4.9  nathanw 
   1022   1.3.4.9  nathanw 	for (i = 0, dr = ranges; i < nranges; i++, dr++) {
   1023   1.3.4.9  nathanw 		if (dr->dr_sysbase <= pa &&
   1024   1.3.4.9  nathanw 		    pa < (dr->dr_sysbase + dr->dr_len)) {
   1025   1.3.4.9  nathanw 			/*
   1026   1.3.4.9  nathanw 			 * Beginning of region intersects with this range.
   1027   1.3.4.9  nathanw 			 */
   1028   1.3.4.9  nathanw 			*pap = trunc_page(pa);
   1029   1.3.4.9  nathanw 			*sizep = round_page(min(pa + size,
   1030   1.3.4.9  nathanw 			    dr->dr_sysbase + dr->dr_len) - pa);
   1031   1.3.4.9  nathanw 			return (1);
   1032   1.3.4.9  nathanw 		}
   1033   1.3.4.9  nathanw 		if (pa < dr->dr_sysbase && dr->dr_sysbase < (pa + size)) {
   1034   1.3.4.9  nathanw 			/*
   1035   1.3.4.9  nathanw 			 * End of region intersects with this range.
   1036   1.3.4.9  nathanw 			 */
   1037   1.3.4.9  nathanw 			*pap = trunc_page(dr->dr_sysbase);
   1038   1.3.4.9  nathanw 			*sizep = round_page(min((pa + size) - dr->dr_sysbase,
   1039   1.3.4.9  nathanw 			    dr->dr_len));
   1040   1.3.4.9  nathanw 			return (1);
   1041   1.3.4.9  nathanw 		}
   1042   1.3.4.9  nathanw 	}
   1043   1.3.4.9  nathanw 
   1044   1.3.4.9  nathanw 	/* No intersection found. */
   1045   1.3.4.9  nathanw 	return (0);
   1046   1.3.4.9  nathanw }
   1047