bus_dma.c revision 1.3.4.6 1 1.3.4.6 nathanw /* $NetBSD: bus_dma.c,v 1.3.4.6 2002/04/17 00:02:25 nathanw Exp $ */
2 1.3.4.2 nathanw
3 1.3.4.2 nathanw /*-
4 1.3.4.2 nathanw * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.3.4.2 nathanw * All rights reserved.
6 1.3.4.2 nathanw *
7 1.3.4.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.3.4.2 nathanw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.3.4.2 nathanw * NASA Ames Research Center.
10 1.3.4.2 nathanw *
11 1.3.4.2 nathanw * Redistribution and use in source and binary forms, with or without
12 1.3.4.2 nathanw * modification, are permitted provided that the following conditions
13 1.3.4.2 nathanw * are met:
14 1.3.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
15 1.3.4.2 nathanw * notice, this list of conditions and the following disclaimer.
16 1.3.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
17 1.3.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
18 1.3.4.2 nathanw * documentation and/or other materials provided with the distribution.
19 1.3.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
20 1.3.4.2 nathanw * must display the following acknowledgement:
21 1.3.4.2 nathanw * This product includes software developed by the NetBSD
22 1.3.4.2 nathanw * Foundation, Inc. and its contributors.
23 1.3.4.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.3.4.2 nathanw * contributors may be used to endorse or promote products derived
25 1.3.4.2 nathanw * from this software without specific prior written permission.
26 1.3.4.2 nathanw *
27 1.3.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.3.4.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.3.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.3.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.3.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.3.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.3.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.3.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.3.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.3.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.3.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
38 1.3.4.2 nathanw */
39 1.3.4.2 nathanw
40 1.3.4.2 nathanw #include <sys/param.h>
41 1.3.4.2 nathanw #include <sys/systm.h>
42 1.3.4.2 nathanw #include <sys/kernel.h>
43 1.3.4.2 nathanw #include <sys/map.h>
44 1.3.4.2 nathanw #include <sys/proc.h>
45 1.3.4.2 nathanw #include <sys/buf.h>
46 1.3.4.2 nathanw #include <sys/reboot.h>
47 1.3.4.2 nathanw #include <sys/conf.h>
48 1.3.4.2 nathanw #include <sys/file.h>
49 1.3.4.2 nathanw #include <sys/malloc.h>
50 1.3.4.2 nathanw #include <sys/mbuf.h>
51 1.3.4.2 nathanw #include <sys/vnode.h>
52 1.3.4.2 nathanw #include <sys/device.h>
53 1.3.4.2 nathanw
54 1.3.4.2 nathanw #include <uvm/uvm_extern.h>
55 1.3.4.2 nathanw
56 1.3.4.2 nathanw #define _ARM32_BUS_DMA_PRIVATE
57 1.3.4.2 nathanw #include <machine/bus.h>
58 1.3.4.2 nathanw
59 1.3.4.2 nathanw #include <machine/cpu.h>
60 1.3.4.2 nathanw
61 1.3.4.2 nathanw #include <arm/cpufunc.h>
62 1.3.4.2 nathanw
63 1.3.4.3 nathanw int _bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
64 1.3.4.6 nathanw bus_size_t, struct proc *, int, paddr_t *, int *, int);
65 1.3.4.3 nathanw int _bus_dma_inrange(bus_dma_segment_t *, int, bus_addr_t);
66 1.3.4.2 nathanw
67 1.3.4.2 nathanw /*
68 1.3.4.2 nathanw * Common function for DMA map creation. May be called by bus-specific
69 1.3.4.2 nathanw * DMA map creation functions.
70 1.3.4.2 nathanw */
71 1.3.4.2 nathanw int
72 1.3.4.3 nathanw _bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
73 1.3.4.3 nathanw bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
74 1.3.4.2 nathanw {
75 1.3.4.2 nathanw struct arm32_bus_dmamap *map;
76 1.3.4.2 nathanw void *mapstore;
77 1.3.4.2 nathanw size_t mapsize;
78 1.3.4.2 nathanw
79 1.3.4.2 nathanw #ifdef DEBUG_DMA
80 1.3.4.2 nathanw printf("dmamap_create: t=%p size=%lx nseg=%x msegsz=%lx boundary=%lx flags=%x\n",
81 1.3.4.2 nathanw t, size, nsegments, maxsegsz, boundary, flags);
82 1.3.4.2 nathanw #endif /* DEBUG_DMA */
83 1.3.4.2 nathanw
84 1.3.4.2 nathanw /*
85 1.3.4.2 nathanw * Allocate and initialize the DMA map. The end of the map
86 1.3.4.2 nathanw * is a variable-sized array of segments, so we allocate enough
87 1.3.4.2 nathanw * room for them in one shot.
88 1.3.4.2 nathanw *
89 1.3.4.2 nathanw * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
90 1.3.4.2 nathanw * of ALLOCNOW notifies others that we've reserved these resources,
91 1.3.4.2 nathanw * and they are not to be freed.
92 1.3.4.2 nathanw *
93 1.3.4.2 nathanw * The bus_dmamap_t includes one bus_dma_segment_t, hence
94 1.3.4.2 nathanw * the (nsegments - 1).
95 1.3.4.2 nathanw */
96 1.3.4.2 nathanw mapsize = sizeof(struct arm32_bus_dmamap) +
97 1.3.4.2 nathanw (sizeof(bus_dma_segment_t) * (nsegments - 1));
98 1.3.4.2 nathanw if ((mapstore = malloc(mapsize, M_DMAMAP,
99 1.3.4.2 nathanw (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
100 1.3.4.2 nathanw return (ENOMEM);
101 1.3.4.2 nathanw
102 1.3.4.2 nathanw memset(mapstore, 0, mapsize);
103 1.3.4.2 nathanw map = (struct arm32_bus_dmamap *)mapstore;
104 1.3.4.2 nathanw map->_dm_size = size;
105 1.3.4.2 nathanw map->_dm_segcnt = nsegments;
106 1.3.4.2 nathanw map->_dm_maxsegsz = maxsegsz;
107 1.3.4.2 nathanw map->_dm_boundary = boundary;
108 1.3.4.2 nathanw map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
109 1.3.4.3 nathanw map->_dm_proc = NULL;
110 1.3.4.2 nathanw map->dm_mapsize = 0; /* no valid mappings */
111 1.3.4.2 nathanw map->dm_nsegs = 0;
112 1.3.4.2 nathanw
113 1.3.4.2 nathanw *dmamp = map;
114 1.3.4.2 nathanw #ifdef DEBUG_DMA
115 1.3.4.2 nathanw printf("dmamap_create:map=%p\n", map);
116 1.3.4.2 nathanw #endif /* DEBUG_DMA */
117 1.3.4.2 nathanw return (0);
118 1.3.4.2 nathanw }
119 1.3.4.2 nathanw
120 1.3.4.2 nathanw /*
121 1.3.4.2 nathanw * Common function for DMA map destruction. May be called by bus-specific
122 1.3.4.2 nathanw * DMA map destruction functions.
123 1.3.4.2 nathanw */
124 1.3.4.2 nathanw void
125 1.3.4.3 nathanw _bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
126 1.3.4.2 nathanw {
127 1.3.4.2 nathanw
128 1.3.4.2 nathanw #ifdef DEBUG_DMA
129 1.3.4.2 nathanw printf("dmamap_destroy: t=%p map=%p\n", t, map);
130 1.3.4.2 nathanw #endif /* DEBUG_DMA */
131 1.3.4.2 nathanw #ifdef DIAGNOSTIC
132 1.3.4.2 nathanw if (map->dm_nsegs > 0)
133 1.3.4.2 nathanw printf("bus_dmamap_destroy() called for map with valid mappings\n");
134 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
135 1.3.4.2 nathanw free(map, M_DEVBUF);
136 1.3.4.2 nathanw }
137 1.3.4.2 nathanw
138 1.3.4.2 nathanw /*
139 1.3.4.2 nathanw * Common function for loading a DMA map with a linear buffer. May
140 1.3.4.2 nathanw * be called by bus-specific DMA map load functions.
141 1.3.4.2 nathanw */
142 1.3.4.2 nathanw int
143 1.3.4.3 nathanw _bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
144 1.3.4.3 nathanw bus_size_t buflen, struct proc *p, int flags)
145 1.3.4.2 nathanw {
146 1.3.4.6 nathanw paddr_t lastaddr;
147 1.3.4.2 nathanw int seg, error;
148 1.3.4.2 nathanw
149 1.3.4.2 nathanw #ifdef DEBUG_DMA
150 1.3.4.2 nathanw printf("dmamap_load: t=%p map=%p buf=%p len=%lx p=%p f=%d\n",
151 1.3.4.2 nathanw t, map, buf, buflen, p, flags);
152 1.3.4.2 nathanw #endif /* DEBUG_DMA */
153 1.3.4.2 nathanw
154 1.3.4.2 nathanw /*
155 1.3.4.2 nathanw * Make sure that on error condition we return "no valid mappings".
156 1.3.4.2 nathanw */
157 1.3.4.2 nathanw map->dm_mapsize = 0;
158 1.3.4.2 nathanw map->dm_nsegs = 0;
159 1.3.4.2 nathanw
160 1.3.4.2 nathanw if (buflen > map->_dm_size)
161 1.3.4.2 nathanw return (EINVAL);
162 1.3.4.2 nathanw
163 1.3.4.2 nathanw seg = 0;
164 1.3.4.2 nathanw error = _bus_dmamap_load_buffer(t, map, buf, buflen, p, flags,
165 1.3.4.2 nathanw &lastaddr, &seg, 1);
166 1.3.4.2 nathanw if (error == 0) {
167 1.3.4.2 nathanw map->dm_mapsize = buflen;
168 1.3.4.2 nathanw map->dm_nsegs = seg + 1;
169 1.3.4.3 nathanw map->_dm_proc = p;
170 1.3.4.2 nathanw }
171 1.3.4.2 nathanw #ifdef DEBUG_DMA
172 1.3.4.2 nathanw printf("dmamap_load: error=%d\n", error);
173 1.3.4.2 nathanw #endif /* DEBUG_DMA */
174 1.3.4.2 nathanw return (error);
175 1.3.4.2 nathanw }
176 1.3.4.2 nathanw
177 1.3.4.2 nathanw /*
178 1.3.4.2 nathanw * Like _bus_dmamap_load(), but for mbufs.
179 1.3.4.2 nathanw */
180 1.3.4.2 nathanw int
181 1.3.4.3 nathanw _bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
182 1.3.4.3 nathanw int flags)
183 1.3.4.2 nathanw {
184 1.3.4.6 nathanw paddr_t lastaddr;
185 1.3.4.2 nathanw int seg, error, first;
186 1.3.4.2 nathanw struct mbuf *m;
187 1.3.4.2 nathanw
188 1.3.4.2 nathanw #ifdef DEBUG_DMA
189 1.3.4.2 nathanw printf("dmamap_load_mbuf: t=%p map=%p m0=%p f=%d\n",
190 1.3.4.2 nathanw t, map, m0, flags);
191 1.3.4.2 nathanw #endif /* DEBUG_DMA */
192 1.3.4.2 nathanw
193 1.3.4.2 nathanw /*
194 1.3.4.2 nathanw * Make sure that on error condition we return "no valid mappings."
195 1.3.4.2 nathanw */
196 1.3.4.2 nathanw map->dm_mapsize = 0;
197 1.3.4.2 nathanw map->dm_nsegs = 0;
198 1.3.4.2 nathanw
199 1.3.4.2 nathanw #ifdef DIAGNOSTIC
200 1.3.4.2 nathanw if ((m0->m_flags & M_PKTHDR) == 0)
201 1.3.4.2 nathanw panic("_bus_dmamap_load_mbuf: no packet header");
202 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
203 1.3.4.2 nathanw
204 1.3.4.2 nathanw if (m0->m_pkthdr.len > map->_dm_size)
205 1.3.4.2 nathanw return (EINVAL);
206 1.3.4.2 nathanw
207 1.3.4.2 nathanw first = 1;
208 1.3.4.2 nathanw seg = 0;
209 1.3.4.2 nathanw error = 0;
210 1.3.4.2 nathanw for (m = m0; m != NULL && error == 0; m = m->m_next) {
211 1.3.4.2 nathanw error = _bus_dmamap_load_buffer(t, map, m->m_data, m->m_len,
212 1.3.4.2 nathanw NULL, flags, &lastaddr, &seg, first);
213 1.3.4.2 nathanw first = 0;
214 1.3.4.2 nathanw }
215 1.3.4.2 nathanw if (error == 0) {
216 1.3.4.2 nathanw map->dm_mapsize = m0->m_pkthdr.len;
217 1.3.4.2 nathanw map->dm_nsegs = seg + 1;
218 1.3.4.3 nathanw map->_dm_proc = NULL; /* always kernel */
219 1.3.4.2 nathanw }
220 1.3.4.2 nathanw #ifdef DEBUG_DMA
221 1.3.4.2 nathanw printf("dmamap_load_mbuf: error=%d\n", error);
222 1.3.4.2 nathanw #endif /* DEBUG_DMA */
223 1.3.4.2 nathanw return (error);
224 1.3.4.2 nathanw }
225 1.3.4.2 nathanw
226 1.3.4.2 nathanw /*
227 1.3.4.2 nathanw * Like _bus_dmamap_load(), but for uios.
228 1.3.4.2 nathanw */
229 1.3.4.2 nathanw int
230 1.3.4.3 nathanw _bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
231 1.3.4.3 nathanw int flags)
232 1.3.4.2 nathanw {
233 1.3.4.6 nathanw paddr_t lastaddr;
234 1.3.4.2 nathanw int seg, i, error, first;
235 1.3.4.2 nathanw bus_size_t minlen, resid;
236 1.3.4.2 nathanw struct proc *p = NULL;
237 1.3.4.2 nathanw struct iovec *iov;
238 1.3.4.2 nathanw caddr_t addr;
239 1.3.4.2 nathanw
240 1.3.4.2 nathanw /*
241 1.3.4.2 nathanw * Make sure that on error condition we return "no valid mappings."
242 1.3.4.2 nathanw */
243 1.3.4.2 nathanw map->dm_mapsize = 0;
244 1.3.4.2 nathanw map->dm_nsegs = 0;
245 1.3.4.2 nathanw
246 1.3.4.2 nathanw resid = uio->uio_resid;
247 1.3.4.2 nathanw iov = uio->uio_iov;
248 1.3.4.2 nathanw
249 1.3.4.2 nathanw if (uio->uio_segflg == UIO_USERSPACE) {
250 1.3.4.2 nathanw p = uio->uio_procp;
251 1.3.4.2 nathanw #ifdef DIAGNOSTIC
252 1.3.4.2 nathanw if (p == NULL)
253 1.3.4.2 nathanw panic("_bus_dmamap_load_uio: USERSPACE but no proc");
254 1.3.4.2 nathanw #endif
255 1.3.4.2 nathanw }
256 1.3.4.2 nathanw
257 1.3.4.2 nathanw first = 1;
258 1.3.4.2 nathanw seg = 0;
259 1.3.4.2 nathanw error = 0;
260 1.3.4.2 nathanw for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
261 1.3.4.2 nathanw /*
262 1.3.4.2 nathanw * Now at the first iovec to load. Load each iovec
263 1.3.4.2 nathanw * until we have exhausted the residual count.
264 1.3.4.2 nathanw */
265 1.3.4.2 nathanw minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
266 1.3.4.2 nathanw addr = (caddr_t)iov[i].iov_base;
267 1.3.4.2 nathanw
268 1.3.4.2 nathanw error = _bus_dmamap_load_buffer(t, map, addr, minlen,
269 1.3.4.2 nathanw p, flags, &lastaddr, &seg, first);
270 1.3.4.2 nathanw first = 0;
271 1.3.4.2 nathanw
272 1.3.4.2 nathanw resid -= minlen;
273 1.3.4.2 nathanw }
274 1.3.4.2 nathanw if (error == 0) {
275 1.3.4.2 nathanw map->dm_mapsize = uio->uio_resid;
276 1.3.4.2 nathanw map->dm_nsegs = seg + 1;
277 1.3.4.3 nathanw map->_dm_proc = p;
278 1.3.4.2 nathanw }
279 1.3.4.2 nathanw return (error);
280 1.3.4.2 nathanw }
281 1.3.4.2 nathanw
282 1.3.4.2 nathanw /*
283 1.3.4.2 nathanw * Like _bus_dmamap_load(), but for raw memory allocated with
284 1.3.4.2 nathanw * bus_dmamem_alloc().
285 1.3.4.2 nathanw */
286 1.3.4.2 nathanw int
287 1.3.4.3 nathanw _bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
288 1.3.4.3 nathanw bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
289 1.3.4.2 nathanw {
290 1.3.4.2 nathanw
291 1.3.4.2 nathanw panic("_bus_dmamap_load_raw: not implemented");
292 1.3.4.2 nathanw }
293 1.3.4.2 nathanw
294 1.3.4.2 nathanw /*
295 1.3.4.2 nathanw * Common function for unloading a DMA map. May be called by
296 1.3.4.2 nathanw * bus-specific DMA map unload functions.
297 1.3.4.2 nathanw */
298 1.3.4.2 nathanw void
299 1.3.4.3 nathanw _bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
300 1.3.4.2 nathanw {
301 1.3.4.2 nathanw
302 1.3.4.2 nathanw #ifdef DEBUG_DMA
303 1.3.4.2 nathanw printf("dmamap_unload: t=%p map=%p\n", t, map);
304 1.3.4.2 nathanw #endif /* DEBUG_DMA */
305 1.3.4.2 nathanw
306 1.3.4.2 nathanw /*
307 1.3.4.2 nathanw * No resources to free; just mark the mappings as
308 1.3.4.2 nathanw * invalid.
309 1.3.4.2 nathanw */
310 1.3.4.2 nathanw map->dm_mapsize = 0;
311 1.3.4.2 nathanw map->dm_nsegs = 0;
312 1.3.4.3 nathanw map->_dm_proc = NULL;
313 1.3.4.2 nathanw }
314 1.3.4.2 nathanw
315 1.3.4.2 nathanw /*
316 1.3.4.2 nathanw * Common function for DMA map synchronization. May be called
317 1.3.4.2 nathanw * by bus-specific DMA map synchronization functions.
318 1.3.4.3 nathanw *
319 1.3.4.3 nathanw * This version works for the Virtually Indexed Virtually Tagged
320 1.3.4.3 nathanw * cache found on 32-bit ARM processors.
321 1.3.4.3 nathanw *
322 1.3.4.3 nathanw * XXX Should have separate versions for write-through vs.
323 1.3.4.3 nathanw * XXX write-back caches. We currently assume write-back
324 1.3.4.3 nathanw * XXX here, which is not as efficient as it could be for
325 1.3.4.3 nathanw * XXX the write-through case.
326 1.3.4.2 nathanw */
327 1.3.4.2 nathanw void
328 1.3.4.3 nathanw _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
329 1.3.4.3 nathanw bus_size_t len, int ops)
330 1.3.4.3 nathanw {
331 1.3.4.3 nathanw bus_size_t minlen;
332 1.3.4.3 nathanw bus_addr_t addr;
333 1.3.4.3 nathanw int i;
334 1.3.4.2 nathanw
335 1.3.4.2 nathanw #ifdef DEBUG_DMA
336 1.3.4.2 nathanw printf("dmamap_sync: t=%p map=%p offset=%lx len=%lx ops=%x\n",
337 1.3.4.2 nathanw t, map, offset, len, ops);
338 1.3.4.2 nathanw #endif /* DEBUG_DMA */
339 1.3.4.2 nathanw
340 1.3.4.3 nathanw /*
341 1.3.4.3 nathanw * Mixing of PRE and POST operations is not allowed.
342 1.3.4.3 nathanw */
343 1.3.4.3 nathanw if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
344 1.3.4.3 nathanw (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
345 1.3.4.3 nathanw panic("_bus_dmamap_sync: mix PRE and POST");
346 1.3.4.3 nathanw
347 1.3.4.3 nathanw #ifdef DIAGNOSTIC
348 1.3.4.3 nathanw if (offset >= map->dm_mapsize)
349 1.3.4.3 nathanw panic("_bus_dmamap_sync: bad offset %lu (map size is %lu)",
350 1.3.4.3 nathanw offset, map->dm_mapsize);
351 1.3.4.3 nathanw if (len == 0 || (offset + len) > map->dm_mapsize)
352 1.3.4.3 nathanw panic("_bus_dmamap_sync: bad length");
353 1.3.4.3 nathanw #endif
354 1.3.4.3 nathanw
355 1.3.4.3 nathanw /*
356 1.3.4.3 nathanw * For a virtually-indexed write-back cache, we need
357 1.3.4.3 nathanw * to do the following things:
358 1.3.4.3 nathanw *
359 1.3.4.3 nathanw * PREREAD -- Invalidate the D-cache. We do this
360 1.3.4.3 nathanw * here in case a write-back is required by the back-end.
361 1.3.4.3 nathanw *
362 1.3.4.3 nathanw * PREWRITE -- Write-back the D-cache. Note that if
363 1.3.4.3 nathanw * we are doing a PREREAD|PREWRITE, we can collapse
364 1.3.4.3 nathanw * the whole thing into a single Wb-Inv.
365 1.3.4.3 nathanw *
366 1.3.4.3 nathanw * POSTREAD -- Nothing.
367 1.3.4.3 nathanw *
368 1.3.4.3 nathanw * POSTWRITE -- Nothing.
369 1.3.4.3 nathanw */
370 1.3.4.3 nathanw
371 1.3.4.3 nathanw ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
372 1.3.4.3 nathanw if (ops == 0)
373 1.3.4.3 nathanw return;
374 1.3.4.3 nathanw
375 1.3.4.3 nathanw /*
376 1.3.4.3 nathanw * XXX Skip cache frobbing if mapping was COHERENT.
377 1.3.4.3 nathanw */
378 1.3.4.3 nathanw
379 1.3.4.3 nathanw /*
380 1.3.4.3 nathanw * If the mapping is not the kernel's and also not the
381 1.3.4.3 nathanw * current process's (XXX actually, vmspace), then we
382 1.3.4.3 nathanw * don't have anything to do, since the cache is Wb-Inv'd
383 1.3.4.3 nathanw * on context switch.
384 1.3.4.3 nathanw *
385 1.3.4.3 nathanw * XXX REVISIT WHEN WE DO FCSE!
386 1.3.4.3 nathanw */
387 1.3.4.5 thorpej if (__predict_false(map->_dm_proc != NULL &&
388 1.3.4.5 thorpej curproc != NULL && map->_dm_proc != curproc->l_proc))
389 1.3.4.3 nathanw return;
390 1.3.4.3 nathanw
391 1.3.4.3 nathanw for (i = 0; i < map->dm_nsegs && len != 0; i++) {
392 1.3.4.3 nathanw /* Find beginning segment. */
393 1.3.4.3 nathanw if (offset >= map->dm_segs[i].ds_len) {
394 1.3.4.3 nathanw offset -= map->dm_segs[i].ds_len;
395 1.3.4.3 nathanw continue;
396 1.3.4.2 nathanw }
397 1.3.4.2 nathanw
398 1.3.4.3 nathanw /*
399 1.3.4.3 nathanw * Now at the first segment to sync; nail
400 1.3.4.3 nathanw * each segment until we have exhausted the
401 1.3.4.3 nathanw * length.
402 1.3.4.3 nathanw */
403 1.3.4.3 nathanw minlen = len < map->dm_segs[i].ds_len - offset ?
404 1.3.4.3 nathanw len : map->dm_segs[i].ds_len - offset;
405 1.3.4.2 nathanw
406 1.3.4.3 nathanw addr = map->dm_segs[i]._ds_vaddr;
407 1.3.4.3 nathanw
408 1.3.4.3 nathanw #ifdef DEBUG_DMA
409 1.3.4.3 nathanw printf("bus_dmamap_sync: flushing segment %d "
410 1.3.4.3 nathanw "(0x%lx..0x%lx) ...", i, addr + offset,
411 1.3.4.3 nathanw addr + offset + minlen - 1);
412 1.3.4.3 nathanw #endif
413 1.3.4.3 nathanw
414 1.3.4.3 nathanw switch (ops) {
415 1.3.4.3 nathanw case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
416 1.3.4.3 nathanw cpu_dcache_wbinv_range(addr + offset, minlen);
417 1.3.4.3 nathanw break;
418 1.3.4.3 nathanw
419 1.3.4.3 nathanw case BUS_DMASYNC_PREREAD:
420 1.3.4.3 nathanw #if 1
421 1.3.4.3 nathanw cpu_dcache_wbinv_range(addr + offset, minlen);
422 1.3.4.3 nathanw #else
423 1.3.4.3 nathanw cpu_dcache_inv_range(addr + offset, minlen);
424 1.3.4.3 nathanw #endif
425 1.3.4.3 nathanw break;
426 1.3.4.3 nathanw
427 1.3.4.3 nathanw case BUS_DMASYNC_PREWRITE:
428 1.3.4.3 nathanw cpu_dcache_wb_range(addr + offset, minlen);
429 1.3.4.3 nathanw break;
430 1.3.4.3 nathanw }
431 1.3.4.3 nathanw #ifdef DEBUG_DMA
432 1.3.4.3 nathanw printf("\n");
433 1.3.4.3 nathanw #endif
434 1.3.4.3 nathanw offset = 0;
435 1.3.4.3 nathanw len -= minlen;
436 1.3.4.2 nathanw }
437 1.3.4.3 nathanw
438 1.3.4.3 nathanw /* Drain the write buffer. */
439 1.3.4.3 nathanw cpu_drain_writebuf();
440 1.3.4.2 nathanw }
441 1.3.4.2 nathanw
442 1.3.4.2 nathanw /*
443 1.3.4.2 nathanw * Common function for DMA-safe memory allocation. May be called
444 1.3.4.2 nathanw * by bus-specific DMA memory allocation functions.
445 1.3.4.2 nathanw */
446 1.3.4.2 nathanw
447 1.3.4.6 nathanw extern paddr_t physical_start;
448 1.3.4.6 nathanw extern paddr_t physical_freestart;
449 1.3.4.6 nathanw extern paddr_t physical_freeend;
450 1.3.4.6 nathanw extern paddr_t physical_end;
451 1.3.4.2 nathanw
452 1.3.4.2 nathanw int
453 1.3.4.3 nathanw _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
454 1.3.4.3 nathanw bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
455 1.3.4.3 nathanw int flags)
456 1.3.4.2 nathanw {
457 1.3.4.2 nathanw int error;
458 1.3.4.2 nathanw #ifdef DEBUG_DMA
459 1.3.4.2 nathanw printf("dmamem_alloc t=%p size=%lx align=%lx boundary=%lx segs=%p nsegs=%x rsegs=%p flags=%x\n",
460 1.3.4.2 nathanw t, size, alignment, boundary, segs, nsegs, rsegs, flags);
461 1.3.4.2 nathanw #endif /* DEBUG_DMA */
462 1.3.4.2 nathanw error = (_bus_dmamem_alloc_range(t, size, alignment, boundary,
463 1.3.4.2 nathanw segs, nsegs, rsegs, flags, trunc_page(physical_start), trunc_page(physical_end)));
464 1.3.4.2 nathanw #ifdef DEBUG_DMA
465 1.3.4.2 nathanw printf("dmamem_alloc: =%d\n", error);
466 1.3.4.2 nathanw #endif /* DEBUG_DMA */
467 1.3.4.2 nathanw return(error);
468 1.3.4.2 nathanw }
469 1.3.4.2 nathanw
470 1.3.4.2 nathanw /*
471 1.3.4.2 nathanw * Common function for freeing DMA-safe memory. May be called by
472 1.3.4.2 nathanw * bus-specific DMA memory free functions.
473 1.3.4.2 nathanw */
474 1.3.4.2 nathanw void
475 1.3.4.3 nathanw _bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
476 1.3.4.2 nathanw {
477 1.3.4.2 nathanw struct vm_page *m;
478 1.3.4.2 nathanw bus_addr_t addr;
479 1.3.4.2 nathanw struct pglist mlist;
480 1.3.4.2 nathanw int curseg;
481 1.3.4.2 nathanw
482 1.3.4.2 nathanw #ifdef DEBUG_DMA
483 1.3.4.2 nathanw printf("dmamem_free: t=%p segs=%p nsegs=%x\n", t, segs, nsegs);
484 1.3.4.2 nathanw #endif /* DEBUG_DMA */
485 1.3.4.2 nathanw
486 1.3.4.2 nathanw /*
487 1.3.4.2 nathanw * Build a list of pages to free back to the VM system.
488 1.3.4.2 nathanw */
489 1.3.4.2 nathanw TAILQ_INIT(&mlist);
490 1.3.4.2 nathanw for (curseg = 0; curseg < nsegs; curseg++) {
491 1.3.4.2 nathanw for (addr = segs[curseg].ds_addr;
492 1.3.4.2 nathanw addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
493 1.3.4.2 nathanw addr += PAGE_SIZE) {
494 1.3.4.2 nathanw m = PHYS_TO_VM_PAGE(addr);
495 1.3.4.2 nathanw TAILQ_INSERT_TAIL(&mlist, m, pageq);
496 1.3.4.2 nathanw }
497 1.3.4.2 nathanw }
498 1.3.4.2 nathanw uvm_pglistfree(&mlist);
499 1.3.4.2 nathanw }
500 1.3.4.2 nathanw
501 1.3.4.2 nathanw /*
502 1.3.4.2 nathanw * Common function for mapping DMA-safe memory. May be called by
503 1.3.4.2 nathanw * bus-specific DMA memory map functions.
504 1.3.4.2 nathanw */
505 1.3.4.2 nathanw int
506 1.3.4.3 nathanw _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
507 1.3.4.3 nathanw size_t size, caddr_t *kvap, int flags)
508 1.3.4.2 nathanw {
509 1.3.4.6 nathanw vaddr_t va;
510 1.3.4.2 nathanw bus_addr_t addr;
511 1.3.4.2 nathanw int curseg;
512 1.3.4.2 nathanw pt_entry_t *ptep/*, pte*/;
513 1.3.4.2 nathanw
514 1.3.4.2 nathanw #ifdef DEBUG_DMA
515 1.3.4.2 nathanw printf("dmamem_map: t=%p segs=%p nsegs=%x size=%lx flags=%x\n", t,
516 1.3.4.2 nathanw segs, nsegs, (unsigned long)size, flags);
517 1.3.4.2 nathanw #endif /* DEBUG_DMA */
518 1.3.4.2 nathanw
519 1.3.4.2 nathanw size = round_page(size);
520 1.3.4.2 nathanw va = uvm_km_valloc(kernel_map, size);
521 1.3.4.2 nathanw
522 1.3.4.2 nathanw if (va == 0)
523 1.3.4.2 nathanw return (ENOMEM);
524 1.3.4.2 nathanw
525 1.3.4.2 nathanw *kvap = (caddr_t)va;
526 1.3.4.2 nathanw
527 1.3.4.2 nathanw for (curseg = 0; curseg < nsegs; curseg++) {
528 1.3.4.2 nathanw for (addr = segs[curseg].ds_addr;
529 1.3.4.2 nathanw addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
530 1.3.4.2 nathanw addr += NBPG, va += NBPG, size -= NBPG) {
531 1.3.4.2 nathanw #ifdef DEBUG_DMA
532 1.3.4.2 nathanw printf("wiring p%lx to v%lx", addr, va);
533 1.3.4.2 nathanw #endif /* DEBUG_DMA */
534 1.3.4.2 nathanw if (size == 0)
535 1.3.4.2 nathanw panic("_bus_dmamem_map: size botch");
536 1.3.4.2 nathanw pmap_enter(pmap_kernel(), va, addr,
537 1.3.4.2 nathanw VM_PROT_READ | VM_PROT_WRITE,
538 1.3.4.2 nathanw VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
539 1.3.4.2 nathanw /*
540 1.3.4.2 nathanw * If the memory must remain coherent with the
541 1.3.4.2 nathanw * cache then we must make the memory uncacheable
542 1.3.4.2 nathanw * in order to maintain virtual cache coherency.
543 1.3.4.2 nathanw * We must also guarentee the cache does not already
544 1.3.4.2 nathanw * contain the virtal addresses we are making
545 1.3.4.2 nathanw * uncacheable.
546 1.3.4.2 nathanw */
547 1.3.4.2 nathanw if (flags & BUS_DMA_COHERENT) {
548 1.3.4.3 nathanw cpu_dcache_wbinv_range(va, NBPG);
549 1.3.4.2 nathanw cpu_drain_writebuf();
550 1.3.4.2 nathanw ptep = vtopte(va);
551 1.3.4.6 nathanw *ptep &= ~(L2_B | L2_C);
552 1.3.4.2 nathanw tlb_flush();
553 1.3.4.2 nathanw }
554 1.3.4.2 nathanw #ifdef DEBUG_DMA
555 1.3.4.2 nathanw ptep = vtopte(va);
556 1.3.4.2 nathanw printf(" pte=v%p *pte=%x\n", ptep, *ptep);
557 1.3.4.2 nathanw #endif /* DEBUG_DMA */
558 1.3.4.2 nathanw }
559 1.3.4.2 nathanw }
560 1.3.4.2 nathanw pmap_update(pmap_kernel());
561 1.3.4.2 nathanw #ifdef DEBUG_DMA
562 1.3.4.2 nathanw printf("dmamem_map: =%p\n", *kvap);
563 1.3.4.2 nathanw #endif /* DEBUG_DMA */
564 1.3.4.2 nathanw return (0);
565 1.3.4.2 nathanw }
566 1.3.4.2 nathanw
567 1.3.4.2 nathanw /*
568 1.3.4.2 nathanw * Common function for unmapping DMA-safe memory. May be called by
569 1.3.4.2 nathanw * bus-specific DMA memory unmapping functions.
570 1.3.4.2 nathanw */
571 1.3.4.2 nathanw void
572 1.3.4.3 nathanw _bus_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
573 1.3.4.2 nathanw {
574 1.3.4.2 nathanw
575 1.3.4.2 nathanw #ifdef DEBUG_DMA
576 1.3.4.2 nathanw printf("dmamem_unmap: t=%p kva=%p size=%lx\n", t, kva,
577 1.3.4.2 nathanw (unsigned long)size);
578 1.3.4.2 nathanw #endif /* DEBUG_DMA */
579 1.3.4.2 nathanw #ifdef DIAGNOSTIC
580 1.3.4.2 nathanw if ((u_long)kva & PGOFSET)
581 1.3.4.2 nathanw panic("_bus_dmamem_unmap");
582 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
583 1.3.4.2 nathanw
584 1.3.4.2 nathanw size = round_page(size);
585 1.3.4.6 nathanw uvm_km_free(kernel_map, (vaddr_t)kva, size);
586 1.3.4.2 nathanw }
587 1.3.4.2 nathanw
588 1.3.4.2 nathanw /*
589 1.3.4.2 nathanw * Common functin for mmap(2)'ing DMA-safe memory. May be called by
590 1.3.4.2 nathanw * bus-specific DMA mmap(2)'ing functions.
591 1.3.4.2 nathanw */
592 1.3.4.2 nathanw paddr_t
593 1.3.4.3 nathanw _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
594 1.3.4.3 nathanw off_t off, int prot, int flags)
595 1.3.4.2 nathanw {
596 1.3.4.2 nathanw int i;
597 1.3.4.2 nathanw
598 1.3.4.2 nathanw for (i = 0; i < nsegs; i++) {
599 1.3.4.2 nathanw #ifdef DIAGNOSTIC
600 1.3.4.2 nathanw if (off & PGOFSET)
601 1.3.4.2 nathanw panic("_bus_dmamem_mmap: offset unaligned");
602 1.3.4.2 nathanw if (segs[i].ds_addr & PGOFSET)
603 1.3.4.2 nathanw panic("_bus_dmamem_mmap: segment unaligned");
604 1.3.4.2 nathanw if (segs[i].ds_len & PGOFSET)
605 1.3.4.2 nathanw panic("_bus_dmamem_mmap: segment size not multiple"
606 1.3.4.2 nathanw " of page size");
607 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
608 1.3.4.2 nathanw if (off >= segs[i].ds_len) {
609 1.3.4.2 nathanw off -= segs[i].ds_len;
610 1.3.4.2 nathanw continue;
611 1.3.4.2 nathanw }
612 1.3.4.2 nathanw
613 1.3.4.4 nathanw return (arm_btop((u_long)segs[i].ds_addr + off));
614 1.3.4.2 nathanw }
615 1.3.4.2 nathanw
616 1.3.4.2 nathanw /* Page not found. */
617 1.3.4.2 nathanw return (-1);
618 1.3.4.2 nathanw }
619 1.3.4.2 nathanw
620 1.3.4.2 nathanw /**********************************************************************
621 1.3.4.2 nathanw * DMA utility functions
622 1.3.4.2 nathanw **********************************************************************/
623 1.3.4.2 nathanw
624 1.3.4.2 nathanw /*
625 1.3.4.2 nathanw * Utility function to load a linear buffer. lastaddrp holds state
626 1.3.4.2 nathanw * between invocations (for multiple-buffer loads). segp contains
627 1.3.4.2 nathanw * the starting segment on entrace, and the ending segment on exit.
628 1.3.4.2 nathanw * first indicates if this is the first invocation of this function.
629 1.3.4.2 nathanw */
630 1.3.4.2 nathanw int
631 1.3.4.3 nathanw _bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
632 1.3.4.6 nathanw bus_size_t buflen, struct proc *p, int flags, paddr_t *lastaddrp,
633 1.3.4.3 nathanw int *segp, int first)
634 1.3.4.2 nathanw {
635 1.3.4.2 nathanw bus_size_t sgsize;
636 1.3.4.2 nathanw bus_addr_t curaddr, lastaddr, baddr, bmask;
637 1.3.4.6 nathanw vaddr_t vaddr = (vaddr_t)buf;
638 1.3.4.2 nathanw int seg;
639 1.3.4.2 nathanw pmap_t pmap;
640 1.3.4.2 nathanw
641 1.3.4.2 nathanw #ifdef DEBUG_DMA
642 1.3.4.2 nathanw printf("_bus_dmamem_load_buffer(buf=%p, len=%lx, flags=%d, 1st=%d)\n",
643 1.3.4.2 nathanw buf, buflen, flags, first);
644 1.3.4.2 nathanw #endif /* DEBUG_DMA */
645 1.3.4.2 nathanw
646 1.3.4.2 nathanw if (p != NULL)
647 1.3.4.2 nathanw pmap = p->p_vmspace->vm_map.pmap;
648 1.3.4.2 nathanw else
649 1.3.4.2 nathanw pmap = pmap_kernel();
650 1.3.4.2 nathanw
651 1.3.4.2 nathanw lastaddr = *lastaddrp;
652 1.3.4.2 nathanw bmask = ~(map->_dm_boundary - 1);
653 1.3.4.2 nathanw
654 1.3.4.2 nathanw for (seg = *segp; buflen > 0; ) {
655 1.3.4.2 nathanw /*
656 1.3.4.2 nathanw * Get the physical address for this segment.
657 1.3.4.2 nathanw */
658 1.3.4.2 nathanw (void) pmap_extract(pmap, (vaddr_t)vaddr, &curaddr);
659 1.3.4.2 nathanw
660 1.3.4.2 nathanw /*
661 1.3.4.2 nathanw * Make sure we're in an allowed DMA range.
662 1.3.4.2 nathanw */
663 1.3.4.2 nathanw if (t->_ranges != NULL &&
664 1.3.4.2 nathanw _bus_dma_inrange(t->_ranges, t->_nranges, curaddr) == 0)
665 1.3.4.2 nathanw return (EINVAL);
666 1.3.4.2 nathanw
667 1.3.4.2 nathanw /*
668 1.3.4.2 nathanw * Compute the segment size, and adjust counts.
669 1.3.4.2 nathanw */
670 1.3.4.2 nathanw sgsize = NBPG - ((u_long)vaddr & PGOFSET);
671 1.3.4.2 nathanw if (buflen < sgsize)
672 1.3.4.2 nathanw sgsize = buflen;
673 1.3.4.2 nathanw
674 1.3.4.2 nathanw /*
675 1.3.4.2 nathanw * Make sure we don't cross any boundaries.
676 1.3.4.2 nathanw */
677 1.3.4.2 nathanw if (map->_dm_boundary > 0) {
678 1.3.4.2 nathanw baddr = (curaddr + map->_dm_boundary) & bmask;
679 1.3.4.2 nathanw if (sgsize > (baddr - curaddr))
680 1.3.4.2 nathanw sgsize = (baddr - curaddr);
681 1.3.4.2 nathanw }
682 1.3.4.2 nathanw
683 1.3.4.2 nathanw /*
684 1.3.4.2 nathanw * Insert chunk into a segment, coalescing with
685 1.3.4.2 nathanw * previous segment if possible.
686 1.3.4.2 nathanw */
687 1.3.4.2 nathanw if (first) {
688 1.3.4.2 nathanw map->dm_segs[seg].ds_addr = curaddr;
689 1.3.4.2 nathanw map->dm_segs[seg].ds_len = sgsize;
690 1.3.4.2 nathanw map->dm_segs[seg]._ds_vaddr = vaddr;
691 1.3.4.2 nathanw first = 0;
692 1.3.4.2 nathanw } else {
693 1.3.4.2 nathanw if (curaddr == lastaddr &&
694 1.3.4.2 nathanw (map->dm_segs[seg].ds_len + sgsize) <=
695 1.3.4.2 nathanw map->_dm_maxsegsz &&
696 1.3.4.2 nathanw (map->_dm_boundary == 0 ||
697 1.3.4.2 nathanw (map->dm_segs[seg].ds_addr & bmask) ==
698 1.3.4.2 nathanw (curaddr & bmask)))
699 1.3.4.2 nathanw map->dm_segs[seg].ds_len += sgsize;
700 1.3.4.2 nathanw else {
701 1.3.4.2 nathanw if (++seg >= map->_dm_segcnt)
702 1.3.4.2 nathanw break;
703 1.3.4.2 nathanw map->dm_segs[seg].ds_addr = curaddr;
704 1.3.4.2 nathanw map->dm_segs[seg].ds_len = sgsize;
705 1.3.4.2 nathanw map->dm_segs[seg]._ds_vaddr = vaddr;
706 1.3.4.2 nathanw }
707 1.3.4.2 nathanw }
708 1.3.4.2 nathanw
709 1.3.4.2 nathanw lastaddr = curaddr + sgsize;
710 1.3.4.2 nathanw vaddr += sgsize;
711 1.3.4.2 nathanw buflen -= sgsize;
712 1.3.4.2 nathanw }
713 1.3.4.2 nathanw
714 1.3.4.2 nathanw *segp = seg;
715 1.3.4.2 nathanw *lastaddrp = lastaddr;
716 1.3.4.2 nathanw
717 1.3.4.2 nathanw /*
718 1.3.4.2 nathanw * Did we fit?
719 1.3.4.2 nathanw */
720 1.3.4.2 nathanw if (buflen != 0)
721 1.3.4.2 nathanw return (EFBIG); /* XXX better return value here? */
722 1.3.4.2 nathanw return (0);
723 1.3.4.2 nathanw }
724 1.3.4.2 nathanw
725 1.3.4.2 nathanw /*
726 1.3.4.2 nathanw * Check to see if the specified page is in an allowed DMA range.
727 1.3.4.2 nathanw */
728 1.3.4.2 nathanw int
729 1.3.4.3 nathanw _bus_dma_inrange(bus_dma_segment_t *ranges, int nranges, bus_addr_t curaddr)
730 1.3.4.2 nathanw {
731 1.3.4.2 nathanw bus_dma_segment_t *ds;
732 1.3.4.2 nathanw int i;
733 1.3.4.2 nathanw
734 1.3.4.2 nathanw for (i = 0, ds = ranges; i < nranges; i++, ds++) {
735 1.3.4.2 nathanw if (curaddr >= ds->ds_addr &&
736 1.3.4.2 nathanw round_page(curaddr) <= (ds->ds_addr + ds->ds_len))
737 1.3.4.2 nathanw return (1);
738 1.3.4.2 nathanw }
739 1.3.4.2 nathanw
740 1.3.4.2 nathanw return (0);
741 1.3.4.2 nathanw }
742 1.3.4.2 nathanw
743 1.3.4.2 nathanw /*
744 1.3.4.2 nathanw * Allocate physical memory from the given physical address range.
745 1.3.4.2 nathanw * Called by DMA-safe memory allocation methods.
746 1.3.4.2 nathanw */
747 1.3.4.2 nathanw int
748 1.3.4.3 nathanw _bus_dmamem_alloc_range(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
749 1.3.4.3 nathanw bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
750 1.3.4.6 nathanw int flags, paddr_t low, paddr_t high)
751 1.3.4.2 nathanw {
752 1.3.4.6 nathanw paddr_t curaddr, lastaddr;
753 1.3.4.2 nathanw struct vm_page *m;
754 1.3.4.2 nathanw struct pglist mlist;
755 1.3.4.2 nathanw int curseg, error;
756 1.3.4.2 nathanw
757 1.3.4.2 nathanw #ifdef DEBUG_DMA
758 1.3.4.2 nathanw printf("alloc_range: t=%p size=%lx align=%lx boundary=%lx segs=%p nsegs=%x rsegs=%p flags=%x lo=%lx hi=%lx\n",
759 1.3.4.2 nathanw t, size, alignment, boundary, segs, nsegs, rsegs, flags, low, high);
760 1.3.4.2 nathanw #endif /* DEBUG_DMA */
761 1.3.4.2 nathanw
762 1.3.4.2 nathanw /* Always round the size. */
763 1.3.4.2 nathanw size = round_page(size);
764 1.3.4.2 nathanw
765 1.3.4.2 nathanw /*
766 1.3.4.2 nathanw * Allocate pages from the VM system.
767 1.3.4.2 nathanw */
768 1.3.4.2 nathanw TAILQ_INIT(&mlist);
769 1.3.4.2 nathanw error = uvm_pglistalloc(size, low, high, alignment, boundary,
770 1.3.4.2 nathanw &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
771 1.3.4.2 nathanw if (error)
772 1.3.4.2 nathanw return (error);
773 1.3.4.2 nathanw
774 1.3.4.2 nathanw /*
775 1.3.4.2 nathanw * Compute the location, size, and number of segments actually
776 1.3.4.2 nathanw * returned by the VM code.
777 1.3.4.2 nathanw */
778 1.3.4.2 nathanw m = mlist.tqh_first;
779 1.3.4.2 nathanw curseg = 0;
780 1.3.4.2 nathanw lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
781 1.3.4.2 nathanw segs[curseg].ds_len = PAGE_SIZE;
782 1.3.4.2 nathanw #ifdef DEBUG_DMA
783 1.3.4.2 nathanw printf("alloc: page %lx\n", lastaddr);
784 1.3.4.2 nathanw #endif /* DEBUG_DMA */
785 1.3.4.2 nathanw m = m->pageq.tqe_next;
786 1.3.4.2 nathanw
787 1.3.4.2 nathanw for (; m != NULL; m = m->pageq.tqe_next) {
788 1.3.4.2 nathanw curaddr = VM_PAGE_TO_PHYS(m);
789 1.3.4.2 nathanw #ifdef DIAGNOSTIC
790 1.3.4.2 nathanw if (curaddr < low || curaddr >= high) {
791 1.3.4.2 nathanw printf("uvm_pglistalloc returned non-sensical"
792 1.3.4.2 nathanw " address 0x%lx\n", curaddr);
793 1.3.4.2 nathanw panic("_bus_dmamem_alloc_range");
794 1.3.4.2 nathanw }
795 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
796 1.3.4.2 nathanw #ifdef DEBUG_DMA
797 1.3.4.2 nathanw printf("alloc: page %lx\n", curaddr);
798 1.3.4.2 nathanw #endif /* DEBUG_DMA */
799 1.3.4.2 nathanw if (curaddr == (lastaddr + PAGE_SIZE))
800 1.3.4.2 nathanw segs[curseg].ds_len += PAGE_SIZE;
801 1.3.4.2 nathanw else {
802 1.3.4.2 nathanw curseg++;
803 1.3.4.2 nathanw segs[curseg].ds_addr = curaddr;
804 1.3.4.2 nathanw segs[curseg].ds_len = PAGE_SIZE;
805 1.3.4.2 nathanw }
806 1.3.4.2 nathanw lastaddr = curaddr;
807 1.3.4.2 nathanw }
808 1.3.4.2 nathanw
809 1.3.4.2 nathanw *rsegs = curseg + 1;
810 1.3.4.2 nathanw
811 1.3.4.2 nathanw return (0);
812 1.3.4.2 nathanw }
813