bus_dma.c revision 1.3.4.9 1 1.3.4.9 nathanw /* $NetBSD: bus_dma.c,v 1.3.4.9 2002/08/01 02:41:12 nathanw Exp $ */
2 1.3.4.2 nathanw
3 1.3.4.2 nathanw /*-
4 1.3.4.2 nathanw * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 1.3.4.2 nathanw * All rights reserved.
6 1.3.4.2 nathanw *
7 1.3.4.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.3.4.2 nathanw * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.3.4.2 nathanw * NASA Ames Research Center.
10 1.3.4.2 nathanw *
11 1.3.4.2 nathanw * Redistribution and use in source and binary forms, with or without
12 1.3.4.2 nathanw * modification, are permitted provided that the following conditions
13 1.3.4.2 nathanw * are met:
14 1.3.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
15 1.3.4.2 nathanw * notice, this list of conditions and the following disclaimer.
16 1.3.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
17 1.3.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
18 1.3.4.2 nathanw * documentation and/or other materials provided with the distribution.
19 1.3.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
20 1.3.4.2 nathanw * must display the following acknowledgement:
21 1.3.4.2 nathanw * This product includes software developed by the NetBSD
22 1.3.4.2 nathanw * Foundation, Inc. and its contributors.
23 1.3.4.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.3.4.2 nathanw * contributors may be used to endorse or promote products derived
25 1.3.4.2 nathanw * from this software without specific prior written permission.
26 1.3.4.2 nathanw *
27 1.3.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.3.4.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.3.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.3.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.3.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.3.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.3.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.3.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.3.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.3.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.3.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
38 1.3.4.2 nathanw */
39 1.3.4.2 nathanw
40 1.3.4.2 nathanw #include <sys/param.h>
41 1.3.4.2 nathanw #include <sys/systm.h>
42 1.3.4.2 nathanw #include <sys/kernel.h>
43 1.3.4.2 nathanw #include <sys/map.h>
44 1.3.4.2 nathanw #include <sys/proc.h>
45 1.3.4.2 nathanw #include <sys/buf.h>
46 1.3.4.2 nathanw #include <sys/reboot.h>
47 1.3.4.2 nathanw #include <sys/conf.h>
48 1.3.4.2 nathanw #include <sys/file.h>
49 1.3.4.2 nathanw #include <sys/malloc.h>
50 1.3.4.2 nathanw #include <sys/mbuf.h>
51 1.3.4.2 nathanw #include <sys/vnode.h>
52 1.3.4.2 nathanw #include <sys/device.h>
53 1.3.4.2 nathanw
54 1.3.4.2 nathanw #include <uvm/uvm_extern.h>
55 1.3.4.2 nathanw
56 1.3.4.2 nathanw #define _ARM32_BUS_DMA_PRIVATE
57 1.3.4.2 nathanw #include <machine/bus.h>
58 1.3.4.2 nathanw
59 1.3.4.2 nathanw #include <machine/cpu.h>
60 1.3.4.2 nathanw
61 1.3.4.2 nathanw #include <arm/cpufunc.h>
62 1.3.4.2 nathanw
63 1.3.4.3 nathanw int _bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
64 1.3.4.6 nathanw bus_size_t, struct proc *, int, paddr_t *, int *, int);
65 1.3.4.9 nathanw struct arm32_dma_range *_bus_dma_inrange(struct arm32_dma_range *,
66 1.3.4.9 nathanw int, bus_addr_t);
67 1.3.4.2 nathanw
68 1.3.4.2 nathanw /*
69 1.3.4.2 nathanw * Common function for DMA map creation. May be called by bus-specific
70 1.3.4.2 nathanw * DMA map creation functions.
71 1.3.4.2 nathanw */
72 1.3.4.2 nathanw int
73 1.3.4.3 nathanw _bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
74 1.3.4.3 nathanw bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
75 1.3.4.2 nathanw {
76 1.3.4.2 nathanw struct arm32_bus_dmamap *map;
77 1.3.4.2 nathanw void *mapstore;
78 1.3.4.2 nathanw size_t mapsize;
79 1.3.4.2 nathanw
80 1.3.4.2 nathanw #ifdef DEBUG_DMA
81 1.3.4.2 nathanw printf("dmamap_create: t=%p size=%lx nseg=%x msegsz=%lx boundary=%lx flags=%x\n",
82 1.3.4.2 nathanw t, size, nsegments, maxsegsz, boundary, flags);
83 1.3.4.2 nathanw #endif /* DEBUG_DMA */
84 1.3.4.2 nathanw
85 1.3.4.2 nathanw /*
86 1.3.4.2 nathanw * Allocate and initialize the DMA map. The end of the map
87 1.3.4.2 nathanw * is a variable-sized array of segments, so we allocate enough
88 1.3.4.2 nathanw * room for them in one shot.
89 1.3.4.2 nathanw *
90 1.3.4.2 nathanw * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
91 1.3.4.2 nathanw * of ALLOCNOW notifies others that we've reserved these resources,
92 1.3.4.2 nathanw * and they are not to be freed.
93 1.3.4.2 nathanw *
94 1.3.4.2 nathanw * The bus_dmamap_t includes one bus_dma_segment_t, hence
95 1.3.4.2 nathanw * the (nsegments - 1).
96 1.3.4.2 nathanw */
97 1.3.4.2 nathanw mapsize = sizeof(struct arm32_bus_dmamap) +
98 1.3.4.2 nathanw (sizeof(bus_dma_segment_t) * (nsegments - 1));
99 1.3.4.2 nathanw if ((mapstore = malloc(mapsize, M_DMAMAP,
100 1.3.4.2 nathanw (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
101 1.3.4.2 nathanw return (ENOMEM);
102 1.3.4.2 nathanw
103 1.3.4.2 nathanw memset(mapstore, 0, mapsize);
104 1.3.4.2 nathanw map = (struct arm32_bus_dmamap *)mapstore;
105 1.3.4.2 nathanw map->_dm_size = size;
106 1.3.4.2 nathanw map->_dm_segcnt = nsegments;
107 1.3.4.2 nathanw map->_dm_maxsegsz = maxsegsz;
108 1.3.4.2 nathanw map->_dm_boundary = boundary;
109 1.3.4.2 nathanw map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
110 1.3.4.9 nathanw map->_dm_origbuf = NULL;
111 1.3.4.9 nathanw map->_dm_buftype = ARM32_BUFTYPE_INVALID;
112 1.3.4.3 nathanw map->_dm_proc = NULL;
113 1.3.4.2 nathanw map->dm_mapsize = 0; /* no valid mappings */
114 1.3.4.2 nathanw map->dm_nsegs = 0;
115 1.3.4.2 nathanw
116 1.3.4.2 nathanw *dmamp = map;
117 1.3.4.2 nathanw #ifdef DEBUG_DMA
118 1.3.4.2 nathanw printf("dmamap_create:map=%p\n", map);
119 1.3.4.2 nathanw #endif /* DEBUG_DMA */
120 1.3.4.2 nathanw return (0);
121 1.3.4.2 nathanw }
122 1.3.4.2 nathanw
123 1.3.4.2 nathanw /*
124 1.3.4.2 nathanw * Common function for DMA map destruction. May be called by bus-specific
125 1.3.4.2 nathanw * DMA map destruction functions.
126 1.3.4.2 nathanw */
127 1.3.4.2 nathanw void
128 1.3.4.3 nathanw _bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
129 1.3.4.2 nathanw {
130 1.3.4.2 nathanw
131 1.3.4.2 nathanw #ifdef DEBUG_DMA
132 1.3.4.2 nathanw printf("dmamap_destroy: t=%p map=%p\n", t, map);
133 1.3.4.2 nathanw #endif /* DEBUG_DMA */
134 1.3.4.9 nathanw
135 1.3.4.9 nathanw /*
136 1.3.4.9 nathanw * Explicit unload.
137 1.3.4.9 nathanw */
138 1.3.4.9 nathanw map->dm_mapsize = 0;
139 1.3.4.9 nathanw map->dm_nsegs = 0;
140 1.3.4.9 nathanw map->_dm_origbuf = NULL;
141 1.3.4.9 nathanw map->_dm_buftype = ARM32_BUFTYPE_INVALID;
142 1.3.4.9 nathanw map->_dm_proc = NULL;
143 1.3.4.9 nathanw
144 1.3.4.2 nathanw free(map, M_DEVBUF);
145 1.3.4.2 nathanw }
146 1.3.4.2 nathanw
147 1.3.4.2 nathanw /*
148 1.3.4.2 nathanw * Common function for loading a DMA map with a linear buffer. May
149 1.3.4.2 nathanw * be called by bus-specific DMA map load functions.
150 1.3.4.2 nathanw */
151 1.3.4.2 nathanw int
152 1.3.4.3 nathanw _bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
153 1.3.4.3 nathanw bus_size_t buflen, struct proc *p, int flags)
154 1.3.4.2 nathanw {
155 1.3.4.6 nathanw paddr_t lastaddr;
156 1.3.4.2 nathanw int seg, error;
157 1.3.4.2 nathanw
158 1.3.4.2 nathanw #ifdef DEBUG_DMA
159 1.3.4.2 nathanw printf("dmamap_load: t=%p map=%p buf=%p len=%lx p=%p f=%d\n",
160 1.3.4.2 nathanw t, map, buf, buflen, p, flags);
161 1.3.4.2 nathanw #endif /* DEBUG_DMA */
162 1.3.4.2 nathanw
163 1.3.4.2 nathanw /*
164 1.3.4.2 nathanw * Make sure that on error condition we return "no valid mappings".
165 1.3.4.2 nathanw */
166 1.3.4.2 nathanw map->dm_mapsize = 0;
167 1.3.4.2 nathanw map->dm_nsegs = 0;
168 1.3.4.2 nathanw
169 1.3.4.2 nathanw if (buflen > map->_dm_size)
170 1.3.4.2 nathanw return (EINVAL);
171 1.3.4.2 nathanw
172 1.3.4.2 nathanw seg = 0;
173 1.3.4.2 nathanw error = _bus_dmamap_load_buffer(t, map, buf, buflen, p, flags,
174 1.3.4.2 nathanw &lastaddr, &seg, 1);
175 1.3.4.2 nathanw if (error == 0) {
176 1.3.4.2 nathanw map->dm_mapsize = buflen;
177 1.3.4.2 nathanw map->dm_nsegs = seg + 1;
178 1.3.4.9 nathanw map->_dm_origbuf = buf;
179 1.3.4.9 nathanw map->_dm_buftype = ARM32_BUFTYPE_LINEAR;
180 1.3.4.3 nathanw map->_dm_proc = p;
181 1.3.4.2 nathanw }
182 1.3.4.2 nathanw #ifdef DEBUG_DMA
183 1.3.4.2 nathanw printf("dmamap_load: error=%d\n", error);
184 1.3.4.2 nathanw #endif /* DEBUG_DMA */
185 1.3.4.2 nathanw return (error);
186 1.3.4.2 nathanw }
187 1.3.4.2 nathanw
188 1.3.4.2 nathanw /*
189 1.3.4.2 nathanw * Like _bus_dmamap_load(), but for mbufs.
190 1.3.4.2 nathanw */
191 1.3.4.2 nathanw int
192 1.3.4.3 nathanw _bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
193 1.3.4.3 nathanw int flags)
194 1.3.4.2 nathanw {
195 1.3.4.6 nathanw paddr_t lastaddr;
196 1.3.4.2 nathanw int seg, error, first;
197 1.3.4.2 nathanw struct mbuf *m;
198 1.3.4.2 nathanw
199 1.3.4.2 nathanw #ifdef DEBUG_DMA
200 1.3.4.2 nathanw printf("dmamap_load_mbuf: t=%p map=%p m0=%p f=%d\n",
201 1.3.4.2 nathanw t, map, m0, flags);
202 1.3.4.2 nathanw #endif /* DEBUG_DMA */
203 1.3.4.2 nathanw
204 1.3.4.2 nathanw /*
205 1.3.4.2 nathanw * Make sure that on error condition we return "no valid mappings."
206 1.3.4.2 nathanw */
207 1.3.4.2 nathanw map->dm_mapsize = 0;
208 1.3.4.2 nathanw map->dm_nsegs = 0;
209 1.3.4.2 nathanw
210 1.3.4.2 nathanw #ifdef DIAGNOSTIC
211 1.3.4.2 nathanw if ((m0->m_flags & M_PKTHDR) == 0)
212 1.3.4.2 nathanw panic("_bus_dmamap_load_mbuf: no packet header");
213 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
214 1.3.4.2 nathanw
215 1.3.4.2 nathanw if (m0->m_pkthdr.len > map->_dm_size)
216 1.3.4.2 nathanw return (EINVAL);
217 1.3.4.2 nathanw
218 1.3.4.2 nathanw first = 1;
219 1.3.4.2 nathanw seg = 0;
220 1.3.4.2 nathanw error = 0;
221 1.3.4.2 nathanw for (m = m0; m != NULL && error == 0; m = m->m_next) {
222 1.3.4.2 nathanw error = _bus_dmamap_load_buffer(t, map, m->m_data, m->m_len,
223 1.3.4.2 nathanw NULL, flags, &lastaddr, &seg, first);
224 1.3.4.2 nathanw first = 0;
225 1.3.4.2 nathanw }
226 1.3.4.2 nathanw if (error == 0) {
227 1.3.4.2 nathanw map->dm_mapsize = m0->m_pkthdr.len;
228 1.3.4.2 nathanw map->dm_nsegs = seg + 1;
229 1.3.4.9 nathanw map->_dm_origbuf = m0;
230 1.3.4.9 nathanw map->_dm_buftype = ARM32_BUFTYPE_MBUF;
231 1.3.4.3 nathanw map->_dm_proc = NULL; /* always kernel */
232 1.3.4.2 nathanw }
233 1.3.4.2 nathanw #ifdef DEBUG_DMA
234 1.3.4.2 nathanw printf("dmamap_load_mbuf: error=%d\n", error);
235 1.3.4.2 nathanw #endif /* DEBUG_DMA */
236 1.3.4.2 nathanw return (error);
237 1.3.4.2 nathanw }
238 1.3.4.2 nathanw
239 1.3.4.2 nathanw /*
240 1.3.4.2 nathanw * Like _bus_dmamap_load(), but for uios.
241 1.3.4.2 nathanw */
242 1.3.4.2 nathanw int
243 1.3.4.3 nathanw _bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
244 1.3.4.3 nathanw int flags)
245 1.3.4.2 nathanw {
246 1.3.4.6 nathanw paddr_t lastaddr;
247 1.3.4.2 nathanw int seg, i, error, first;
248 1.3.4.2 nathanw bus_size_t minlen, resid;
249 1.3.4.2 nathanw struct proc *p = NULL;
250 1.3.4.2 nathanw struct iovec *iov;
251 1.3.4.2 nathanw caddr_t addr;
252 1.3.4.2 nathanw
253 1.3.4.2 nathanw /*
254 1.3.4.2 nathanw * Make sure that on error condition we return "no valid mappings."
255 1.3.4.2 nathanw */
256 1.3.4.2 nathanw map->dm_mapsize = 0;
257 1.3.4.2 nathanw map->dm_nsegs = 0;
258 1.3.4.2 nathanw
259 1.3.4.2 nathanw resid = uio->uio_resid;
260 1.3.4.2 nathanw iov = uio->uio_iov;
261 1.3.4.2 nathanw
262 1.3.4.2 nathanw if (uio->uio_segflg == UIO_USERSPACE) {
263 1.3.4.2 nathanw p = uio->uio_procp;
264 1.3.4.2 nathanw #ifdef DIAGNOSTIC
265 1.3.4.2 nathanw if (p == NULL)
266 1.3.4.2 nathanw panic("_bus_dmamap_load_uio: USERSPACE but no proc");
267 1.3.4.2 nathanw #endif
268 1.3.4.2 nathanw }
269 1.3.4.2 nathanw
270 1.3.4.2 nathanw first = 1;
271 1.3.4.2 nathanw seg = 0;
272 1.3.4.2 nathanw error = 0;
273 1.3.4.2 nathanw for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
274 1.3.4.2 nathanw /*
275 1.3.4.2 nathanw * Now at the first iovec to load. Load each iovec
276 1.3.4.2 nathanw * until we have exhausted the residual count.
277 1.3.4.2 nathanw */
278 1.3.4.2 nathanw minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
279 1.3.4.2 nathanw addr = (caddr_t)iov[i].iov_base;
280 1.3.4.2 nathanw
281 1.3.4.2 nathanw error = _bus_dmamap_load_buffer(t, map, addr, minlen,
282 1.3.4.2 nathanw p, flags, &lastaddr, &seg, first);
283 1.3.4.2 nathanw first = 0;
284 1.3.4.2 nathanw
285 1.3.4.2 nathanw resid -= minlen;
286 1.3.4.2 nathanw }
287 1.3.4.2 nathanw if (error == 0) {
288 1.3.4.2 nathanw map->dm_mapsize = uio->uio_resid;
289 1.3.4.2 nathanw map->dm_nsegs = seg + 1;
290 1.3.4.9 nathanw map->_dm_origbuf = uio;
291 1.3.4.9 nathanw map->_dm_buftype = ARM32_BUFTYPE_UIO;
292 1.3.4.3 nathanw map->_dm_proc = p;
293 1.3.4.2 nathanw }
294 1.3.4.2 nathanw return (error);
295 1.3.4.2 nathanw }
296 1.3.4.2 nathanw
297 1.3.4.2 nathanw /*
298 1.3.4.2 nathanw * Like _bus_dmamap_load(), but for raw memory allocated with
299 1.3.4.2 nathanw * bus_dmamem_alloc().
300 1.3.4.2 nathanw */
301 1.3.4.2 nathanw int
302 1.3.4.3 nathanw _bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
303 1.3.4.3 nathanw bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
304 1.3.4.2 nathanw {
305 1.3.4.2 nathanw
306 1.3.4.2 nathanw panic("_bus_dmamap_load_raw: not implemented");
307 1.3.4.2 nathanw }
308 1.3.4.2 nathanw
309 1.3.4.2 nathanw /*
310 1.3.4.2 nathanw * Common function for unloading a DMA map. May be called by
311 1.3.4.2 nathanw * bus-specific DMA map unload functions.
312 1.3.4.2 nathanw */
313 1.3.4.2 nathanw void
314 1.3.4.3 nathanw _bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
315 1.3.4.2 nathanw {
316 1.3.4.2 nathanw
317 1.3.4.2 nathanw #ifdef DEBUG_DMA
318 1.3.4.2 nathanw printf("dmamap_unload: t=%p map=%p\n", t, map);
319 1.3.4.2 nathanw #endif /* DEBUG_DMA */
320 1.3.4.2 nathanw
321 1.3.4.2 nathanw /*
322 1.3.4.2 nathanw * No resources to free; just mark the mappings as
323 1.3.4.2 nathanw * invalid.
324 1.3.4.2 nathanw */
325 1.3.4.2 nathanw map->dm_mapsize = 0;
326 1.3.4.2 nathanw map->dm_nsegs = 0;
327 1.3.4.9 nathanw map->_dm_origbuf = NULL;
328 1.3.4.9 nathanw map->_dm_buftype = ARM32_BUFTYPE_INVALID;
329 1.3.4.3 nathanw map->_dm_proc = NULL;
330 1.3.4.2 nathanw }
331 1.3.4.2 nathanw
332 1.3.4.9 nathanw static void
333 1.3.4.9 nathanw _bus_dmamap_sync_linear(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
334 1.3.4.9 nathanw bus_size_t len, int ops)
335 1.3.4.9 nathanw {
336 1.3.4.9 nathanw vaddr_t addr = (vaddr_t) map->_dm_origbuf;
337 1.3.4.9 nathanw
338 1.3.4.9 nathanw addr += offset;
339 1.3.4.9 nathanw len -= offset;
340 1.3.4.9 nathanw
341 1.3.4.9 nathanw switch (ops) {
342 1.3.4.9 nathanw case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
343 1.3.4.9 nathanw cpu_dcache_wbinv_range(addr, len);
344 1.3.4.9 nathanw break;
345 1.3.4.9 nathanw
346 1.3.4.9 nathanw case BUS_DMASYNC_PREREAD:
347 1.3.4.9 nathanw #if 1
348 1.3.4.9 nathanw cpu_dcache_wbinv_range(addr, len);
349 1.3.4.9 nathanw #else
350 1.3.4.9 nathanw cpu_dcache_inv_range(addr, len);
351 1.3.4.9 nathanw #endif
352 1.3.4.9 nathanw break;
353 1.3.4.9 nathanw
354 1.3.4.9 nathanw case BUS_DMASYNC_PREWRITE:
355 1.3.4.9 nathanw cpu_dcache_wb_range(addr, len);
356 1.3.4.9 nathanw break;
357 1.3.4.9 nathanw }
358 1.3.4.9 nathanw }
359 1.3.4.9 nathanw
360 1.3.4.9 nathanw static void
361 1.3.4.9 nathanw _bus_dmamap_sync_mbuf(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
362 1.3.4.9 nathanw bus_size_t len, int ops)
363 1.3.4.9 nathanw {
364 1.3.4.9 nathanw struct mbuf *m, *m0 = map->_dm_origbuf;
365 1.3.4.9 nathanw bus_size_t minlen, moff;
366 1.3.4.9 nathanw vaddr_t maddr;
367 1.3.4.9 nathanw
368 1.3.4.9 nathanw for (moff = offset, m = m0; m != NULL && len != 0;
369 1.3.4.9 nathanw m = m->m_next) {
370 1.3.4.9 nathanw /* Find the beginning mbuf. */
371 1.3.4.9 nathanw if (moff >= m->m_len) {
372 1.3.4.9 nathanw moff -= m->m_len;
373 1.3.4.9 nathanw continue;
374 1.3.4.9 nathanw }
375 1.3.4.9 nathanw
376 1.3.4.9 nathanw /*
377 1.3.4.9 nathanw * Now at the first mbuf to sync; nail each one until
378 1.3.4.9 nathanw * we have exhausted the length.
379 1.3.4.9 nathanw */
380 1.3.4.9 nathanw minlen = m->m_len - moff;
381 1.3.4.9 nathanw if (len < minlen)
382 1.3.4.9 nathanw minlen = len;
383 1.3.4.9 nathanw
384 1.3.4.9 nathanw maddr = mtod(m, vaddr_t);
385 1.3.4.9 nathanw maddr += moff;
386 1.3.4.9 nathanw
387 1.3.4.9 nathanw switch (ops) {
388 1.3.4.9 nathanw case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
389 1.3.4.9 nathanw cpu_dcache_wbinv_range(maddr, minlen);
390 1.3.4.9 nathanw break;
391 1.3.4.9 nathanw
392 1.3.4.9 nathanw case BUS_DMASYNC_PREREAD:
393 1.3.4.9 nathanw #if 1
394 1.3.4.9 nathanw cpu_dcache_wbinv_range(maddr, minlen);
395 1.3.4.9 nathanw #else
396 1.3.4.9 nathanw cpu_dcache_inv_range(maddr, minlen);
397 1.3.4.9 nathanw #endif
398 1.3.4.9 nathanw break;
399 1.3.4.9 nathanw
400 1.3.4.9 nathanw case BUS_DMASYNC_PREWRITE:
401 1.3.4.9 nathanw cpu_dcache_wb_range(maddr, minlen);
402 1.3.4.9 nathanw break;
403 1.3.4.9 nathanw }
404 1.3.4.9 nathanw moff = 0;
405 1.3.4.9 nathanw len -= minlen;
406 1.3.4.9 nathanw }
407 1.3.4.9 nathanw }
408 1.3.4.9 nathanw
409 1.3.4.9 nathanw static void
410 1.3.4.9 nathanw _bus_dmamap_sync_uio(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
411 1.3.4.9 nathanw bus_size_t len, int ops)
412 1.3.4.9 nathanw {
413 1.3.4.9 nathanw struct uio *uio = map->_dm_origbuf;
414 1.3.4.9 nathanw struct iovec *iov;
415 1.3.4.9 nathanw bus_size_t minlen, ioff;
416 1.3.4.9 nathanw vaddr_t addr;
417 1.3.4.9 nathanw
418 1.3.4.9 nathanw for (iov = uio->uio_iov, ioff = offset; len != 0; iov++) {
419 1.3.4.9 nathanw /* Find the beginning iovec. */
420 1.3.4.9 nathanw if (ioff >= iov->iov_len) {
421 1.3.4.9 nathanw ioff -= iov->iov_len;
422 1.3.4.9 nathanw continue;
423 1.3.4.9 nathanw }
424 1.3.4.9 nathanw
425 1.3.4.9 nathanw /*
426 1.3.4.9 nathanw * Now at the first iovec to sync; nail each one until
427 1.3.4.9 nathanw * we have exhausted the length.
428 1.3.4.9 nathanw */
429 1.3.4.9 nathanw minlen = iov->iov_len - ioff;
430 1.3.4.9 nathanw if (len < minlen)
431 1.3.4.9 nathanw minlen = len;
432 1.3.4.9 nathanw
433 1.3.4.9 nathanw addr = (vaddr_t) iov->iov_base;
434 1.3.4.9 nathanw addr += ioff;
435 1.3.4.9 nathanw
436 1.3.4.9 nathanw switch (ops) {
437 1.3.4.9 nathanw case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
438 1.3.4.9 nathanw cpu_dcache_wbinv_range(addr, minlen);
439 1.3.4.9 nathanw break;
440 1.3.4.9 nathanw
441 1.3.4.9 nathanw case BUS_DMASYNC_PREREAD:
442 1.3.4.9 nathanw #if 1
443 1.3.4.9 nathanw cpu_dcache_wbinv_range(addr, minlen);
444 1.3.4.9 nathanw #else
445 1.3.4.9 nathanw cpu_dcache_inv_range(addr, minlen);
446 1.3.4.9 nathanw #endif
447 1.3.4.9 nathanw break;
448 1.3.4.9 nathanw
449 1.3.4.9 nathanw case BUS_DMASYNC_PREWRITE:
450 1.3.4.9 nathanw cpu_dcache_wb_range(addr, minlen);
451 1.3.4.9 nathanw break;
452 1.3.4.9 nathanw }
453 1.3.4.9 nathanw ioff = 0;
454 1.3.4.9 nathanw len -= minlen;
455 1.3.4.9 nathanw }
456 1.3.4.9 nathanw }
457 1.3.4.9 nathanw
458 1.3.4.2 nathanw /*
459 1.3.4.2 nathanw * Common function for DMA map synchronization. May be called
460 1.3.4.2 nathanw * by bus-specific DMA map synchronization functions.
461 1.3.4.3 nathanw *
462 1.3.4.3 nathanw * This version works for the Virtually Indexed Virtually Tagged
463 1.3.4.3 nathanw * cache found on 32-bit ARM processors.
464 1.3.4.3 nathanw *
465 1.3.4.3 nathanw * XXX Should have separate versions for write-through vs.
466 1.3.4.3 nathanw * XXX write-back caches. We currently assume write-back
467 1.3.4.3 nathanw * XXX here, which is not as efficient as it could be for
468 1.3.4.3 nathanw * XXX the write-through case.
469 1.3.4.2 nathanw */
470 1.3.4.2 nathanw void
471 1.3.4.3 nathanw _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
472 1.3.4.3 nathanw bus_size_t len, int ops)
473 1.3.4.3 nathanw {
474 1.3.4.2 nathanw
475 1.3.4.2 nathanw #ifdef DEBUG_DMA
476 1.3.4.2 nathanw printf("dmamap_sync: t=%p map=%p offset=%lx len=%lx ops=%x\n",
477 1.3.4.2 nathanw t, map, offset, len, ops);
478 1.3.4.2 nathanw #endif /* DEBUG_DMA */
479 1.3.4.2 nathanw
480 1.3.4.3 nathanw /*
481 1.3.4.3 nathanw * Mixing of PRE and POST operations is not allowed.
482 1.3.4.3 nathanw */
483 1.3.4.3 nathanw if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
484 1.3.4.3 nathanw (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
485 1.3.4.3 nathanw panic("_bus_dmamap_sync: mix PRE and POST");
486 1.3.4.3 nathanw
487 1.3.4.3 nathanw #ifdef DIAGNOSTIC
488 1.3.4.3 nathanw if (offset >= map->dm_mapsize)
489 1.3.4.3 nathanw panic("_bus_dmamap_sync: bad offset %lu (map size is %lu)",
490 1.3.4.3 nathanw offset, map->dm_mapsize);
491 1.3.4.3 nathanw if (len == 0 || (offset + len) > map->dm_mapsize)
492 1.3.4.3 nathanw panic("_bus_dmamap_sync: bad length");
493 1.3.4.3 nathanw #endif
494 1.3.4.3 nathanw
495 1.3.4.3 nathanw /*
496 1.3.4.3 nathanw * For a virtually-indexed write-back cache, we need
497 1.3.4.3 nathanw * to do the following things:
498 1.3.4.3 nathanw *
499 1.3.4.3 nathanw * PREREAD -- Invalidate the D-cache. We do this
500 1.3.4.3 nathanw * here in case a write-back is required by the back-end.
501 1.3.4.3 nathanw *
502 1.3.4.3 nathanw * PREWRITE -- Write-back the D-cache. Note that if
503 1.3.4.3 nathanw * we are doing a PREREAD|PREWRITE, we can collapse
504 1.3.4.3 nathanw * the whole thing into a single Wb-Inv.
505 1.3.4.3 nathanw *
506 1.3.4.3 nathanw * POSTREAD -- Nothing.
507 1.3.4.3 nathanw *
508 1.3.4.3 nathanw * POSTWRITE -- Nothing.
509 1.3.4.3 nathanw */
510 1.3.4.3 nathanw
511 1.3.4.3 nathanw ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
512 1.3.4.3 nathanw if (ops == 0)
513 1.3.4.3 nathanw return;
514 1.3.4.3 nathanw
515 1.3.4.3 nathanw /*
516 1.3.4.3 nathanw * XXX Skip cache frobbing if mapping was COHERENT.
517 1.3.4.3 nathanw */
518 1.3.4.3 nathanw
519 1.3.4.3 nathanw /*
520 1.3.4.3 nathanw * If the mapping is not the kernel's and also not the
521 1.3.4.3 nathanw * current process's (XXX actually, vmspace), then we
522 1.3.4.3 nathanw * don't have anything to do, since the cache is Wb-Inv'd
523 1.3.4.3 nathanw * on context switch.
524 1.3.4.3 nathanw *
525 1.3.4.3 nathanw * XXX REVISIT WHEN WE DO FCSE!
526 1.3.4.3 nathanw */
527 1.3.4.5 thorpej if (__predict_false(map->_dm_proc != NULL &&
528 1.3.4.8 nathanw curlwp != NULL && map->_dm_proc != curproc))
529 1.3.4.3 nathanw return;
530 1.3.4.3 nathanw
531 1.3.4.9 nathanw switch (map->_dm_buftype) {
532 1.3.4.9 nathanw case ARM32_BUFTYPE_LINEAR:
533 1.3.4.9 nathanw _bus_dmamap_sync_linear(t, map, offset, len, ops);
534 1.3.4.9 nathanw break;
535 1.3.4.9 nathanw
536 1.3.4.9 nathanw case ARM32_BUFTYPE_MBUF:
537 1.3.4.9 nathanw _bus_dmamap_sync_mbuf(t, map, offset, len, ops);
538 1.3.4.9 nathanw break;
539 1.3.4.9 nathanw
540 1.3.4.9 nathanw case ARM32_BUFTYPE_UIO:
541 1.3.4.9 nathanw _bus_dmamap_sync_uio(t, map, offset, len, ops);
542 1.3.4.9 nathanw break;
543 1.3.4.9 nathanw
544 1.3.4.9 nathanw case ARM32_BUFTYPE_RAW:
545 1.3.4.9 nathanw panic("_bus_dmamap_sync: ARM32_BUFTYPE_RAW");
546 1.3.4.9 nathanw break;
547 1.3.4.9 nathanw
548 1.3.4.9 nathanw case ARM32_BUFTYPE_INVALID:
549 1.3.4.9 nathanw panic("_bus_dmamap_sync: ARM32_BUFTYPE_INVALID");
550 1.3.4.9 nathanw break;
551 1.3.4.9 nathanw
552 1.3.4.9 nathanw default:
553 1.3.4.9 nathanw printf("unknown buffer type %d\n", map->_dm_buftype);
554 1.3.4.9 nathanw panic("_bus_dmamap_sync");
555 1.3.4.2 nathanw }
556 1.3.4.3 nathanw
557 1.3.4.3 nathanw /* Drain the write buffer. */
558 1.3.4.3 nathanw cpu_drain_writebuf();
559 1.3.4.2 nathanw }
560 1.3.4.2 nathanw
561 1.3.4.2 nathanw /*
562 1.3.4.2 nathanw * Common function for DMA-safe memory allocation. May be called
563 1.3.4.2 nathanw * by bus-specific DMA memory allocation functions.
564 1.3.4.2 nathanw */
565 1.3.4.2 nathanw
566 1.3.4.6 nathanw extern paddr_t physical_start;
567 1.3.4.6 nathanw extern paddr_t physical_freestart;
568 1.3.4.6 nathanw extern paddr_t physical_freeend;
569 1.3.4.6 nathanw extern paddr_t physical_end;
570 1.3.4.2 nathanw
571 1.3.4.2 nathanw int
572 1.3.4.3 nathanw _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
573 1.3.4.3 nathanw bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
574 1.3.4.3 nathanw int flags)
575 1.3.4.2 nathanw {
576 1.3.4.9 nathanw struct arm32_dma_range *dr;
577 1.3.4.9 nathanw int error, i;
578 1.3.4.9 nathanw
579 1.3.4.2 nathanw #ifdef DEBUG_DMA
580 1.3.4.9 nathanw printf("dmamem_alloc t=%p size=%lx align=%lx boundary=%lx "
581 1.3.4.9 nathanw "segs=%p nsegs=%x rsegs=%p flags=%x\n", t, size, alignment,
582 1.3.4.9 nathanw boundary, segs, nsegs, rsegs, flags);
583 1.3.4.9 nathanw #endif
584 1.3.4.9 nathanw
585 1.3.4.9 nathanw if ((dr = t->_ranges) != NULL) {
586 1.3.4.9 nathanw for (i = 0; i < t->_nranges; i++, dr++) {
587 1.3.4.9 nathanw if (dr->dr_len == 0) {
588 1.3.4.9 nathanw error = ENOMEM;
589 1.3.4.9 nathanw continue;
590 1.3.4.9 nathanw }
591 1.3.4.9 nathanw error = _bus_dmamem_alloc_range(t, size, alignment,
592 1.3.4.9 nathanw boundary, segs, nsegs, rsegs, flags,
593 1.3.4.9 nathanw trunc_page(dr->dr_sysbase),
594 1.3.4.9 nathanw trunc_page(dr->dr_sysbase + dr->dr_len));
595 1.3.4.9 nathanw if (error == 0)
596 1.3.4.9 nathanw break;
597 1.3.4.9 nathanw }
598 1.3.4.9 nathanw } else {
599 1.3.4.9 nathanw error = _bus_dmamem_alloc_range(t, size, alignment, boundary,
600 1.3.4.9 nathanw segs, nsegs, rsegs, flags, trunc_page(physical_start),
601 1.3.4.9 nathanw trunc_page(physical_end));
602 1.3.4.9 nathanw }
603 1.3.4.9 nathanw
604 1.3.4.2 nathanw #ifdef DEBUG_DMA
605 1.3.4.2 nathanw printf("dmamem_alloc: =%d\n", error);
606 1.3.4.9 nathanw #endif
607 1.3.4.9 nathanw
608 1.3.4.2 nathanw return(error);
609 1.3.4.2 nathanw }
610 1.3.4.2 nathanw
611 1.3.4.2 nathanw /*
612 1.3.4.2 nathanw * Common function for freeing DMA-safe memory. May be called by
613 1.3.4.2 nathanw * bus-specific DMA memory free functions.
614 1.3.4.2 nathanw */
615 1.3.4.2 nathanw void
616 1.3.4.3 nathanw _bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
617 1.3.4.2 nathanw {
618 1.3.4.2 nathanw struct vm_page *m;
619 1.3.4.2 nathanw bus_addr_t addr;
620 1.3.4.2 nathanw struct pglist mlist;
621 1.3.4.2 nathanw int curseg;
622 1.3.4.2 nathanw
623 1.3.4.2 nathanw #ifdef DEBUG_DMA
624 1.3.4.2 nathanw printf("dmamem_free: t=%p segs=%p nsegs=%x\n", t, segs, nsegs);
625 1.3.4.2 nathanw #endif /* DEBUG_DMA */
626 1.3.4.2 nathanw
627 1.3.4.2 nathanw /*
628 1.3.4.2 nathanw * Build a list of pages to free back to the VM system.
629 1.3.4.2 nathanw */
630 1.3.4.2 nathanw TAILQ_INIT(&mlist);
631 1.3.4.2 nathanw for (curseg = 0; curseg < nsegs; curseg++) {
632 1.3.4.2 nathanw for (addr = segs[curseg].ds_addr;
633 1.3.4.2 nathanw addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
634 1.3.4.2 nathanw addr += PAGE_SIZE) {
635 1.3.4.2 nathanw m = PHYS_TO_VM_PAGE(addr);
636 1.3.4.2 nathanw TAILQ_INSERT_TAIL(&mlist, m, pageq);
637 1.3.4.2 nathanw }
638 1.3.4.2 nathanw }
639 1.3.4.2 nathanw uvm_pglistfree(&mlist);
640 1.3.4.2 nathanw }
641 1.3.4.2 nathanw
642 1.3.4.2 nathanw /*
643 1.3.4.2 nathanw * Common function for mapping DMA-safe memory. May be called by
644 1.3.4.2 nathanw * bus-specific DMA memory map functions.
645 1.3.4.2 nathanw */
646 1.3.4.2 nathanw int
647 1.3.4.3 nathanw _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
648 1.3.4.3 nathanw size_t size, caddr_t *kvap, int flags)
649 1.3.4.2 nathanw {
650 1.3.4.6 nathanw vaddr_t va;
651 1.3.4.2 nathanw bus_addr_t addr;
652 1.3.4.2 nathanw int curseg;
653 1.3.4.2 nathanw pt_entry_t *ptep/*, pte*/;
654 1.3.4.2 nathanw
655 1.3.4.2 nathanw #ifdef DEBUG_DMA
656 1.3.4.2 nathanw printf("dmamem_map: t=%p segs=%p nsegs=%x size=%lx flags=%x\n", t,
657 1.3.4.2 nathanw segs, nsegs, (unsigned long)size, flags);
658 1.3.4.2 nathanw #endif /* DEBUG_DMA */
659 1.3.4.2 nathanw
660 1.3.4.2 nathanw size = round_page(size);
661 1.3.4.2 nathanw va = uvm_km_valloc(kernel_map, size);
662 1.3.4.2 nathanw
663 1.3.4.2 nathanw if (va == 0)
664 1.3.4.2 nathanw return (ENOMEM);
665 1.3.4.2 nathanw
666 1.3.4.2 nathanw *kvap = (caddr_t)va;
667 1.3.4.2 nathanw
668 1.3.4.2 nathanw for (curseg = 0; curseg < nsegs; curseg++) {
669 1.3.4.2 nathanw for (addr = segs[curseg].ds_addr;
670 1.3.4.2 nathanw addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
671 1.3.4.2 nathanw addr += NBPG, va += NBPG, size -= NBPG) {
672 1.3.4.2 nathanw #ifdef DEBUG_DMA
673 1.3.4.2 nathanw printf("wiring p%lx to v%lx", addr, va);
674 1.3.4.2 nathanw #endif /* DEBUG_DMA */
675 1.3.4.2 nathanw if (size == 0)
676 1.3.4.2 nathanw panic("_bus_dmamem_map: size botch");
677 1.3.4.2 nathanw pmap_enter(pmap_kernel(), va, addr,
678 1.3.4.2 nathanw VM_PROT_READ | VM_PROT_WRITE,
679 1.3.4.2 nathanw VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
680 1.3.4.2 nathanw /*
681 1.3.4.2 nathanw * If the memory must remain coherent with the
682 1.3.4.2 nathanw * cache then we must make the memory uncacheable
683 1.3.4.2 nathanw * in order to maintain virtual cache coherency.
684 1.3.4.2 nathanw * We must also guarentee the cache does not already
685 1.3.4.2 nathanw * contain the virtal addresses we are making
686 1.3.4.2 nathanw * uncacheable.
687 1.3.4.2 nathanw */
688 1.3.4.2 nathanw if (flags & BUS_DMA_COHERENT) {
689 1.3.4.3 nathanw cpu_dcache_wbinv_range(va, NBPG);
690 1.3.4.2 nathanw cpu_drain_writebuf();
691 1.3.4.2 nathanw ptep = vtopte(va);
692 1.3.4.6 nathanw *ptep &= ~(L2_B | L2_C);
693 1.3.4.2 nathanw tlb_flush();
694 1.3.4.2 nathanw }
695 1.3.4.2 nathanw #ifdef DEBUG_DMA
696 1.3.4.2 nathanw ptep = vtopte(va);
697 1.3.4.2 nathanw printf(" pte=v%p *pte=%x\n", ptep, *ptep);
698 1.3.4.2 nathanw #endif /* DEBUG_DMA */
699 1.3.4.2 nathanw }
700 1.3.4.2 nathanw }
701 1.3.4.2 nathanw pmap_update(pmap_kernel());
702 1.3.4.2 nathanw #ifdef DEBUG_DMA
703 1.3.4.2 nathanw printf("dmamem_map: =%p\n", *kvap);
704 1.3.4.2 nathanw #endif /* DEBUG_DMA */
705 1.3.4.2 nathanw return (0);
706 1.3.4.2 nathanw }
707 1.3.4.2 nathanw
708 1.3.4.2 nathanw /*
709 1.3.4.2 nathanw * Common function for unmapping DMA-safe memory. May be called by
710 1.3.4.2 nathanw * bus-specific DMA memory unmapping functions.
711 1.3.4.2 nathanw */
712 1.3.4.2 nathanw void
713 1.3.4.3 nathanw _bus_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
714 1.3.4.2 nathanw {
715 1.3.4.2 nathanw
716 1.3.4.2 nathanw #ifdef DEBUG_DMA
717 1.3.4.2 nathanw printf("dmamem_unmap: t=%p kva=%p size=%lx\n", t, kva,
718 1.3.4.2 nathanw (unsigned long)size);
719 1.3.4.2 nathanw #endif /* DEBUG_DMA */
720 1.3.4.2 nathanw #ifdef DIAGNOSTIC
721 1.3.4.2 nathanw if ((u_long)kva & PGOFSET)
722 1.3.4.2 nathanw panic("_bus_dmamem_unmap");
723 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
724 1.3.4.2 nathanw
725 1.3.4.2 nathanw size = round_page(size);
726 1.3.4.6 nathanw uvm_km_free(kernel_map, (vaddr_t)kva, size);
727 1.3.4.2 nathanw }
728 1.3.4.2 nathanw
729 1.3.4.2 nathanw /*
730 1.3.4.2 nathanw * Common functin for mmap(2)'ing DMA-safe memory. May be called by
731 1.3.4.2 nathanw * bus-specific DMA mmap(2)'ing functions.
732 1.3.4.2 nathanw */
733 1.3.4.2 nathanw paddr_t
734 1.3.4.3 nathanw _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
735 1.3.4.3 nathanw off_t off, int prot, int flags)
736 1.3.4.2 nathanw {
737 1.3.4.2 nathanw int i;
738 1.3.4.2 nathanw
739 1.3.4.2 nathanw for (i = 0; i < nsegs; i++) {
740 1.3.4.2 nathanw #ifdef DIAGNOSTIC
741 1.3.4.2 nathanw if (off & PGOFSET)
742 1.3.4.2 nathanw panic("_bus_dmamem_mmap: offset unaligned");
743 1.3.4.2 nathanw if (segs[i].ds_addr & PGOFSET)
744 1.3.4.2 nathanw panic("_bus_dmamem_mmap: segment unaligned");
745 1.3.4.2 nathanw if (segs[i].ds_len & PGOFSET)
746 1.3.4.2 nathanw panic("_bus_dmamem_mmap: segment size not multiple"
747 1.3.4.2 nathanw " of page size");
748 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
749 1.3.4.2 nathanw if (off >= segs[i].ds_len) {
750 1.3.4.2 nathanw off -= segs[i].ds_len;
751 1.3.4.2 nathanw continue;
752 1.3.4.2 nathanw }
753 1.3.4.2 nathanw
754 1.3.4.4 nathanw return (arm_btop((u_long)segs[i].ds_addr + off));
755 1.3.4.2 nathanw }
756 1.3.4.2 nathanw
757 1.3.4.2 nathanw /* Page not found. */
758 1.3.4.2 nathanw return (-1);
759 1.3.4.2 nathanw }
760 1.3.4.2 nathanw
761 1.3.4.2 nathanw /**********************************************************************
762 1.3.4.2 nathanw * DMA utility functions
763 1.3.4.2 nathanw **********************************************************************/
764 1.3.4.2 nathanw
765 1.3.4.2 nathanw /*
766 1.3.4.2 nathanw * Utility function to load a linear buffer. lastaddrp holds state
767 1.3.4.2 nathanw * between invocations (for multiple-buffer loads). segp contains
768 1.3.4.2 nathanw * the starting segment on entrace, and the ending segment on exit.
769 1.3.4.2 nathanw * first indicates if this is the first invocation of this function.
770 1.3.4.2 nathanw */
771 1.3.4.2 nathanw int
772 1.3.4.3 nathanw _bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
773 1.3.4.6 nathanw bus_size_t buflen, struct proc *p, int flags, paddr_t *lastaddrp,
774 1.3.4.3 nathanw int *segp, int first)
775 1.3.4.2 nathanw {
776 1.3.4.9 nathanw struct arm32_dma_range *dr;
777 1.3.4.2 nathanw bus_size_t sgsize;
778 1.3.4.2 nathanw bus_addr_t curaddr, lastaddr, baddr, bmask;
779 1.3.4.6 nathanw vaddr_t vaddr = (vaddr_t)buf;
780 1.3.4.2 nathanw int seg;
781 1.3.4.2 nathanw pmap_t pmap;
782 1.3.4.2 nathanw
783 1.3.4.2 nathanw #ifdef DEBUG_DMA
784 1.3.4.2 nathanw printf("_bus_dmamem_load_buffer(buf=%p, len=%lx, flags=%d, 1st=%d)\n",
785 1.3.4.2 nathanw buf, buflen, flags, first);
786 1.3.4.2 nathanw #endif /* DEBUG_DMA */
787 1.3.4.2 nathanw
788 1.3.4.2 nathanw if (p != NULL)
789 1.3.4.2 nathanw pmap = p->p_vmspace->vm_map.pmap;
790 1.3.4.2 nathanw else
791 1.3.4.2 nathanw pmap = pmap_kernel();
792 1.3.4.2 nathanw
793 1.3.4.2 nathanw lastaddr = *lastaddrp;
794 1.3.4.2 nathanw bmask = ~(map->_dm_boundary - 1);
795 1.3.4.2 nathanw
796 1.3.4.2 nathanw for (seg = *segp; buflen > 0; ) {
797 1.3.4.2 nathanw /*
798 1.3.4.2 nathanw * Get the physical address for this segment.
799 1.3.4.2 nathanw */
800 1.3.4.2 nathanw (void) pmap_extract(pmap, (vaddr_t)vaddr, &curaddr);
801 1.3.4.2 nathanw
802 1.3.4.2 nathanw /*
803 1.3.4.2 nathanw * Make sure we're in an allowed DMA range.
804 1.3.4.2 nathanw */
805 1.3.4.9 nathanw if (t->_ranges != NULL) {
806 1.3.4.9 nathanw /* XXX cache last result? */
807 1.3.4.9 nathanw dr = _bus_dma_inrange(t->_ranges, t->_nranges,
808 1.3.4.9 nathanw curaddr);
809 1.3.4.9 nathanw if (dr == NULL)
810 1.3.4.9 nathanw return (EINVAL);
811 1.3.4.9 nathanw
812 1.3.4.9 nathanw /*
813 1.3.4.9 nathanw * In a valid DMA range. Translate the physical
814 1.3.4.9 nathanw * memory address to an address in the DMA window.
815 1.3.4.9 nathanw */
816 1.3.4.9 nathanw curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
817 1.3.4.9 nathanw }
818 1.3.4.2 nathanw
819 1.3.4.2 nathanw /*
820 1.3.4.2 nathanw * Compute the segment size, and adjust counts.
821 1.3.4.2 nathanw */
822 1.3.4.2 nathanw sgsize = NBPG - ((u_long)vaddr & PGOFSET);
823 1.3.4.2 nathanw if (buflen < sgsize)
824 1.3.4.2 nathanw sgsize = buflen;
825 1.3.4.2 nathanw
826 1.3.4.2 nathanw /*
827 1.3.4.2 nathanw * Make sure we don't cross any boundaries.
828 1.3.4.2 nathanw */
829 1.3.4.2 nathanw if (map->_dm_boundary > 0) {
830 1.3.4.2 nathanw baddr = (curaddr + map->_dm_boundary) & bmask;
831 1.3.4.2 nathanw if (sgsize > (baddr - curaddr))
832 1.3.4.2 nathanw sgsize = (baddr - curaddr);
833 1.3.4.2 nathanw }
834 1.3.4.2 nathanw
835 1.3.4.2 nathanw /*
836 1.3.4.2 nathanw * Insert chunk into a segment, coalescing with
837 1.3.4.2 nathanw * previous segment if possible.
838 1.3.4.2 nathanw */
839 1.3.4.2 nathanw if (first) {
840 1.3.4.2 nathanw map->dm_segs[seg].ds_addr = curaddr;
841 1.3.4.2 nathanw map->dm_segs[seg].ds_len = sgsize;
842 1.3.4.2 nathanw first = 0;
843 1.3.4.2 nathanw } else {
844 1.3.4.2 nathanw if (curaddr == lastaddr &&
845 1.3.4.2 nathanw (map->dm_segs[seg].ds_len + sgsize) <=
846 1.3.4.2 nathanw map->_dm_maxsegsz &&
847 1.3.4.2 nathanw (map->_dm_boundary == 0 ||
848 1.3.4.2 nathanw (map->dm_segs[seg].ds_addr & bmask) ==
849 1.3.4.2 nathanw (curaddr & bmask)))
850 1.3.4.2 nathanw map->dm_segs[seg].ds_len += sgsize;
851 1.3.4.2 nathanw else {
852 1.3.4.2 nathanw if (++seg >= map->_dm_segcnt)
853 1.3.4.2 nathanw break;
854 1.3.4.2 nathanw map->dm_segs[seg].ds_addr = curaddr;
855 1.3.4.2 nathanw map->dm_segs[seg].ds_len = sgsize;
856 1.3.4.2 nathanw }
857 1.3.4.2 nathanw }
858 1.3.4.2 nathanw
859 1.3.4.2 nathanw lastaddr = curaddr + sgsize;
860 1.3.4.2 nathanw vaddr += sgsize;
861 1.3.4.2 nathanw buflen -= sgsize;
862 1.3.4.2 nathanw }
863 1.3.4.2 nathanw
864 1.3.4.2 nathanw *segp = seg;
865 1.3.4.2 nathanw *lastaddrp = lastaddr;
866 1.3.4.2 nathanw
867 1.3.4.2 nathanw /*
868 1.3.4.2 nathanw * Did we fit?
869 1.3.4.2 nathanw */
870 1.3.4.2 nathanw if (buflen != 0)
871 1.3.4.2 nathanw return (EFBIG); /* XXX better return value here? */
872 1.3.4.2 nathanw return (0);
873 1.3.4.2 nathanw }
874 1.3.4.2 nathanw
875 1.3.4.2 nathanw /*
876 1.3.4.2 nathanw * Check to see if the specified page is in an allowed DMA range.
877 1.3.4.2 nathanw */
878 1.3.4.9 nathanw struct arm32_dma_range *
879 1.3.4.9 nathanw _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
880 1.3.4.9 nathanw bus_addr_t curaddr)
881 1.3.4.2 nathanw {
882 1.3.4.9 nathanw struct arm32_dma_range *dr;
883 1.3.4.2 nathanw int i;
884 1.3.4.2 nathanw
885 1.3.4.9 nathanw for (i = 0, dr = ranges; i < nranges; i++, dr++) {
886 1.3.4.9 nathanw if (curaddr >= dr->dr_sysbase &&
887 1.3.4.9 nathanw round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
888 1.3.4.9 nathanw return (dr);
889 1.3.4.2 nathanw }
890 1.3.4.2 nathanw
891 1.3.4.9 nathanw return (NULL);
892 1.3.4.2 nathanw }
893 1.3.4.2 nathanw
894 1.3.4.2 nathanw /*
895 1.3.4.2 nathanw * Allocate physical memory from the given physical address range.
896 1.3.4.2 nathanw * Called by DMA-safe memory allocation methods.
897 1.3.4.2 nathanw */
898 1.3.4.2 nathanw int
899 1.3.4.3 nathanw _bus_dmamem_alloc_range(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
900 1.3.4.3 nathanw bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
901 1.3.4.6 nathanw int flags, paddr_t low, paddr_t high)
902 1.3.4.2 nathanw {
903 1.3.4.6 nathanw paddr_t curaddr, lastaddr;
904 1.3.4.2 nathanw struct vm_page *m;
905 1.3.4.2 nathanw struct pglist mlist;
906 1.3.4.2 nathanw int curseg, error;
907 1.3.4.2 nathanw
908 1.3.4.2 nathanw #ifdef DEBUG_DMA
909 1.3.4.2 nathanw printf("alloc_range: t=%p size=%lx align=%lx boundary=%lx segs=%p nsegs=%x rsegs=%p flags=%x lo=%lx hi=%lx\n",
910 1.3.4.2 nathanw t, size, alignment, boundary, segs, nsegs, rsegs, flags, low, high);
911 1.3.4.2 nathanw #endif /* DEBUG_DMA */
912 1.3.4.2 nathanw
913 1.3.4.2 nathanw /* Always round the size. */
914 1.3.4.2 nathanw size = round_page(size);
915 1.3.4.2 nathanw
916 1.3.4.2 nathanw /*
917 1.3.4.2 nathanw * Allocate pages from the VM system.
918 1.3.4.2 nathanw */
919 1.3.4.2 nathanw error = uvm_pglistalloc(size, low, high, alignment, boundary,
920 1.3.4.2 nathanw &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
921 1.3.4.2 nathanw if (error)
922 1.3.4.2 nathanw return (error);
923 1.3.4.2 nathanw
924 1.3.4.2 nathanw /*
925 1.3.4.2 nathanw * Compute the location, size, and number of segments actually
926 1.3.4.2 nathanw * returned by the VM code.
927 1.3.4.2 nathanw */
928 1.3.4.2 nathanw m = mlist.tqh_first;
929 1.3.4.2 nathanw curseg = 0;
930 1.3.4.2 nathanw lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
931 1.3.4.2 nathanw segs[curseg].ds_len = PAGE_SIZE;
932 1.3.4.2 nathanw #ifdef DEBUG_DMA
933 1.3.4.2 nathanw printf("alloc: page %lx\n", lastaddr);
934 1.3.4.2 nathanw #endif /* DEBUG_DMA */
935 1.3.4.2 nathanw m = m->pageq.tqe_next;
936 1.3.4.2 nathanw
937 1.3.4.2 nathanw for (; m != NULL; m = m->pageq.tqe_next) {
938 1.3.4.2 nathanw curaddr = VM_PAGE_TO_PHYS(m);
939 1.3.4.2 nathanw #ifdef DIAGNOSTIC
940 1.3.4.2 nathanw if (curaddr < low || curaddr >= high) {
941 1.3.4.2 nathanw printf("uvm_pglistalloc returned non-sensical"
942 1.3.4.2 nathanw " address 0x%lx\n", curaddr);
943 1.3.4.2 nathanw panic("_bus_dmamem_alloc_range");
944 1.3.4.2 nathanw }
945 1.3.4.2 nathanw #endif /* DIAGNOSTIC */
946 1.3.4.2 nathanw #ifdef DEBUG_DMA
947 1.3.4.2 nathanw printf("alloc: page %lx\n", curaddr);
948 1.3.4.2 nathanw #endif /* DEBUG_DMA */
949 1.3.4.2 nathanw if (curaddr == (lastaddr + PAGE_SIZE))
950 1.3.4.2 nathanw segs[curseg].ds_len += PAGE_SIZE;
951 1.3.4.2 nathanw else {
952 1.3.4.2 nathanw curseg++;
953 1.3.4.2 nathanw segs[curseg].ds_addr = curaddr;
954 1.3.4.2 nathanw segs[curseg].ds_len = PAGE_SIZE;
955 1.3.4.2 nathanw }
956 1.3.4.2 nathanw lastaddr = curaddr;
957 1.3.4.2 nathanw }
958 1.3.4.2 nathanw
959 1.3.4.2 nathanw *rsegs = curseg + 1;
960 1.3.4.2 nathanw
961 1.3.4.2 nathanw return (0);
962 1.3.4.2 nathanw }
963 1.3.4.9 nathanw
964 1.3.4.9 nathanw /*
965 1.3.4.9 nathanw * Check if a memory region intersects with a DMA range, and return the
966 1.3.4.9 nathanw * page-rounded intersection if it does.
967 1.3.4.9 nathanw */
968 1.3.4.9 nathanw int
969 1.3.4.9 nathanw arm32_dma_range_intersect(struct arm32_dma_range *ranges, int nranges,
970 1.3.4.9 nathanw paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep)
971 1.3.4.9 nathanw {
972 1.3.4.9 nathanw struct arm32_dma_range *dr;
973 1.3.4.9 nathanw int i;
974 1.3.4.9 nathanw
975 1.3.4.9 nathanw if (ranges == NULL)
976 1.3.4.9 nathanw return (0);
977 1.3.4.9 nathanw
978 1.3.4.9 nathanw for (i = 0, dr = ranges; i < nranges; i++, dr++) {
979 1.3.4.9 nathanw if (dr->dr_sysbase <= pa &&
980 1.3.4.9 nathanw pa < (dr->dr_sysbase + dr->dr_len)) {
981 1.3.4.9 nathanw /*
982 1.3.4.9 nathanw * Beginning of region intersects with this range.
983 1.3.4.9 nathanw */
984 1.3.4.9 nathanw *pap = trunc_page(pa);
985 1.3.4.9 nathanw *sizep = round_page(min(pa + size,
986 1.3.4.9 nathanw dr->dr_sysbase + dr->dr_len) - pa);
987 1.3.4.9 nathanw return (1);
988 1.3.4.9 nathanw }
989 1.3.4.9 nathanw if (pa < dr->dr_sysbase && dr->dr_sysbase < (pa + size)) {
990 1.3.4.9 nathanw /*
991 1.3.4.9 nathanw * End of region intersects with this range.
992 1.3.4.9 nathanw */
993 1.3.4.9 nathanw *pap = trunc_page(dr->dr_sysbase);
994 1.3.4.9 nathanw *sizep = round_page(min((pa + size) - dr->dr_sysbase,
995 1.3.4.9 nathanw dr->dr_len));
996 1.3.4.9 nathanw return (1);
997 1.3.4.9 nathanw }
998 1.3.4.9 nathanw }
999 1.3.4.9 nathanw
1000 1.3.4.9 nathanw /* No intersection found. */
1001 1.3.4.9 nathanw return (0);
1002 1.3.4.9 nathanw }
1003