bus_dma.c revision 1.3.4.9 1 /* $NetBSD: bus_dma.c,v 1.3.4.9 2002/08/01 02:41:12 nathanw Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/map.h>
44 #include <sys/proc.h>
45 #include <sys/buf.h>
46 #include <sys/reboot.h>
47 #include <sys/conf.h>
48 #include <sys/file.h>
49 #include <sys/malloc.h>
50 #include <sys/mbuf.h>
51 #include <sys/vnode.h>
52 #include <sys/device.h>
53
54 #include <uvm/uvm_extern.h>
55
56 #define _ARM32_BUS_DMA_PRIVATE
57 #include <machine/bus.h>
58
59 #include <machine/cpu.h>
60
61 #include <arm/cpufunc.h>
62
63 int _bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
64 bus_size_t, struct proc *, int, paddr_t *, int *, int);
65 struct arm32_dma_range *_bus_dma_inrange(struct arm32_dma_range *,
66 int, bus_addr_t);
67
68 /*
69 * Common function for DMA map creation. May be called by bus-specific
70 * DMA map creation functions.
71 */
72 int
73 _bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
74 bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
75 {
76 struct arm32_bus_dmamap *map;
77 void *mapstore;
78 size_t mapsize;
79
80 #ifdef DEBUG_DMA
81 printf("dmamap_create: t=%p size=%lx nseg=%x msegsz=%lx boundary=%lx flags=%x\n",
82 t, size, nsegments, maxsegsz, boundary, flags);
83 #endif /* DEBUG_DMA */
84
85 /*
86 * Allocate and initialize the DMA map. The end of the map
87 * is a variable-sized array of segments, so we allocate enough
88 * room for them in one shot.
89 *
90 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
91 * of ALLOCNOW notifies others that we've reserved these resources,
92 * and they are not to be freed.
93 *
94 * The bus_dmamap_t includes one bus_dma_segment_t, hence
95 * the (nsegments - 1).
96 */
97 mapsize = sizeof(struct arm32_bus_dmamap) +
98 (sizeof(bus_dma_segment_t) * (nsegments - 1));
99 if ((mapstore = malloc(mapsize, M_DMAMAP,
100 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
101 return (ENOMEM);
102
103 memset(mapstore, 0, mapsize);
104 map = (struct arm32_bus_dmamap *)mapstore;
105 map->_dm_size = size;
106 map->_dm_segcnt = nsegments;
107 map->_dm_maxsegsz = maxsegsz;
108 map->_dm_boundary = boundary;
109 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
110 map->_dm_origbuf = NULL;
111 map->_dm_buftype = ARM32_BUFTYPE_INVALID;
112 map->_dm_proc = NULL;
113 map->dm_mapsize = 0; /* no valid mappings */
114 map->dm_nsegs = 0;
115
116 *dmamp = map;
117 #ifdef DEBUG_DMA
118 printf("dmamap_create:map=%p\n", map);
119 #endif /* DEBUG_DMA */
120 return (0);
121 }
122
123 /*
124 * Common function for DMA map destruction. May be called by bus-specific
125 * DMA map destruction functions.
126 */
127 void
128 _bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
129 {
130
131 #ifdef DEBUG_DMA
132 printf("dmamap_destroy: t=%p map=%p\n", t, map);
133 #endif /* DEBUG_DMA */
134
135 /*
136 * Explicit unload.
137 */
138 map->dm_mapsize = 0;
139 map->dm_nsegs = 0;
140 map->_dm_origbuf = NULL;
141 map->_dm_buftype = ARM32_BUFTYPE_INVALID;
142 map->_dm_proc = NULL;
143
144 free(map, M_DEVBUF);
145 }
146
147 /*
148 * Common function for loading a DMA map with a linear buffer. May
149 * be called by bus-specific DMA map load functions.
150 */
151 int
152 _bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
153 bus_size_t buflen, struct proc *p, int flags)
154 {
155 paddr_t lastaddr;
156 int seg, error;
157
158 #ifdef DEBUG_DMA
159 printf("dmamap_load: t=%p map=%p buf=%p len=%lx p=%p f=%d\n",
160 t, map, buf, buflen, p, flags);
161 #endif /* DEBUG_DMA */
162
163 /*
164 * Make sure that on error condition we return "no valid mappings".
165 */
166 map->dm_mapsize = 0;
167 map->dm_nsegs = 0;
168
169 if (buflen > map->_dm_size)
170 return (EINVAL);
171
172 seg = 0;
173 error = _bus_dmamap_load_buffer(t, map, buf, buflen, p, flags,
174 &lastaddr, &seg, 1);
175 if (error == 0) {
176 map->dm_mapsize = buflen;
177 map->dm_nsegs = seg + 1;
178 map->_dm_origbuf = buf;
179 map->_dm_buftype = ARM32_BUFTYPE_LINEAR;
180 map->_dm_proc = p;
181 }
182 #ifdef DEBUG_DMA
183 printf("dmamap_load: error=%d\n", error);
184 #endif /* DEBUG_DMA */
185 return (error);
186 }
187
188 /*
189 * Like _bus_dmamap_load(), but for mbufs.
190 */
191 int
192 _bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
193 int flags)
194 {
195 paddr_t lastaddr;
196 int seg, error, first;
197 struct mbuf *m;
198
199 #ifdef DEBUG_DMA
200 printf("dmamap_load_mbuf: t=%p map=%p m0=%p f=%d\n",
201 t, map, m0, flags);
202 #endif /* DEBUG_DMA */
203
204 /*
205 * Make sure that on error condition we return "no valid mappings."
206 */
207 map->dm_mapsize = 0;
208 map->dm_nsegs = 0;
209
210 #ifdef DIAGNOSTIC
211 if ((m0->m_flags & M_PKTHDR) == 0)
212 panic("_bus_dmamap_load_mbuf: no packet header");
213 #endif /* DIAGNOSTIC */
214
215 if (m0->m_pkthdr.len > map->_dm_size)
216 return (EINVAL);
217
218 first = 1;
219 seg = 0;
220 error = 0;
221 for (m = m0; m != NULL && error == 0; m = m->m_next) {
222 error = _bus_dmamap_load_buffer(t, map, m->m_data, m->m_len,
223 NULL, flags, &lastaddr, &seg, first);
224 first = 0;
225 }
226 if (error == 0) {
227 map->dm_mapsize = m0->m_pkthdr.len;
228 map->dm_nsegs = seg + 1;
229 map->_dm_origbuf = m0;
230 map->_dm_buftype = ARM32_BUFTYPE_MBUF;
231 map->_dm_proc = NULL; /* always kernel */
232 }
233 #ifdef DEBUG_DMA
234 printf("dmamap_load_mbuf: error=%d\n", error);
235 #endif /* DEBUG_DMA */
236 return (error);
237 }
238
239 /*
240 * Like _bus_dmamap_load(), but for uios.
241 */
242 int
243 _bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
244 int flags)
245 {
246 paddr_t lastaddr;
247 int seg, i, error, first;
248 bus_size_t minlen, resid;
249 struct proc *p = NULL;
250 struct iovec *iov;
251 caddr_t addr;
252
253 /*
254 * Make sure that on error condition we return "no valid mappings."
255 */
256 map->dm_mapsize = 0;
257 map->dm_nsegs = 0;
258
259 resid = uio->uio_resid;
260 iov = uio->uio_iov;
261
262 if (uio->uio_segflg == UIO_USERSPACE) {
263 p = uio->uio_procp;
264 #ifdef DIAGNOSTIC
265 if (p == NULL)
266 panic("_bus_dmamap_load_uio: USERSPACE but no proc");
267 #endif
268 }
269
270 first = 1;
271 seg = 0;
272 error = 0;
273 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
274 /*
275 * Now at the first iovec to load. Load each iovec
276 * until we have exhausted the residual count.
277 */
278 minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
279 addr = (caddr_t)iov[i].iov_base;
280
281 error = _bus_dmamap_load_buffer(t, map, addr, minlen,
282 p, flags, &lastaddr, &seg, first);
283 first = 0;
284
285 resid -= minlen;
286 }
287 if (error == 0) {
288 map->dm_mapsize = uio->uio_resid;
289 map->dm_nsegs = seg + 1;
290 map->_dm_origbuf = uio;
291 map->_dm_buftype = ARM32_BUFTYPE_UIO;
292 map->_dm_proc = p;
293 }
294 return (error);
295 }
296
297 /*
298 * Like _bus_dmamap_load(), but for raw memory allocated with
299 * bus_dmamem_alloc().
300 */
301 int
302 _bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
303 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
304 {
305
306 panic("_bus_dmamap_load_raw: not implemented");
307 }
308
309 /*
310 * Common function for unloading a DMA map. May be called by
311 * bus-specific DMA map unload functions.
312 */
313 void
314 _bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
315 {
316
317 #ifdef DEBUG_DMA
318 printf("dmamap_unload: t=%p map=%p\n", t, map);
319 #endif /* DEBUG_DMA */
320
321 /*
322 * No resources to free; just mark the mappings as
323 * invalid.
324 */
325 map->dm_mapsize = 0;
326 map->dm_nsegs = 0;
327 map->_dm_origbuf = NULL;
328 map->_dm_buftype = ARM32_BUFTYPE_INVALID;
329 map->_dm_proc = NULL;
330 }
331
332 static void
333 _bus_dmamap_sync_linear(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
334 bus_size_t len, int ops)
335 {
336 vaddr_t addr = (vaddr_t) map->_dm_origbuf;
337
338 addr += offset;
339 len -= offset;
340
341 switch (ops) {
342 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
343 cpu_dcache_wbinv_range(addr, len);
344 break;
345
346 case BUS_DMASYNC_PREREAD:
347 #if 1
348 cpu_dcache_wbinv_range(addr, len);
349 #else
350 cpu_dcache_inv_range(addr, len);
351 #endif
352 break;
353
354 case BUS_DMASYNC_PREWRITE:
355 cpu_dcache_wb_range(addr, len);
356 break;
357 }
358 }
359
360 static void
361 _bus_dmamap_sync_mbuf(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
362 bus_size_t len, int ops)
363 {
364 struct mbuf *m, *m0 = map->_dm_origbuf;
365 bus_size_t minlen, moff;
366 vaddr_t maddr;
367
368 for (moff = offset, m = m0; m != NULL && len != 0;
369 m = m->m_next) {
370 /* Find the beginning mbuf. */
371 if (moff >= m->m_len) {
372 moff -= m->m_len;
373 continue;
374 }
375
376 /*
377 * Now at the first mbuf to sync; nail each one until
378 * we have exhausted the length.
379 */
380 minlen = m->m_len - moff;
381 if (len < minlen)
382 minlen = len;
383
384 maddr = mtod(m, vaddr_t);
385 maddr += moff;
386
387 switch (ops) {
388 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
389 cpu_dcache_wbinv_range(maddr, minlen);
390 break;
391
392 case BUS_DMASYNC_PREREAD:
393 #if 1
394 cpu_dcache_wbinv_range(maddr, minlen);
395 #else
396 cpu_dcache_inv_range(maddr, minlen);
397 #endif
398 break;
399
400 case BUS_DMASYNC_PREWRITE:
401 cpu_dcache_wb_range(maddr, minlen);
402 break;
403 }
404 moff = 0;
405 len -= minlen;
406 }
407 }
408
409 static void
410 _bus_dmamap_sync_uio(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
411 bus_size_t len, int ops)
412 {
413 struct uio *uio = map->_dm_origbuf;
414 struct iovec *iov;
415 bus_size_t minlen, ioff;
416 vaddr_t addr;
417
418 for (iov = uio->uio_iov, ioff = offset; len != 0; iov++) {
419 /* Find the beginning iovec. */
420 if (ioff >= iov->iov_len) {
421 ioff -= iov->iov_len;
422 continue;
423 }
424
425 /*
426 * Now at the first iovec to sync; nail each one until
427 * we have exhausted the length.
428 */
429 minlen = iov->iov_len - ioff;
430 if (len < minlen)
431 minlen = len;
432
433 addr = (vaddr_t) iov->iov_base;
434 addr += ioff;
435
436 switch (ops) {
437 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
438 cpu_dcache_wbinv_range(addr, minlen);
439 break;
440
441 case BUS_DMASYNC_PREREAD:
442 #if 1
443 cpu_dcache_wbinv_range(addr, minlen);
444 #else
445 cpu_dcache_inv_range(addr, minlen);
446 #endif
447 break;
448
449 case BUS_DMASYNC_PREWRITE:
450 cpu_dcache_wb_range(addr, minlen);
451 break;
452 }
453 ioff = 0;
454 len -= minlen;
455 }
456 }
457
458 /*
459 * Common function for DMA map synchronization. May be called
460 * by bus-specific DMA map synchronization functions.
461 *
462 * This version works for the Virtually Indexed Virtually Tagged
463 * cache found on 32-bit ARM processors.
464 *
465 * XXX Should have separate versions for write-through vs.
466 * XXX write-back caches. We currently assume write-back
467 * XXX here, which is not as efficient as it could be for
468 * XXX the write-through case.
469 */
470 void
471 _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
472 bus_size_t len, int ops)
473 {
474
475 #ifdef DEBUG_DMA
476 printf("dmamap_sync: t=%p map=%p offset=%lx len=%lx ops=%x\n",
477 t, map, offset, len, ops);
478 #endif /* DEBUG_DMA */
479
480 /*
481 * Mixing of PRE and POST operations is not allowed.
482 */
483 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
484 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
485 panic("_bus_dmamap_sync: mix PRE and POST");
486
487 #ifdef DIAGNOSTIC
488 if (offset >= map->dm_mapsize)
489 panic("_bus_dmamap_sync: bad offset %lu (map size is %lu)",
490 offset, map->dm_mapsize);
491 if (len == 0 || (offset + len) > map->dm_mapsize)
492 panic("_bus_dmamap_sync: bad length");
493 #endif
494
495 /*
496 * For a virtually-indexed write-back cache, we need
497 * to do the following things:
498 *
499 * PREREAD -- Invalidate the D-cache. We do this
500 * here in case a write-back is required by the back-end.
501 *
502 * PREWRITE -- Write-back the D-cache. Note that if
503 * we are doing a PREREAD|PREWRITE, we can collapse
504 * the whole thing into a single Wb-Inv.
505 *
506 * POSTREAD -- Nothing.
507 *
508 * POSTWRITE -- Nothing.
509 */
510
511 ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
512 if (ops == 0)
513 return;
514
515 /*
516 * XXX Skip cache frobbing if mapping was COHERENT.
517 */
518
519 /*
520 * If the mapping is not the kernel's and also not the
521 * current process's (XXX actually, vmspace), then we
522 * don't have anything to do, since the cache is Wb-Inv'd
523 * on context switch.
524 *
525 * XXX REVISIT WHEN WE DO FCSE!
526 */
527 if (__predict_false(map->_dm_proc != NULL &&
528 curlwp != NULL && map->_dm_proc != curproc))
529 return;
530
531 switch (map->_dm_buftype) {
532 case ARM32_BUFTYPE_LINEAR:
533 _bus_dmamap_sync_linear(t, map, offset, len, ops);
534 break;
535
536 case ARM32_BUFTYPE_MBUF:
537 _bus_dmamap_sync_mbuf(t, map, offset, len, ops);
538 break;
539
540 case ARM32_BUFTYPE_UIO:
541 _bus_dmamap_sync_uio(t, map, offset, len, ops);
542 break;
543
544 case ARM32_BUFTYPE_RAW:
545 panic("_bus_dmamap_sync: ARM32_BUFTYPE_RAW");
546 break;
547
548 case ARM32_BUFTYPE_INVALID:
549 panic("_bus_dmamap_sync: ARM32_BUFTYPE_INVALID");
550 break;
551
552 default:
553 printf("unknown buffer type %d\n", map->_dm_buftype);
554 panic("_bus_dmamap_sync");
555 }
556
557 /* Drain the write buffer. */
558 cpu_drain_writebuf();
559 }
560
561 /*
562 * Common function for DMA-safe memory allocation. May be called
563 * by bus-specific DMA memory allocation functions.
564 */
565
566 extern paddr_t physical_start;
567 extern paddr_t physical_freestart;
568 extern paddr_t physical_freeend;
569 extern paddr_t physical_end;
570
571 int
572 _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
573 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
574 int flags)
575 {
576 struct arm32_dma_range *dr;
577 int error, i;
578
579 #ifdef DEBUG_DMA
580 printf("dmamem_alloc t=%p size=%lx align=%lx boundary=%lx "
581 "segs=%p nsegs=%x rsegs=%p flags=%x\n", t, size, alignment,
582 boundary, segs, nsegs, rsegs, flags);
583 #endif
584
585 if ((dr = t->_ranges) != NULL) {
586 for (i = 0; i < t->_nranges; i++, dr++) {
587 if (dr->dr_len == 0) {
588 error = ENOMEM;
589 continue;
590 }
591 error = _bus_dmamem_alloc_range(t, size, alignment,
592 boundary, segs, nsegs, rsegs, flags,
593 trunc_page(dr->dr_sysbase),
594 trunc_page(dr->dr_sysbase + dr->dr_len));
595 if (error == 0)
596 break;
597 }
598 } else {
599 error = _bus_dmamem_alloc_range(t, size, alignment, boundary,
600 segs, nsegs, rsegs, flags, trunc_page(physical_start),
601 trunc_page(physical_end));
602 }
603
604 #ifdef DEBUG_DMA
605 printf("dmamem_alloc: =%d\n", error);
606 #endif
607
608 return(error);
609 }
610
611 /*
612 * Common function for freeing DMA-safe memory. May be called by
613 * bus-specific DMA memory free functions.
614 */
615 void
616 _bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
617 {
618 struct vm_page *m;
619 bus_addr_t addr;
620 struct pglist mlist;
621 int curseg;
622
623 #ifdef DEBUG_DMA
624 printf("dmamem_free: t=%p segs=%p nsegs=%x\n", t, segs, nsegs);
625 #endif /* DEBUG_DMA */
626
627 /*
628 * Build a list of pages to free back to the VM system.
629 */
630 TAILQ_INIT(&mlist);
631 for (curseg = 0; curseg < nsegs; curseg++) {
632 for (addr = segs[curseg].ds_addr;
633 addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
634 addr += PAGE_SIZE) {
635 m = PHYS_TO_VM_PAGE(addr);
636 TAILQ_INSERT_TAIL(&mlist, m, pageq);
637 }
638 }
639 uvm_pglistfree(&mlist);
640 }
641
642 /*
643 * Common function for mapping DMA-safe memory. May be called by
644 * bus-specific DMA memory map functions.
645 */
646 int
647 _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
648 size_t size, caddr_t *kvap, int flags)
649 {
650 vaddr_t va;
651 bus_addr_t addr;
652 int curseg;
653 pt_entry_t *ptep/*, pte*/;
654
655 #ifdef DEBUG_DMA
656 printf("dmamem_map: t=%p segs=%p nsegs=%x size=%lx flags=%x\n", t,
657 segs, nsegs, (unsigned long)size, flags);
658 #endif /* DEBUG_DMA */
659
660 size = round_page(size);
661 va = uvm_km_valloc(kernel_map, size);
662
663 if (va == 0)
664 return (ENOMEM);
665
666 *kvap = (caddr_t)va;
667
668 for (curseg = 0; curseg < nsegs; curseg++) {
669 for (addr = segs[curseg].ds_addr;
670 addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
671 addr += NBPG, va += NBPG, size -= NBPG) {
672 #ifdef DEBUG_DMA
673 printf("wiring p%lx to v%lx", addr, va);
674 #endif /* DEBUG_DMA */
675 if (size == 0)
676 panic("_bus_dmamem_map: size botch");
677 pmap_enter(pmap_kernel(), va, addr,
678 VM_PROT_READ | VM_PROT_WRITE,
679 VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
680 /*
681 * If the memory must remain coherent with the
682 * cache then we must make the memory uncacheable
683 * in order to maintain virtual cache coherency.
684 * We must also guarentee the cache does not already
685 * contain the virtal addresses we are making
686 * uncacheable.
687 */
688 if (flags & BUS_DMA_COHERENT) {
689 cpu_dcache_wbinv_range(va, NBPG);
690 cpu_drain_writebuf();
691 ptep = vtopte(va);
692 *ptep &= ~(L2_B | L2_C);
693 tlb_flush();
694 }
695 #ifdef DEBUG_DMA
696 ptep = vtopte(va);
697 printf(" pte=v%p *pte=%x\n", ptep, *ptep);
698 #endif /* DEBUG_DMA */
699 }
700 }
701 pmap_update(pmap_kernel());
702 #ifdef DEBUG_DMA
703 printf("dmamem_map: =%p\n", *kvap);
704 #endif /* DEBUG_DMA */
705 return (0);
706 }
707
708 /*
709 * Common function for unmapping DMA-safe memory. May be called by
710 * bus-specific DMA memory unmapping functions.
711 */
712 void
713 _bus_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
714 {
715
716 #ifdef DEBUG_DMA
717 printf("dmamem_unmap: t=%p kva=%p size=%lx\n", t, kva,
718 (unsigned long)size);
719 #endif /* DEBUG_DMA */
720 #ifdef DIAGNOSTIC
721 if ((u_long)kva & PGOFSET)
722 panic("_bus_dmamem_unmap");
723 #endif /* DIAGNOSTIC */
724
725 size = round_page(size);
726 uvm_km_free(kernel_map, (vaddr_t)kva, size);
727 }
728
729 /*
730 * Common functin for mmap(2)'ing DMA-safe memory. May be called by
731 * bus-specific DMA mmap(2)'ing functions.
732 */
733 paddr_t
734 _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
735 off_t off, int prot, int flags)
736 {
737 int i;
738
739 for (i = 0; i < nsegs; i++) {
740 #ifdef DIAGNOSTIC
741 if (off & PGOFSET)
742 panic("_bus_dmamem_mmap: offset unaligned");
743 if (segs[i].ds_addr & PGOFSET)
744 panic("_bus_dmamem_mmap: segment unaligned");
745 if (segs[i].ds_len & PGOFSET)
746 panic("_bus_dmamem_mmap: segment size not multiple"
747 " of page size");
748 #endif /* DIAGNOSTIC */
749 if (off >= segs[i].ds_len) {
750 off -= segs[i].ds_len;
751 continue;
752 }
753
754 return (arm_btop((u_long)segs[i].ds_addr + off));
755 }
756
757 /* Page not found. */
758 return (-1);
759 }
760
761 /**********************************************************************
762 * DMA utility functions
763 **********************************************************************/
764
765 /*
766 * Utility function to load a linear buffer. lastaddrp holds state
767 * between invocations (for multiple-buffer loads). segp contains
768 * the starting segment on entrace, and the ending segment on exit.
769 * first indicates if this is the first invocation of this function.
770 */
771 int
772 _bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
773 bus_size_t buflen, struct proc *p, int flags, paddr_t *lastaddrp,
774 int *segp, int first)
775 {
776 struct arm32_dma_range *dr;
777 bus_size_t sgsize;
778 bus_addr_t curaddr, lastaddr, baddr, bmask;
779 vaddr_t vaddr = (vaddr_t)buf;
780 int seg;
781 pmap_t pmap;
782
783 #ifdef DEBUG_DMA
784 printf("_bus_dmamem_load_buffer(buf=%p, len=%lx, flags=%d, 1st=%d)\n",
785 buf, buflen, flags, first);
786 #endif /* DEBUG_DMA */
787
788 if (p != NULL)
789 pmap = p->p_vmspace->vm_map.pmap;
790 else
791 pmap = pmap_kernel();
792
793 lastaddr = *lastaddrp;
794 bmask = ~(map->_dm_boundary - 1);
795
796 for (seg = *segp; buflen > 0; ) {
797 /*
798 * Get the physical address for this segment.
799 */
800 (void) pmap_extract(pmap, (vaddr_t)vaddr, &curaddr);
801
802 /*
803 * Make sure we're in an allowed DMA range.
804 */
805 if (t->_ranges != NULL) {
806 /* XXX cache last result? */
807 dr = _bus_dma_inrange(t->_ranges, t->_nranges,
808 curaddr);
809 if (dr == NULL)
810 return (EINVAL);
811
812 /*
813 * In a valid DMA range. Translate the physical
814 * memory address to an address in the DMA window.
815 */
816 curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
817 }
818
819 /*
820 * Compute the segment size, and adjust counts.
821 */
822 sgsize = NBPG - ((u_long)vaddr & PGOFSET);
823 if (buflen < sgsize)
824 sgsize = buflen;
825
826 /*
827 * Make sure we don't cross any boundaries.
828 */
829 if (map->_dm_boundary > 0) {
830 baddr = (curaddr + map->_dm_boundary) & bmask;
831 if (sgsize > (baddr - curaddr))
832 sgsize = (baddr - curaddr);
833 }
834
835 /*
836 * Insert chunk into a segment, coalescing with
837 * previous segment if possible.
838 */
839 if (first) {
840 map->dm_segs[seg].ds_addr = curaddr;
841 map->dm_segs[seg].ds_len = sgsize;
842 first = 0;
843 } else {
844 if (curaddr == lastaddr &&
845 (map->dm_segs[seg].ds_len + sgsize) <=
846 map->_dm_maxsegsz &&
847 (map->_dm_boundary == 0 ||
848 (map->dm_segs[seg].ds_addr & bmask) ==
849 (curaddr & bmask)))
850 map->dm_segs[seg].ds_len += sgsize;
851 else {
852 if (++seg >= map->_dm_segcnt)
853 break;
854 map->dm_segs[seg].ds_addr = curaddr;
855 map->dm_segs[seg].ds_len = sgsize;
856 }
857 }
858
859 lastaddr = curaddr + sgsize;
860 vaddr += sgsize;
861 buflen -= sgsize;
862 }
863
864 *segp = seg;
865 *lastaddrp = lastaddr;
866
867 /*
868 * Did we fit?
869 */
870 if (buflen != 0)
871 return (EFBIG); /* XXX better return value here? */
872 return (0);
873 }
874
875 /*
876 * Check to see if the specified page is in an allowed DMA range.
877 */
878 struct arm32_dma_range *
879 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
880 bus_addr_t curaddr)
881 {
882 struct arm32_dma_range *dr;
883 int i;
884
885 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
886 if (curaddr >= dr->dr_sysbase &&
887 round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
888 return (dr);
889 }
890
891 return (NULL);
892 }
893
894 /*
895 * Allocate physical memory from the given physical address range.
896 * Called by DMA-safe memory allocation methods.
897 */
898 int
899 _bus_dmamem_alloc_range(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
900 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
901 int flags, paddr_t low, paddr_t high)
902 {
903 paddr_t curaddr, lastaddr;
904 struct vm_page *m;
905 struct pglist mlist;
906 int curseg, error;
907
908 #ifdef DEBUG_DMA
909 printf("alloc_range: t=%p size=%lx align=%lx boundary=%lx segs=%p nsegs=%x rsegs=%p flags=%x lo=%lx hi=%lx\n",
910 t, size, alignment, boundary, segs, nsegs, rsegs, flags, low, high);
911 #endif /* DEBUG_DMA */
912
913 /* Always round the size. */
914 size = round_page(size);
915
916 /*
917 * Allocate pages from the VM system.
918 */
919 error = uvm_pglistalloc(size, low, high, alignment, boundary,
920 &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
921 if (error)
922 return (error);
923
924 /*
925 * Compute the location, size, and number of segments actually
926 * returned by the VM code.
927 */
928 m = mlist.tqh_first;
929 curseg = 0;
930 lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
931 segs[curseg].ds_len = PAGE_SIZE;
932 #ifdef DEBUG_DMA
933 printf("alloc: page %lx\n", lastaddr);
934 #endif /* DEBUG_DMA */
935 m = m->pageq.tqe_next;
936
937 for (; m != NULL; m = m->pageq.tqe_next) {
938 curaddr = VM_PAGE_TO_PHYS(m);
939 #ifdef DIAGNOSTIC
940 if (curaddr < low || curaddr >= high) {
941 printf("uvm_pglistalloc returned non-sensical"
942 " address 0x%lx\n", curaddr);
943 panic("_bus_dmamem_alloc_range");
944 }
945 #endif /* DIAGNOSTIC */
946 #ifdef DEBUG_DMA
947 printf("alloc: page %lx\n", curaddr);
948 #endif /* DEBUG_DMA */
949 if (curaddr == (lastaddr + PAGE_SIZE))
950 segs[curseg].ds_len += PAGE_SIZE;
951 else {
952 curseg++;
953 segs[curseg].ds_addr = curaddr;
954 segs[curseg].ds_len = PAGE_SIZE;
955 }
956 lastaddr = curaddr;
957 }
958
959 *rsegs = curseg + 1;
960
961 return (0);
962 }
963
964 /*
965 * Check if a memory region intersects with a DMA range, and return the
966 * page-rounded intersection if it does.
967 */
968 int
969 arm32_dma_range_intersect(struct arm32_dma_range *ranges, int nranges,
970 paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep)
971 {
972 struct arm32_dma_range *dr;
973 int i;
974
975 if (ranges == NULL)
976 return (0);
977
978 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
979 if (dr->dr_sysbase <= pa &&
980 pa < (dr->dr_sysbase + dr->dr_len)) {
981 /*
982 * Beginning of region intersects with this range.
983 */
984 *pap = trunc_page(pa);
985 *sizep = round_page(min(pa + size,
986 dr->dr_sysbase + dr->dr_len) - pa);
987 return (1);
988 }
989 if (pa < dr->dr_sysbase && dr->dr_sysbase < (pa + size)) {
990 /*
991 * End of region intersects with this range.
992 */
993 *pap = trunc_page(dr->dr_sysbase);
994 *sizep = round_page(min((pa + size) - dr->dr_sysbase,
995 dr->dr_len));
996 return (1);
997 }
998 }
999
1000 /* No intersection found. */
1001 return (0);
1002 }
1003