bus_dma.c revision 1.37 1 /* $NetBSD: bus_dma.c,v 1.37 2003/10/29 05:03:41 mycroft Exp $ */
2
3 /*-
4 * Copyright (c) 1996, 1997, 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 * NASA Ames Research Center.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by the NetBSD
22 * Foundation, Inc. and its contributors.
23 * 4. Neither the name of The NetBSD Foundation nor the names of its
24 * contributors may be used to endorse or promote products derived
25 * from this software without specific prior written permission.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 #define _ARM32_BUS_DMA_PRIVATE
41
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.37 2003/10/29 05:03:41 mycroft Exp $");
44
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/proc.h>
49 #include <sys/buf.h>
50 #include <sys/reboot.h>
51 #include <sys/conf.h>
52 #include <sys/file.h>
53 #include <sys/malloc.h>
54 #include <sys/mbuf.h>
55 #include <sys/vnode.h>
56 #include <sys/device.h>
57
58 #include <uvm/uvm_extern.h>
59
60 #include <machine/bus.h>
61 #include <machine/cpu.h>
62
63 #include <arm/cpufunc.h>
64
65 int _bus_dmamap_load_buffer(bus_dma_tag_t, bus_dmamap_t, void *,
66 bus_size_t, struct proc *, int, paddr_t *, int *, int);
67 struct arm32_dma_range *_bus_dma_inrange(struct arm32_dma_range *,
68 int, bus_addr_t);
69
70 /*
71 * Check to see if the specified page is in an allowed DMA range.
72 */
73 __inline struct arm32_dma_range *
74 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
75 bus_addr_t curaddr)
76 {
77 struct arm32_dma_range *dr;
78 int i;
79
80 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
81 if (curaddr >= dr->dr_sysbase &&
82 round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
83 return (dr);
84 }
85
86 return (NULL);
87 }
88
89 /*
90 * Common function for DMA map creation. May be called by bus-specific
91 * DMA map creation functions.
92 */
93 int
94 _bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
95 bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
96 {
97 struct arm32_bus_dmamap *map;
98 void *mapstore;
99 size_t mapsize;
100
101 #ifdef DEBUG_DMA
102 printf("dmamap_create: t=%p size=%lx nseg=%x msegsz=%lx boundary=%lx flags=%x\n",
103 t, size, nsegments, maxsegsz, boundary, flags);
104 #endif /* DEBUG_DMA */
105
106 /*
107 * Allocate and initialize the DMA map. The end of the map
108 * is a variable-sized array of segments, so we allocate enough
109 * room for them in one shot.
110 *
111 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
112 * of ALLOCNOW notifies others that we've reserved these resources,
113 * and they are not to be freed.
114 *
115 * The bus_dmamap_t includes one bus_dma_segment_t, hence
116 * the (nsegments - 1).
117 */
118 mapsize = sizeof(struct arm32_bus_dmamap) +
119 (sizeof(bus_dma_segment_t) * (nsegments - 1));
120 if ((mapstore = malloc(mapsize, M_DMAMAP,
121 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL)
122 return (ENOMEM);
123
124 memset(mapstore, 0, mapsize);
125 map = (struct arm32_bus_dmamap *)mapstore;
126 map->_dm_size = size;
127 map->_dm_segcnt = nsegments;
128 map->_dm_maxsegsz = maxsegsz;
129 map->_dm_boundary = boundary;
130 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
131 map->_dm_origbuf = NULL;
132 map->_dm_buftype = ARM32_BUFTYPE_INVALID;
133 map->_dm_proc = NULL;
134 map->dm_mapsize = 0; /* no valid mappings */
135 map->dm_nsegs = 0;
136
137 *dmamp = map;
138 #ifdef DEBUG_DMA
139 printf("dmamap_create:map=%p\n", map);
140 #endif /* DEBUG_DMA */
141 return (0);
142 }
143
144 /*
145 * Common function for DMA map destruction. May be called by bus-specific
146 * DMA map destruction functions.
147 */
148 void
149 _bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
150 {
151
152 #ifdef DEBUG_DMA
153 printf("dmamap_destroy: t=%p map=%p\n", t, map);
154 #endif /* DEBUG_DMA */
155
156 /*
157 * Explicit unload.
158 */
159 map->dm_mapsize = 0;
160 map->dm_nsegs = 0;
161 map->_dm_origbuf = NULL;
162 map->_dm_buftype = ARM32_BUFTYPE_INVALID;
163 map->_dm_proc = NULL;
164
165 free(map, M_DMAMAP);
166 }
167
168 /*
169 * Common function for loading a DMA map with a linear buffer. May
170 * be called by bus-specific DMA map load functions.
171 */
172 int
173 _bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
174 bus_size_t buflen, struct proc *p, int flags)
175 {
176 paddr_t lastaddr;
177 int seg, error;
178
179 #ifdef DEBUG_DMA
180 printf("dmamap_load: t=%p map=%p buf=%p len=%lx p=%p f=%d\n",
181 t, map, buf, buflen, p, flags);
182 #endif /* DEBUG_DMA */
183
184 /*
185 * Make sure that on error condition we return "no valid mappings".
186 */
187 map->dm_mapsize = 0;
188 map->dm_nsegs = 0;
189
190 if (buflen > map->_dm_size)
191 return (EINVAL);
192
193 /* _bus_dmamap_load_buffer() clears this if we're not... */
194 map->_dm_flags |= ARM32_DMAMAP_COHERENT;
195
196 seg = 0;
197 error = _bus_dmamap_load_buffer(t, map, buf, buflen, p, flags,
198 &lastaddr, &seg, 1);
199 if (error == 0) {
200 map->dm_mapsize = buflen;
201 map->dm_nsegs = seg + 1;
202 map->_dm_origbuf = buf;
203 map->_dm_buftype = ARM32_BUFTYPE_LINEAR;
204 map->_dm_proc = p;
205 }
206 #ifdef DEBUG_DMA
207 printf("dmamap_load: error=%d\n", error);
208 #endif /* DEBUG_DMA */
209 return (error);
210 }
211
212 /*
213 * Like _bus_dmamap_load(), but for mbufs.
214 */
215 int
216 _bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
217 int flags)
218 {
219 struct arm32_dma_range *dr;
220 paddr_t lastaddr;
221 int seg, error, first;
222 struct mbuf *m;
223
224 #ifdef DEBUG_DMA
225 printf("dmamap_load_mbuf: t=%p map=%p m0=%p f=%d\n",
226 t, map, m0, flags);
227 #endif /* DEBUG_DMA */
228
229 /*
230 * Make sure that on error condition we return "no valid mappings."
231 */
232 map->dm_mapsize = 0;
233 map->dm_nsegs = 0;
234
235 #ifdef DIAGNOSTIC
236 if ((m0->m_flags & M_PKTHDR) == 0)
237 panic("_bus_dmamap_load_mbuf: no packet header");
238 #endif /* DIAGNOSTIC */
239
240 if (m0->m_pkthdr.len > map->_dm_size)
241 return (EINVAL);
242
243 /*
244 * Mbuf chains should almost never have coherent (i.e.
245 * un-cached) mappings, so clear that flag now.
246 */
247 map->_dm_flags &= ~ARM32_DMAMAP_COHERENT;
248
249 first = 1;
250 seg = 0;
251 error = 0;
252 for (m = m0; m != NULL && error == 0; m = m->m_next) {
253 if (m->m_len == 0)
254 continue;
255 /* XXX Could be better about coalescing. */
256 /* XXX Doesn't check boundaries. */
257 switch (m->m_flags & (M_EXT|M_CLUSTER)) {
258 case M_EXT|M_CLUSTER:
259 /* XXX KDASSERT */
260 KASSERT(m->m_ext.ext_paddr != M_PADDR_INVALID);
261 lastaddr = m->m_ext.ext_paddr +
262 (m->m_data - m->m_ext.ext_buf);
263 have_addr:
264 if (first == 0 &&
265 ++seg >= map->_dm_segcnt) {
266 error = EFBIG;
267 break;
268 }
269 /*
270 * Make sure we're in an allowed DMA range.
271 */
272 if (t->_ranges != NULL) {
273 /* XXX cache last result? */
274 dr = _bus_dma_inrange(t->_ranges, t->_nranges,
275 lastaddr);
276 if (dr == NULL) {
277 error = EINVAL;
278 break;
279 }
280
281 /*
282 * In a valid DMA range. Translate the
283 * physical memory address to an address
284 * in the DMA window.
285 */
286 lastaddr = (lastaddr - dr->dr_sysbase) +
287 dr->dr_busbase;
288 }
289 map->dm_segs[seg].ds_addr = lastaddr;
290 map->dm_segs[seg].ds_len = m->m_len;
291 lastaddr += m->m_len;
292 break;
293
294 case 0:
295 lastaddr = m->m_paddr + M_BUFOFFSET(m) +
296 (m->m_data - M_BUFADDR(m));
297 goto have_addr;
298
299 default:
300 error = _bus_dmamap_load_buffer(t, map, m->m_data,
301 m->m_len, NULL, flags, &lastaddr, &seg, first);
302 }
303 first = 0;
304 }
305 if (error == 0) {
306 map->dm_mapsize = m0->m_pkthdr.len;
307 map->dm_nsegs = seg + 1;
308 map->_dm_origbuf = m0;
309 map->_dm_buftype = ARM32_BUFTYPE_MBUF;
310 map->_dm_proc = NULL; /* always kernel */
311 }
312 #ifdef DEBUG_DMA
313 printf("dmamap_load_mbuf: error=%d\n", error);
314 #endif /* DEBUG_DMA */
315 return (error);
316 }
317
318 /*
319 * Like _bus_dmamap_load(), but for uios.
320 */
321 int
322 _bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
323 int flags)
324 {
325 paddr_t lastaddr;
326 int seg, i, error, first;
327 bus_size_t minlen, resid;
328 struct proc *p = NULL;
329 struct iovec *iov;
330 caddr_t addr;
331
332 /*
333 * Make sure that on error condition we return "no valid mappings."
334 */
335 map->dm_mapsize = 0;
336 map->dm_nsegs = 0;
337
338 resid = uio->uio_resid;
339 iov = uio->uio_iov;
340
341 if (uio->uio_segflg == UIO_USERSPACE) {
342 p = uio->uio_procp;
343 #ifdef DIAGNOSTIC
344 if (p == NULL)
345 panic("_bus_dmamap_load_uio: USERSPACE but no proc");
346 #endif
347 }
348
349 /* _bus_dmamap_load_buffer() clears this if we're not... */
350 map->_dm_flags |= ARM32_DMAMAP_COHERENT;
351
352 first = 1;
353 seg = 0;
354 error = 0;
355 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
356 /*
357 * Now at the first iovec to load. Load each iovec
358 * until we have exhausted the residual count.
359 */
360 minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
361 addr = (caddr_t)iov[i].iov_base;
362
363 error = _bus_dmamap_load_buffer(t, map, addr, minlen,
364 p, flags, &lastaddr, &seg, first);
365 first = 0;
366
367 resid -= minlen;
368 }
369 if (error == 0) {
370 map->dm_mapsize = uio->uio_resid;
371 map->dm_nsegs = seg + 1;
372 map->_dm_origbuf = uio;
373 map->_dm_buftype = ARM32_BUFTYPE_UIO;
374 map->_dm_proc = p;
375 }
376 return (error);
377 }
378
379 /*
380 * Like _bus_dmamap_load(), but for raw memory allocated with
381 * bus_dmamem_alloc().
382 */
383 int
384 _bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
385 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
386 {
387
388 panic("_bus_dmamap_load_raw: not implemented");
389 }
390
391 /*
392 * Common function for unloading a DMA map. May be called by
393 * bus-specific DMA map unload functions.
394 */
395 void
396 _bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
397 {
398
399 #ifdef DEBUG_DMA
400 printf("dmamap_unload: t=%p map=%p\n", t, map);
401 #endif /* DEBUG_DMA */
402
403 /*
404 * No resources to free; just mark the mappings as
405 * invalid.
406 */
407 map->dm_mapsize = 0;
408 map->dm_nsegs = 0;
409 map->_dm_origbuf = NULL;
410 map->_dm_buftype = ARM32_BUFTYPE_INVALID;
411 map->_dm_proc = NULL;
412 }
413
414 static __inline void
415 _bus_dmamap_sync_linear(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
416 bus_size_t len, int ops)
417 {
418 vaddr_t addr = (vaddr_t) map->_dm_origbuf;
419
420 addr += offset;
421
422 switch (ops) {
423 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
424 cpu_dcache_wbinv_range(addr, len);
425 break;
426
427 case BUS_DMASYNC_PREREAD:
428 if (((addr | len) & arm_dcache_align_mask) == 0)
429 cpu_dcache_inv_range(addr, len);
430 else
431 cpu_dcache_wbinv_range(addr, len);
432 break;
433
434 case BUS_DMASYNC_PREWRITE:
435 cpu_dcache_wb_range(addr, len);
436 break;
437 }
438 }
439
440 static __inline void
441 _bus_dmamap_sync_mbuf(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
442 bus_size_t len, int ops)
443 {
444 struct mbuf *m, *m0 = map->_dm_origbuf;
445 bus_size_t minlen, moff;
446 vaddr_t maddr;
447
448 for (moff = offset, m = m0; m != NULL && len != 0;
449 m = m->m_next) {
450 /* Find the beginning mbuf. */
451 if (moff >= m->m_len) {
452 moff -= m->m_len;
453 continue;
454 }
455
456 /*
457 * Now at the first mbuf to sync; nail each one until
458 * we have exhausted the length.
459 */
460 minlen = m->m_len - moff;
461 if (len < minlen)
462 minlen = len;
463
464 maddr = mtod(m, vaddr_t);
465 maddr += moff;
466
467 /*
468 * We can save a lot of work here if we know the mapping
469 * is read-only at the MMU:
470 *
471 * If a mapping is read-only, no dirty cache blocks will
472 * exist for it. If a writable mapping was made read-only,
473 * we know any dirty cache lines for the range will have
474 * been cleaned for us already. Therefore, if the upper
475 * layer can tell us we have a read-only mapping, we can
476 * skip all cache cleaning.
477 *
478 * NOTE: This only works if we know the pmap cleans pages
479 * before making a read-write -> read-only transition. If
480 * this ever becomes non-true (e.g. Physically Indexed
481 * cache), this will have to be revisited.
482 */
483 switch (ops) {
484 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
485 if (! M_ROMAP(m)) {
486 cpu_dcache_wbinv_range(maddr, minlen);
487 break;
488 }
489 /* else FALLTHROUGH */
490
491 case BUS_DMASYNC_PREREAD:
492 if (((maddr | minlen) & arm_dcache_align_mask) == 0)
493 cpu_dcache_inv_range(maddr, minlen);
494 else
495 cpu_dcache_wbinv_range(maddr, minlen);
496 break;
497
498 case BUS_DMASYNC_PREWRITE:
499 if (! M_ROMAP(m))
500 cpu_dcache_wb_range(maddr, minlen);
501 break;
502 }
503 moff = 0;
504 len -= minlen;
505 }
506 }
507
508 static __inline void
509 _bus_dmamap_sync_uio(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
510 bus_size_t len, int ops)
511 {
512 struct uio *uio = map->_dm_origbuf;
513 struct iovec *iov;
514 bus_size_t minlen, ioff;
515 vaddr_t addr;
516
517 for (iov = uio->uio_iov, ioff = offset; len != 0; iov++) {
518 /* Find the beginning iovec. */
519 if (ioff >= iov->iov_len) {
520 ioff -= iov->iov_len;
521 continue;
522 }
523
524 /*
525 * Now at the first iovec to sync; nail each one until
526 * we have exhausted the length.
527 */
528 minlen = iov->iov_len - ioff;
529 if (len < minlen)
530 minlen = len;
531
532 addr = (vaddr_t) iov->iov_base;
533 addr += ioff;
534
535 switch (ops) {
536 case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
537 cpu_dcache_wbinv_range(addr, minlen);
538 break;
539
540 case BUS_DMASYNC_PREREAD:
541 if (((addr | minlen) & arm_dcache_align_mask) == 0)
542 cpu_dcache_inv_range(addr, minlen);
543 else
544 cpu_dcache_wbinv_range(addr, minlen);
545 break;
546
547 case BUS_DMASYNC_PREWRITE:
548 cpu_dcache_wb_range(addr, minlen);
549 break;
550 }
551 ioff = 0;
552 len -= minlen;
553 }
554 }
555
556 /*
557 * Common function for DMA map synchronization. May be called
558 * by bus-specific DMA map synchronization functions.
559 *
560 * This version works for the Virtually Indexed Virtually Tagged
561 * cache found on 32-bit ARM processors.
562 *
563 * XXX Should have separate versions for write-through vs.
564 * XXX write-back caches. We currently assume write-back
565 * XXX here, which is not as efficient as it could be for
566 * XXX the write-through case.
567 */
568 void
569 _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
570 bus_size_t len, int ops)
571 {
572
573 #ifdef DEBUG_DMA
574 printf("dmamap_sync: t=%p map=%p offset=%lx len=%lx ops=%x\n",
575 t, map, offset, len, ops);
576 #endif /* DEBUG_DMA */
577
578 /*
579 * Mixing of PRE and POST operations is not allowed.
580 */
581 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
582 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
583 panic("_bus_dmamap_sync: mix PRE and POST");
584
585 #ifdef DIAGNOSTIC
586 if (offset >= map->dm_mapsize)
587 panic("_bus_dmamap_sync: bad offset %lu (map size is %lu)",
588 offset, map->dm_mapsize);
589 if (len == 0 || (offset + len) > map->dm_mapsize)
590 panic("_bus_dmamap_sync: bad length");
591 #endif
592
593 /*
594 * For a virtually-indexed write-back cache, we need
595 * to do the following things:
596 *
597 * PREREAD -- Invalidate the D-cache. We do this
598 * here in case a write-back is required by the back-end.
599 *
600 * PREWRITE -- Write-back the D-cache. Note that if
601 * we are doing a PREREAD|PREWRITE, we can collapse
602 * the whole thing into a single Wb-Inv.
603 *
604 * POSTREAD -- Nothing.
605 *
606 * POSTWRITE -- Nothing.
607 */
608
609 ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
610 if (ops == 0)
611 return;
612
613 /* Skip cache frobbing if mapping was COHERENT. */
614 if (map->_dm_flags & ARM32_DMAMAP_COHERENT) {
615 /* Drain the write buffer. */
616 cpu_drain_writebuf();
617 return;
618 }
619
620 /*
621 * If the mapping is not the kernel's and also not the
622 * current process's (XXX actually, vmspace), then we
623 * don't have anything to do, since the cache is Wb-Inv'd
624 * on context switch.
625 *
626 * XXX REVISIT WHEN WE DO FCSE!
627 */
628 if (__predict_false(map->_dm_proc != NULL &&
629 curlwp != NULL && map->_dm_proc != curproc))
630 return;
631
632 switch (map->_dm_buftype) {
633 case ARM32_BUFTYPE_LINEAR:
634 _bus_dmamap_sync_linear(t, map, offset, len, ops);
635 break;
636
637 case ARM32_BUFTYPE_MBUF:
638 _bus_dmamap_sync_mbuf(t, map, offset, len, ops);
639 break;
640
641 case ARM32_BUFTYPE_UIO:
642 _bus_dmamap_sync_uio(t, map, offset, len, ops);
643 break;
644
645 case ARM32_BUFTYPE_RAW:
646 panic("_bus_dmamap_sync: ARM32_BUFTYPE_RAW");
647 break;
648
649 case ARM32_BUFTYPE_INVALID:
650 panic("_bus_dmamap_sync: ARM32_BUFTYPE_INVALID");
651 break;
652
653 default:
654 printf("unknown buffer type %d\n", map->_dm_buftype);
655 panic("_bus_dmamap_sync");
656 }
657
658 /* Drain the write buffer. */
659 cpu_drain_writebuf();
660 }
661
662 /*
663 * Common function for DMA-safe memory allocation. May be called
664 * by bus-specific DMA memory allocation functions.
665 */
666
667 extern paddr_t physical_start;
668 extern paddr_t physical_end;
669
670 int
671 _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
672 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
673 int flags)
674 {
675 struct arm32_dma_range *dr;
676 int error, i;
677
678 #ifdef DEBUG_DMA
679 printf("dmamem_alloc t=%p size=%lx align=%lx boundary=%lx "
680 "segs=%p nsegs=%x rsegs=%p flags=%x\n", t, size, alignment,
681 boundary, segs, nsegs, rsegs, flags);
682 #endif
683
684 if ((dr = t->_ranges) != NULL) {
685 error = ENOMEM;
686 for (i = 0; i < t->_nranges; i++, dr++) {
687 if (dr->dr_len == 0)
688 continue;
689 error = _bus_dmamem_alloc_range(t, size, alignment,
690 boundary, segs, nsegs, rsegs, flags,
691 trunc_page(dr->dr_sysbase),
692 trunc_page(dr->dr_sysbase + dr->dr_len));
693 if (error == 0)
694 break;
695 }
696 } else {
697 error = _bus_dmamem_alloc_range(t, size, alignment, boundary,
698 segs, nsegs, rsegs, flags, trunc_page(physical_start),
699 trunc_page(physical_end));
700 }
701
702 #ifdef DEBUG_DMA
703 printf("dmamem_alloc: =%d\n", error);
704 #endif
705
706 return(error);
707 }
708
709 /*
710 * Common function for freeing DMA-safe memory. May be called by
711 * bus-specific DMA memory free functions.
712 */
713 void
714 _bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
715 {
716 struct vm_page *m;
717 bus_addr_t addr;
718 struct pglist mlist;
719 int curseg;
720
721 #ifdef DEBUG_DMA
722 printf("dmamem_free: t=%p segs=%p nsegs=%x\n", t, segs, nsegs);
723 #endif /* DEBUG_DMA */
724
725 /*
726 * Build a list of pages to free back to the VM system.
727 */
728 TAILQ_INIT(&mlist);
729 for (curseg = 0; curseg < nsegs; curseg++) {
730 for (addr = segs[curseg].ds_addr;
731 addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
732 addr += PAGE_SIZE) {
733 m = PHYS_TO_VM_PAGE(addr);
734 TAILQ_INSERT_TAIL(&mlist, m, pageq);
735 }
736 }
737 uvm_pglistfree(&mlist);
738 }
739
740 /*
741 * Common function for mapping DMA-safe memory. May be called by
742 * bus-specific DMA memory map functions.
743 */
744 int
745 _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
746 size_t size, caddr_t *kvap, int flags)
747 {
748 vaddr_t va;
749 bus_addr_t addr;
750 int curseg;
751 pt_entry_t *ptep/*, pte*/;
752
753 #ifdef DEBUG_DMA
754 printf("dmamem_map: t=%p segs=%p nsegs=%x size=%lx flags=%x\n", t,
755 segs, nsegs, (unsigned long)size, flags);
756 #endif /* DEBUG_DMA */
757
758 size = round_page(size);
759 va = uvm_km_valloc(kernel_map, size);
760
761 if (va == 0)
762 return (ENOMEM);
763
764 *kvap = (caddr_t)va;
765
766 for (curseg = 0; curseg < nsegs; curseg++) {
767 for (addr = segs[curseg].ds_addr;
768 addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
769 addr += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) {
770 #ifdef DEBUG_DMA
771 printf("wiring p%lx to v%lx", addr, va);
772 #endif /* DEBUG_DMA */
773 if (size == 0)
774 panic("_bus_dmamem_map: size botch");
775 pmap_enter(pmap_kernel(), va, addr,
776 VM_PROT_READ | VM_PROT_WRITE,
777 VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
778 /*
779 * If the memory must remain coherent with the
780 * cache then we must make the memory uncacheable
781 * in order to maintain virtual cache coherency.
782 * We must also guarantee the cache does not already
783 * contain the virtal addresses we are making
784 * uncacheable.
785 */
786 if (flags & BUS_DMA_COHERENT) {
787 cpu_dcache_wbinv_range(va, PAGE_SIZE);
788 cpu_drain_writebuf();
789 ptep = vtopte(va);
790 *ptep &= ~L2_S_CACHE_MASK;
791 PTE_SYNC(ptep);
792 tlb_flush();
793 }
794 #ifdef DEBUG_DMA
795 ptep = vtopte(va);
796 printf(" pte=v%p *pte=%x\n", ptep, *ptep);
797 #endif /* DEBUG_DMA */
798 }
799 }
800 pmap_update(pmap_kernel());
801 #ifdef DEBUG_DMA
802 printf("dmamem_map: =%p\n", *kvap);
803 #endif /* DEBUG_DMA */
804 return (0);
805 }
806
807 /*
808 * Common function for unmapping DMA-safe memory. May be called by
809 * bus-specific DMA memory unmapping functions.
810 */
811 void
812 _bus_dmamem_unmap(bus_dma_tag_t t, caddr_t kva, size_t size)
813 {
814
815 #ifdef DEBUG_DMA
816 printf("dmamem_unmap: t=%p kva=%p size=%lx\n", t, kva,
817 (unsigned long)size);
818 #endif /* DEBUG_DMA */
819 #ifdef DIAGNOSTIC
820 if ((u_long)kva & PGOFSET)
821 panic("_bus_dmamem_unmap");
822 #endif /* DIAGNOSTIC */
823
824 size = round_page(size);
825 uvm_km_free(kernel_map, (vaddr_t)kva, size);
826 }
827
828 /*
829 * Common functin for mmap(2)'ing DMA-safe memory. May be called by
830 * bus-specific DMA mmap(2)'ing functions.
831 */
832 paddr_t
833 _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
834 off_t off, int prot, int flags)
835 {
836 int i;
837
838 for (i = 0; i < nsegs; i++) {
839 #ifdef DIAGNOSTIC
840 if (off & PGOFSET)
841 panic("_bus_dmamem_mmap: offset unaligned");
842 if (segs[i].ds_addr & PGOFSET)
843 panic("_bus_dmamem_mmap: segment unaligned");
844 if (segs[i].ds_len & PGOFSET)
845 panic("_bus_dmamem_mmap: segment size not multiple"
846 " of page size");
847 #endif /* DIAGNOSTIC */
848 if (off >= segs[i].ds_len) {
849 off -= segs[i].ds_len;
850 continue;
851 }
852
853 return (arm_btop((u_long)segs[i].ds_addr + off));
854 }
855
856 /* Page not found. */
857 return (-1);
858 }
859
860 /**********************************************************************
861 * DMA utility functions
862 **********************************************************************/
863
864 /*
865 * Utility function to load a linear buffer. lastaddrp holds state
866 * between invocations (for multiple-buffer loads). segp contains
867 * the starting segment on entrace, and the ending segment on exit.
868 * first indicates if this is the first invocation of this function.
869 */
870 int
871 _bus_dmamap_load_buffer(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
872 bus_size_t buflen, struct proc *p, int flags, paddr_t *lastaddrp,
873 int *segp, int first)
874 {
875 struct arm32_dma_range *dr;
876 bus_size_t sgsize;
877 bus_addr_t curaddr, lastaddr, baddr, bmask;
878 vaddr_t vaddr = (vaddr_t)buf;
879 pd_entry_t *pde;
880 pt_entry_t pte;
881 int seg;
882 pmap_t pmap;
883 pt_entry_t *ptep;
884
885 #ifdef DEBUG_DMA
886 printf("_bus_dmamem_load_buffer(buf=%p, len=%lx, flags=%d, 1st=%d)\n",
887 buf, buflen, flags, first);
888 #endif /* DEBUG_DMA */
889
890 if (p != NULL)
891 pmap = p->p_vmspace->vm_map.pmap;
892 else
893 pmap = pmap_kernel();
894
895 lastaddr = *lastaddrp;
896 bmask = ~(map->_dm_boundary - 1);
897
898 for (seg = *segp; buflen > 0; ) {
899 /*
900 * Get the physical address for this segment.
901 *
902 * XXX Don't support checking for coherent mappings
903 * XXX in user address space.
904 */
905 if (__predict_true(pmap == pmap_kernel())) {
906 (void) pmap_get_pde_pte(pmap, vaddr, &pde, &ptep);
907 if (__predict_false(pmap_pde_section(pde))) {
908 curaddr = (*pde & L1_S_FRAME) |
909 (vaddr & L1_S_OFFSET);
910 if (*pde & L1_S_CACHE_MASK) {
911 map->_dm_flags &=
912 ~ARM32_DMAMAP_COHERENT;
913 }
914 } else {
915 pte = *ptep;
916 KDASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV);
917 if (__predict_false((pte & L2_TYPE_MASK)
918 == L2_TYPE_L)) {
919 curaddr = (pte & L2_L_FRAME) |
920 (vaddr & L2_L_OFFSET);
921 if (pte & L2_L_CACHE_MASK) {
922 map->_dm_flags &=
923 ~ARM32_DMAMAP_COHERENT;
924 }
925 } else {
926 curaddr = (pte & L2_S_FRAME) |
927 (vaddr & L2_S_OFFSET);
928 if (pte & L2_S_CACHE_MASK) {
929 map->_dm_flags &=
930 ~ARM32_DMAMAP_COHERENT;
931 }
932 }
933 }
934 } else {
935 (void) pmap_extract(pmap, vaddr, &curaddr);
936 map->_dm_flags &= ~ARM32_DMAMAP_COHERENT;
937 }
938
939 /*
940 * Make sure we're in an allowed DMA range.
941 */
942 if (t->_ranges != NULL) {
943 /* XXX cache last result? */
944 dr = _bus_dma_inrange(t->_ranges, t->_nranges,
945 curaddr);
946 if (dr == NULL)
947 return (EINVAL);
948
949 /*
950 * In a valid DMA range. Translate the physical
951 * memory address to an address in the DMA window.
952 */
953 curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
954 }
955
956 /*
957 * Compute the segment size, and adjust counts.
958 */
959 sgsize = PAGE_SIZE - ((u_long)vaddr & PGOFSET);
960 if (buflen < sgsize)
961 sgsize = buflen;
962
963 /*
964 * Make sure we don't cross any boundaries.
965 */
966 if (map->_dm_boundary > 0) {
967 baddr = (curaddr + map->_dm_boundary) & bmask;
968 if (sgsize > (baddr - curaddr))
969 sgsize = (baddr - curaddr);
970 }
971
972 /*
973 * Insert chunk into a segment, coalescing with
974 * previous segment if possible.
975 */
976 if (first) {
977 map->dm_segs[seg].ds_addr = curaddr;
978 map->dm_segs[seg].ds_len = sgsize;
979 first = 0;
980 } else {
981 if (curaddr == lastaddr &&
982 (map->dm_segs[seg].ds_len + sgsize) <=
983 map->_dm_maxsegsz &&
984 (map->_dm_boundary == 0 ||
985 (map->dm_segs[seg].ds_addr & bmask) ==
986 (curaddr & bmask)))
987 map->dm_segs[seg].ds_len += sgsize;
988 else {
989 if (++seg >= map->_dm_segcnt)
990 break;
991 map->dm_segs[seg].ds_addr = curaddr;
992 map->dm_segs[seg].ds_len = sgsize;
993 }
994 }
995
996 lastaddr = curaddr + sgsize;
997 vaddr += sgsize;
998 buflen -= sgsize;
999 }
1000
1001 *segp = seg;
1002 *lastaddrp = lastaddr;
1003
1004 /*
1005 * Did we fit?
1006 */
1007 if (buflen != 0)
1008 return (EFBIG); /* XXX better return value here? */
1009 return (0);
1010 }
1011
1012 /*
1013 * Allocate physical memory from the given physical address range.
1014 * Called by DMA-safe memory allocation methods.
1015 */
1016 int
1017 _bus_dmamem_alloc_range(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
1018 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
1019 int flags, paddr_t low, paddr_t high)
1020 {
1021 paddr_t curaddr, lastaddr;
1022 struct vm_page *m;
1023 struct pglist mlist;
1024 int curseg, error;
1025
1026 #ifdef DEBUG_DMA
1027 printf("alloc_range: t=%p size=%lx align=%lx boundary=%lx segs=%p nsegs=%x rsegs=%p flags=%x lo=%lx hi=%lx\n",
1028 t, size, alignment, boundary, segs, nsegs, rsegs, flags, low, high);
1029 #endif /* DEBUG_DMA */
1030
1031 /* Always round the size. */
1032 size = round_page(size);
1033
1034 /*
1035 * Allocate pages from the VM system.
1036 */
1037 error = uvm_pglistalloc(size, low, high, alignment, boundary,
1038 &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
1039 if (error)
1040 return (error);
1041
1042 /*
1043 * Compute the location, size, and number of segments actually
1044 * returned by the VM code.
1045 */
1046 m = mlist.tqh_first;
1047 curseg = 0;
1048 lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
1049 segs[curseg].ds_len = PAGE_SIZE;
1050 #ifdef DEBUG_DMA
1051 printf("alloc: page %lx\n", lastaddr);
1052 #endif /* DEBUG_DMA */
1053 m = m->pageq.tqe_next;
1054
1055 for (; m != NULL; m = m->pageq.tqe_next) {
1056 curaddr = VM_PAGE_TO_PHYS(m);
1057 #ifdef DIAGNOSTIC
1058 if (curaddr < low || curaddr >= high) {
1059 printf("uvm_pglistalloc returned non-sensical"
1060 " address 0x%lx\n", curaddr);
1061 panic("_bus_dmamem_alloc_range");
1062 }
1063 #endif /* DIAGNOSTIC */
1064 #ifdef DEBUG_DMA
1065 printf("alloc: page %lx\n", curaddr);
1066 #endif /* DEBUG_DMA */
1067 if (curaddr == (lastaddr + PAGE_SIZE))
1068 segs[curseg].ds_len += PAGE_SIZE;
1069 else {
1070 curseg++;
1071 segs[curseg].ds_addr = curaddr;
1072 segs[curseg].ds_len = PAGE_SIZE;
1073 }
1074 lastaddr = curaddr;
1075 }
1076
1077 *rsegs = curseg + 1;
1078
1079 return (0);
1080 }
1081
1082 /*
1083 * Check if a memory region intersects with a DMA range, and return the
1084 * page-rounded intersection if it does.
1085 */
1086 int
1087 arm32_dma_range_intersect(struct arm32_dma_range *ranges, int nranges,
1088 paddr_t pa, psize_t size, paddr_t *pap, psize_t *sizep)
1089 {
1090 struct arm32_dma_range *dr;
1091 int i;
1092
1093 if (ranges == NULL)
1094 return (0);
1095
1096 for (i = 0, dr = ranges; i < nranges; i++, dr++) {
1097 if (dr->dr_sysbase <= pa &&
1098 pa < (dr->dr_sysbase + dr->dr_len)) {
1099 /*
1100 * Beginning of region intersects with this range.
1101 */
1102 *pap = trunc_page(pa);
1103 *sizep = round_page(min(pa + size,
1104 dr->dr_sysbase + dr->dr_len) - pa);
1105 return (1);
1106 }
1107 if (pa < dr->dr_sysbase && dr->dr_sysbase < (pa + size)) {
1108 /*
1109 * End of region intersects with this range.
1110 */
1111 *pap = trunc_page(dr->dr_sysbase);
1112 *sizep = round_page(min((pa + size) - dr->dr_sysbase,
1113 dr->dr_len));
1114 return (1);
1115 }
1116 }
1117
1118 /* No intersection found. */
1119 return (0);
1120 }
1121