cortex_pmc.c revision 1.1.14.1 1 /* Copyright (c) 2007 Microsoft
2 * All rights reserved.
3 *
4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions
6 * are met:
7 * 1. Redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer.
9 * 2. Redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution.
12 * 3. All advertising materials mentioning features or use of this software
13 * must display the following acknowledgement:
14 * This product includes software developed by Microsoft
15 *
16 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29
30 /*
31 * support for ARM cortex Performance Monitor Counters
32 * based on arm11_pmc.c
33 */
34
35 #include <sys/cdefs.h>
36 /* __KERNEL_RCSID(0, "$NetBSD: cortex_pmc.c,v 1.1.14.1 2012/10/30 17:18:56 yamt Exp $"); */
37 #include "opt_perfctrs.h"
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/kernel.h>
42 #include <sys/time.h>
43 #include <sys/timetc.h>
44
45 #include <dev/clock_subr.h>
46
47 #include <uvm/uvm_extern.h>
48
49 #include <arm/armreg.h>
50 #include <arm/cpufunc.h>
51 #include <arm/arm32/machdep.h>
52
53 #ifndef CORTEX_PMC_CCNT_HZ
54 # define CORTEX_PMC_CCNT_HZ 400000000 /* 400MHz */
55 #endif
56
57 #define COUNTS_PER_USEC (curcpu()->ci_data.cpu_cc_freq / (1000*1000))
58
59 static const uint32_t counts_per_wrap = ~0UL - 1;
60
61 /*
62 * enable the PMC CCNT for delay()
63 */
64 void
65 cortex_pmc_ccnt_init(void)
66 {
67 if (curcpu()->ci_data.cpu_cc_freq == 0) {
68 curcpu()->ci_data.cpu_cc_freq = CORTEX_PMC_CCNT_HZ;
69 }
70 }
71
72 /*
73 * delay - for "at least" arg usec
74 *
75 * NOTE: at 400MHz we are restricted to (uint32_t)~0 "counts"
76 * if this is a problem, accumulate counts in LL vars
77 */
78 void
79 delay(u_int arg)
80 {
81 uint32_t ctrl;
82 uint32_t cur;
83 uint32_t last;
84 uint32_t delta = 0;
85 uint32_t usecs = 0;
86 const uint32_t counts_per_usec = COUNTS_PER_USEC;
87 const uint32_t delay_arg_limit = ~0UL / counts_per_usec; /* about 10 sec */
88
89 if (arg > delay_arg_limit)
90 panic("%s: arg %u overflow, limit is %u usec\n",
91 __func__, arg, delay_arg_limit);
92
93 last = armreg_pmccntr_read();
94 delta = usecs = 0;
95 while (arg > usecs) {
96 cur = armreg_pmccntr_read();
97
98 /* overflow flag is moved to a separate register
99 and is not read from PMC Control Register */
100 ctrl = armreg_pmovsr_read();
101 if (ctrl & CORTEX_CNTOFL_C) {
102 /* Reset overflow flag for cycle counter in overflow register */
103 armreg_pmovsr_write(CORTEX_CNTOFL_C);
104 delta += (last + (counts_per_wrap - cur));
105 } else {
106 delta += (cur - last);
107 }
108 last = cur;
109 if (delta >= counts_per_usec) {
110 usecs += delta / counts_per_usec;
111 delta %= counts_per_usec;
112 }
113 }
114 }
115