cpuswitch.S revision 1.10
1 /* $NetBSD: cpuswitch.S,v 1.10 2002/08/12 19:33:01 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 48 #include "assym.h" 49 #include <machine/param.h> 50 #include <machine/cpu.h> 51 #include <machine/frame.h> 52 #include <machine/asm.h> 53 54 #undef IRQdisable 55 #undef IRQenable 56 57 /* 58 * New experimental definitions of IRQdisable and IRQenable 59 * These keep FIQ's enabled since FIQ's are special. 60 */ 61 62 #define IRQdisable \ 63 mrs r14, cpsr_all ; \ 64 orr r14, r14, #(I32_bit) ; \ 65 msr cpsr_all, r14 ; \ 66 67 #define IRQenable \ 68 mrs r14, cpsr_all ; \ 69 bic r14, r14, #(I32_bit) ; \ 70 msr cpsr_all, r14 ; \ 71 72 /* 73 * setrunqueue() and remrunqueue() 74 * 75 * Functions to add and remove a process for the run queue. 76 */ 77 78 .text 79 80 Lwhichqs: 81 .word _C_LABEL(sched_whichqs) 82 83 Lqs: 84 .word _C_LABEL(sched_qs) 85 86 /* 87 * On entry 88 * r0 = process 89 */ 90 91 ENTRY(setrunqueue) 92 /* 93 * Local register usage 94 * r0 = process 95 * r1 = queue 96 * r2 = &qs[queue] and temp 97 * r3 = temp 98 * r12 = whichqs 99 */ 100 #ifdef DIAGNOSTIC 101 ldr r1, [r0, #(P_BACK)] 102 teq r1, #0x00000000 103 bne Lsetrunqueue_erg 104 105 ldr r1, [r0, #(P_WCHAN)] 106 teq r1, #0x00000000 107 bne Lsetrunqueue_erg 108 #endif 109 110 /* Get the priority of the queue */ 111 ldrb r1, [r0, #(P_PRIORITY)] 112 mov r1, r1, lsr #2 113 114 /* Indicate that there is a process on this queue */ 115 ldr r12, Lwhichqs 116 ldr r2, [r12] 117 mov r3, #0x00000001 118 mov r3, r3, lsl r1 119 orr r2, r2, r3 120 str r2, [r12] 121 122 /* Get the address of the queue */ 123 ldr r2, Lqs 124 add r1, r2, r1, lsl # 3 125 126 /* Hook the process in */ 127 str r1, [r0, #(P_FORW)] 128 ldr r2, [r1, #(P_BACK)] 129 130 str r0, [r1, #(P_BACK)] 131 #ifdef DIAGNOSTIC 132 teq r2, #0x00000000 133 beq Lsetrunqueue_erg 134 #endif 135 str r0, [r2, #(P_FORW)] 136 str r2, [r0, #(P_BACK)] 137 138 mov pc, lr 139 140 #ifdef DIAGNOSTIC 141 Lsetrunqueue_erg: 142 mov r2, r1 143 mov r1, r0 144 add r0, pc, #Ltext1 - . - 8 145 bl _C_LABEL(printf) 146 147 ldr r2, Lqs 148 ldr r1, [r2] 149 add r0, pc, #Ltext2 - . - 8 150 b _C_LABEL(panic) 151 152 Ltext1: 153 .asciz "setrunqueue : %08x %08x\n" 154 Ltext2: 155 .asciz "setrunqueue : [qs]=%08x qs=%08x\n" 156 .align 0 157 #endif 158 159 /* 160 * On entry 161 * r0 = process 162 */ 163 164 ENTRY(remrunqueue) 165 /* 166 * Local register usage 167 * r0 = oldproc 168 * r1 = queue 169 * r2 = &qs[queue] and scratch 170 * r3 = scratch 171 * r12 = whichqs 172 */ 173 174 /* Get the priority of the queue */ 175 ldrb r1, [r0, #(P_PRIORITY)] 176 mov r1, r1, lsr #2 177 178 /* Unhook the process */ 179 ldr r2, [r0, #(P_FORW)] 180 ldr r3, [r0, #(P_BACK)] 181 182 str r3, [r2, #(P_BACK)] 183 str r2, [r3, #(P_FORW)] 184 185 /* If the queue is now empty clear the queue not empty flag */ 186 teq r2, r3 187 188 /* This could be reworked to avoid the use of r4 */ 189 ldreq r12, Lwhichqs 190 ldreq r2, [r12] 191 moveq r3, #0x00000001 192 moveq r3, r3, lsl r1 193 biceq r2, r2, r3 194 streq r2, [r12] 195 196 /* Remove the back pointer for the process */ 197 mov r1, #0x00000000 198 str r1, [r0, #(P_BACK)] 199 200 mov pc, lr 201 202 203 /* 204 * cpuswitch() 205 * 206 * preforms a process context switch. 207 * This function has several entry points 208 */ 209 210 Lcurproc: 211 .word _C_LABEL(curproc) 212 213 Lcurpcb: 214 .word _C_LABEL(curpcb) 215 216 Lwant_resched: 217 .word _C_LABEL(want_resched) 218 219 Lcpufuncs: 220 .word _C_LABEL(cpufuncs) 221 222 .data 223 .global _C_LABEL(curpcb) 224 _C_LABEL(curpcb): 225 .word 0x00000000 226 .text 227 228 Lblock_userspace_access: 229 .word _C_LABEL(block_userspace_access) 230 231 /* 232 * Idle loop, exercised while waiting for a process to wake up. 233 */ 234 /* LINTSTUB: Ignore */ 235 ASENTRY_NP(idle) 236 237 #if defined(LOCKDEBUG) 238 bl _C_LABEL(sched_unlock_idle) 239 #endif 240 /* Enable interrupts */ 241 IRQenable 242 243 ldr r3, Lcpufuncs 244 mov r0, #0 245 add lr, pc, #Lidle_slept - . - 8 246 ldr pc, [r3, #CF_SLEEP] 247 248 /* should also call the uvm pageidlezero stuff */ 249 250 Lidle_slept: 251 252 /* Disable interrupts while we check for an active queue */ 253 IRQdisable 254 #if defined(LOCKDEBUG) 255 bl _C_LABEL(sched_lock_idle) 256 #endif 257 ldr r7, Lwhichqs 258 ldr r3, [r7] 259 teq r3, #0x00000000 260 261 beq _ASM_LABEL(idle) 262 b Lidle_ret 263 264 /* 265 * Find a new process to run, save the current context and 266 * load the new context 267 */ 268 269 ENTRY(cpu_switch) 270 /* 271 * Local register usage. Some of these registers are out of date. 272 * r1 = oldproc 273 * r2 = spl level 274 * r3 = whichqs 275 * r4 = queue 276 * r5 = &qs[queue] 277 * r6 = newproc 278 * r7 = scratch 279 */ 280 stmfd sp!, {r4-r7, lr} 281 282 /* 283 * Get the current process and indicate that there is no longer 284 * a valid process (curproc = 0) 285 */ 286 ldr r7, Lcurproc 287 ldr r1, [r7] 288 mov r0, #0x00000000 289 str r0, [r7] 290 291 /* Zero the pcb */ 292 ldr r7, Lcurpcb 293 str r0, [r7] 294 295 /* stash the old proc while we call functions */ 296 mov r5, r1 297 298 #if defined(LOCKDEBUG) 299 /* release the sched_lock before handling interrupts */ 300 bl _C_LABEL(sched_unlock_idle) 301 #endif 302 303 /* Lower the spl level to spl0 and get the current spl level. */ 304 #ifdef __NEWINTR 305 mov r0, #(IPL_NONE) 306 bl _C_LABEL(_spllower) 307 #else /* ! __NEWINTR */ 308 #ifdef spl0 309 mov r0, #(_SPL_0) 310 bl _C_LABEL(splx) 311 #else 312 bl _C_LABEL(spl0) 313 #endif /* spl0 */ 314 #endif /* __NEWINTR */ 315 316 /* Push the old spl level onto the stack */ 317 str r0, [sp, #-0x0004]! 318 319 /* First phase : find a new process */ 320 321 /* rem: r5 = old proc */ 322 323 Lswitch_search: 324 IRQdisable 325 #if defined(LOCKDEBUG) 326 bl _C_LABEL(sched_lock_idle) 327 #endif 328 329 /* Do we have any active queues */ 330 ldr r7, Lwhichqs 331 ldr r3, [r7] 332 333 /* If not we must idle until we do. */ 334 teq r3, #0x00000000 335 beq _ASM_LABEL(idle) 336 Lidle_ret: 337 338 /* put old proc back in r1 */ 339 mov r1, r5 340 341 /* rem: r1 = old proc */ 342 /* rem: r3 = whichqs */ 343 /* rem: interrupts are disabled */ 344 345 /* 346 * We have found an active queue. Currently we do not know which queue 347 * is active just that one of them is. 348 */ 349 /* this is the ffs algorithm devised by d.seal and posted to 350 * comp.sys.arm on 16 Feb 1994. 351 */ 352 rsb r5, r3, #0 353 ands r0, r3, r5 354 355 adr r5, Lcpu_switch_ffs_table 356 357 /* X = R0 */ 358 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 359 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 360 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 361 362 /* used further down, saves SA stall */ 363 ldr r6, Lqs 364 365 /* now lookup in table indexed on top 6 bits of a4 */ 366 ldrb r4, [ r5, r4, lsr #26 ] 367 368 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 369 /* rem: r1 = old proc */ 370 /* rem: r3 = whichqs */ 371 /* rem: r4 = queue number */ 372 /* rem: interrupts are disabled */ 373 374 /* Get the address of the queue (&qs[queue]) */ 375 add r5, r6, r4, lsl #3 376 377 /* 378 * Get the process from the queue and place the next process in 379 * the queue at the head. This basically unlinks the process at 380 * the head of the queue. 381 */ 382 ldr r6, [r5, #(P_FORW)] 383 384 /* rem: r6 = new process */ 385 ldr r7, [r6, #(P_FORW)] 386 str r7, [r5, #(P_FORW)] 387 388 /* 389 * Test to see if the queue is now empty. If the head of the queue 390 * points to the queue itself then there are no more processes in 391 * the queue. We can therefore clear the queue not empty flag held 392 * in r3. 393 */ 394 395 teq r5, r7 396 biceq r3, r3, r0 397 398 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 399 400 /* Fix the back pointer for the process now at the head of the queue. */ 401 ldr r0, [r6, #(P_BACK)] 402 str r0, [r7, #(P_BACK)] 403 404 /* Update the RAM copy of the queue not empty flags word. */ 405 ldr r7, Lwhichqs 406 str r3, [r7] 407 408 /* rem: r1 = old proc */ 409 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 410 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 411 /* rem: r6 = new process */ 412 /* rem: interrupts are disabled */ 413 414 /* Clear the want_resched flag */ 415 ldr r7, Lwant_resched 416 mov r0, #0x00000000 417 str r0, [r7] 418 419 /* 420 * Clear the back pointer of the process we have removed from 421 * the head of the queue. The new process is isolated now. 422 */ 423 str r0, [r6, #(P_BACK)] 424 425 #if defined(LOCKDEBUG) 426 /* 427 * unlock the sched_lock, but leave interrupts off, for now. 428 */ 429 mov r7, r1 430 bl _C_LABEL(sched_unlock_idle) 431 mov r1, r7 432 #endif 433 434 /* p->p_cpu initialized in fork1() for single-processor */ 435 436 /* Process is now on a processor. */ 437 mov r0, #SONPROC /* p->p_stat = SONPROC */ 438 strb r0, [r6, #(P_STAT)] 439 440 /* We have a new curproc now so make a note it */ 441 ldr r7, Lcurproc 442 str r6, [r7] 443 444 /* Hook in a new pcb */ 445 ldr r7, Lcurpcb 446 ldr r0, [r6, #(P_ADDR)] 447 str r0, [r7] 448 449 /* At this point we can allow IRQ's again. */ 450 IRQenable 451 452 /* rem: r1 = old proc */ 453 /* rem: r6 = new process */ 454 /* rem: interrupts are enabled */ 455 456 /* 457 * If the new process is the same as the process that called 458 * cpu_switch() then we do not need to save and restore any 459 * contexts. This means we can make a quick exit. 460 * The test is simple if curproc on entry (now in r1) is the 461 * same as the proc removed from the queue we can jump to the exit. 462 */ 463 teq r1, r6 464 beq switch_return 465 466 /* Remember the old process in r0 */ 467 mov r0, r1 468 469 /* 470 * If the curproc on entry to cpu_switch was zero then the 471 * process that called it was exiting. This means that we do 472 * not need to save the current context. Instead we can jump 473 * straight to restoring the context for the new process. 474 */ 475 teq r0, #0x00000000 476 beq switch_exited 477 478 /* rem: r0 = old proc */ 479 /* rem: r6 = new process */ 480 /* rem: interrupts are enabled */ 481 482 /* Stage two : Save old context */ 483 484 /* Get the user structure for the old process. */ 485 ldr r1, [r0, #(P_ADDR)] 486 487 /* Save all the registers in the old process's pcb */ 488 add r7, r1, #(PCB_R8) 489 stmia r7, {r8-r13} 490 491 /* 492 * This can be optimised... We know we want to go from SVC32 493 * mode to UND32 mode 494 */ 495 mrs r3, cpsr_all 496 bic r2, r3, #(PSR_MODE) 497 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 498 msr cpsr_all, r2 499 500 str sp, [r1, #(PCB_UND_SP)] 501 502 msr cpsr_all, r3 /* Restore the old mode */ 503 504 /* rem: r0 = old proc */ 505 /* rem: r1 = old pcb */ 506 /* rem: r6 = new process */ 507 /* rem: interrupts are enabled */ 508 509 /* What else needs to be saved Only FPA stuff when that is supported */ 510 511 /* r1 now free! */ 512 513 /* Third phase : restore saved context */ 514 515 /* rem: r0 = old proc */ 516 /* rem: r6 = new process */ 517 /* rem: interrupts are enabled */ 518 519 /* 520 * Don't allow user space access between the purge and the switch. 521 */ 522 ldr r3, Lblock_userspace_access 523 mov r1, #0x00000001 524 mov r2, #0x00000000 525 str r1, [r3] 526 527 stmfd sp!, {r0-r3} 528 ldr r1, Lcpufuncs 529 add lr, pc, #Lcs_cache_purged - . - 8 530 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 531 532 Lcs_cache_purged: 533 ldmfd sp!, {r0-r3} 534 535 Lcs_cache_purge_skipped: 536 /* At this point we need to kill IRQ's again. */ 537 IRQdisable 538 539 /* 540 * Interrupts are disabled so we can allow user space accesses again 541 * as none will occur until interrupts are re-enabled after the 542 * switch. 543 */ 544 str r2, [r3] 545 546 /* Get the user structure for the new process in r1 */ 547 ldr r1, [r6, #(P_ADDR)] 548 549 /* Get the pagedir physical address for the process. */ 550 ldr r0, [r1, #(PCB_PAGEDIR)] 551 552 /* Switch the memory to the new process */ 553 ldr r3, Lcpufuncs 554 add lr, pc, #Lcs_context_switched - . - 8 555 ldr pc, [r3, #CF_CONTEXT_SWITCH] 556 557 Lcs_context_switched: 558 /* 559 * This can be optimised... We know we want to go from SVC32 560 * mode to UND32 mode 561 */ 562 mrs r3, cpsr_all 563 bic r2, r3, #(PSR_MODE) 564 orr r2, r2, #(PSR_UND32_MODE) 565 msr cpsr_all, r2 566 567 ldr sp, [r1, #(PCB_UND_SP)] 568 569 msr cpsr_all, r3 /* Restore the old mode */ 570 571 /* Restore all the save registers */ 572 add r7, r1, #PCB_R8 573 ldmia r7, {r8-r13} 574 575 #ifdef ARMFPE 576 add r0, r1, #(USER_SIZE) & 0x00ff 577 add r0, r0, #(USER_SIZE) & 0xff00 578 bl _C_LABEL(arm_fpe_core_changecontext) 579 #endif 580 581 /* We can enable interrupts again */ 582 IRQenable 583 584 switch_return: 585 586 /* Get the spl level from the stack and update the current spl level */ 587 ldr r0, [sp], #0x0004 588 bl _C_LABEL(splx) 589 590 /* cpu_switch returns the proc it switched to. */ 591 mov r0, r6 592 593 /* 594 * Pull the registers that got pushed when either savectx() or 595 * cpu_switch() was called and return. 596 */ 597 ldmfd sp!, {r4-r7, pc} 598 599 switch_exited: 600 /* 601 * We skip the cache purge because switch_exit() already did 602 * it. Load up registers the way Lcs_cache_purge_skipped 603 * expects. Userspace access already blocked in switch_exit(). 604 */ 605 ldr r3, Lblock_userspace_access 606 mov r2, #0x00000000 607 b Lcs_cache_purge_skipped 608 609 Lproc0: 610 .word _C_LABEL(proc0) 611 612 Lkernel_map: 613 .word _C_LABEL(kernel_map) 614 615 /* 616 * void switch_exit(struct proc *p, struct proc *p0); 617 * Switch to proc0's saved context and deallocate the address space and kernel 618 * stack for p. Then jump into cpu_switch(), as if we were in proc0 all along. 619 */ 620 621 /* LINTSTUB: Func: void switch_exit(struct proc *p, struct proc *p0) */ 622 ENTRY(switch_exit) 623 /* 624 * r0 = proc 625 * r1 = proc0 626 */ 627 628 mov r3, r0 629 630 /* In case we fault */ 631 ldr r0, Lcurproc 632 mov r2, #0x00000000 633 str r2, [r0] 634 635 /* ldr r0, Lcurpcb 636 str r2, [r0]*/ 637 638 /* 639 * Don't allow user space access between the purge and the switch. 640 */ 641 ldr r0, Lblock_userspace_access 642 mov r2, #0x00000001 643 str r2, [r0] 644 645 /* Switch to proc0 context */ 646 647 stmfd sp!, {r0-r3} 648 649 ldr r0, Lcpufuncs 650 add lr, pc, #Lse_cache_purged - . - 8 651 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 652 653 Lse_cache_purged: 654 ldmfd sp!, {r0-r3} 655 656 IRQdisable 657 658 ldr r2, [r1, #(P_ADDR)] 659 ldr r0, [r2, #(PCB_PAGEDIR)] 660 661 /* Switch the memory to the new process */ 662 ldr r4, Lcpufuncs 663 add lr, pc, #Lse_context_switched - . - 8 664 ldr pc, [r4, #CF_CONTEXT_SWITCH] 665 666 Lse_context_switched: 667 /* Restore all the save registers */ 668 add r7, r2, #PCB_R8 669 ldmia r7, {r8-r13} 670 671 /* This is not really needed ! */ 672 /* Yes it is for the su and fu routines */ 673 ldr r0, Lcurpcb 674 str r2, [r0] 675 676 IRQenable 677 678 /* str r3, [sp, #-0x0004]!*/ 679 680 /* 681 * Schedule the vmspace and stack to be freed. 682 */ 683 mov r0, r3 /* exit2(p) */ 684 bl _C_LABEL(exit2) 685 686 /* Paranoia */ 687 ldr r1, Lcurproc 688 mov r0, #0x00000000 689 str r0, [r1] 690 691 mov r5, #0x00000000 /* r5 = old proc = NULL */ 692 b Lswitch_search 693 694 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 695 ENTRY(savectx) 696 /* 697 * r0 = pcb 698 */ 699 700 /* Push registers.*/ 701 stmfd sp!, {r4-r7, lr} 702 703 /* Store all the registers in the process's pcb */ 704 add r2, r0, #(PCB_R8) 705 stmia r2, {r8-r13} 706 707 /* Pull the regs of the stack */ 708 ldmfd sp!, {r4-r7, pc} 709 710 ENTRY(proc_trampoline) 711 add lr, pc, #(trampoline_return - . - 8) 712 mov r0, r5 713 mov r1, sp 714 mov pc, r4 715 716 trampoline_return: 717 /* Kill irq's */ 718 mrs r0, cpsr_all 719 orr r0, r0, #(I32_bit) 720 msr cpsr_all, r0 721 722 PULLFRAME 723 724 movs pc, lr /* Exit */ 725 726 .type Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 727 Lcpu_switch_ffs_table: 728 /* same as ffs table but all nums are -1 from that */ 729 /* 0 1 2 3 4 5 6 7 */ 730 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 731 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 732 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 733 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 734 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 735 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 736 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 737 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 738 739 /* End of cpuswitch.S */ 740
Indexes created Wed Oct 22 06:10:02 GMT 2025