cpuswitch.S revision 1.14
1 /* $NetBSD: cpuswitch.S,v 1.14 2002/08/15 01:37:01 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 48 #include "assym.h" 49 #include <machine/param.h> 50 #include <machine/cpu.h> 51 #include <machine/frame.h> 52 #include <machine/asm.h> 53 54 #undef IRQdisable 55 #undef IRQenable 56 57 /* 58 * New experimental definitions of IRQdisable and IRQenable 59 * These keep FIQ's enabled since FIQ's are special. 60 */ 61 62 #define IRQdisable \ 63 mrs r14, cpsr ; \ 64 orr r14, r14, #(I32_bit) ; \ 65 msr cpsr_c, r14 ; \ 66 67 #define IRQenable \ 68 mrs r14, cpsr ; \ 69 bic r14, r14, #(I32_bit) ; \ 70 msr cpsr_c, r14 ; \ 71 72 /* 73 * setrunqueue() and remrunqueue() 74 * 75 * Functions to add and remove a process for the run queue. 76 */ 77 78 .text 79 80 Lwhichqs: 81 .word _C_LABEL(sched_whichqs) 82 83 Lqs: 84 .word _C_LABEL(sched_qs) 85 86 /* 87 * On entry 88 * r0 = process 89 */ 90 91 ENTRY(setrunqueue) 92 /* 93 * Local register usage 94 * r0 = process 95 * r1 = queue 96 * r2 = &qs[queue] and temp 97 * r3 = temp 98 * r12 = whichqs 99 */ 100 #ifdef DIAGNOSTIC 101 ldr r1, [r0, #(P_BACK)] 102 teq r1, #0x00000000 103 bne .Lsetrunqueue_erg 104 105 ldr r1, [r0, #(P_WCHAN)] 106 teq r1, #0x00000000 107 bne .Lsetrunqueue_erg 108 #endif 109 110 /* Get the priority of the queue */ 111 ldrb r1, [r0, #(P_PRIORITY)] 112 113 /* Indicate that there is a process on this queue */ 114 ldr r12, Lwhichqs 115 mov r1, r1, lsr #2 116 ldr r2, [r12] 117 mov r3, #0x00000001 118 mov r3, r3, lsl r1 119 orr r2, r2, r3 120 str r2, [r12] 121 122 /* Get the address of the queue */ 123 ldr r2, Lqs 124 add r1, r2, r1, lsl # 3 125 126 /* Hook the process in */ 127 str r1, [r0, #(P_FORW)] 128 ldr r2, [r1, #(P_BACK)] 129 130 str r0, [r1, #(P_BACK)] 131 #ifdef DIAGNOSTIC 132 teq r2, #0x00000000 133 beq .Lsetrunqueue_erg 134 #endif 135 str r0, [r2, #(P_FORW)] 136 str r2, [r0, #(P_BACK)] 137 138 mov pc, lr 139 140 #ifdef DIAGNOSTIC 141 .Lsetrunqueue_erg: 142 mov r2, r1 143 mov r1, r0 144 add r0, pc, #Ltext1 - . - 8 145 bl _C_LABEL(printf) 146 147 ldr r2, Lqs 148 ldr r1, [r2] 149 add r0, pc, #Ltext2 - . - 8 150 b _C_LABEL(panic) 151 152 Ltext1: 153 .asciz "setrunqueue : %08x %08x\n" 154 Ltext2: 155 .asciz "setrunqueue : [qs]=%08x qs=%08x\n" 156 .align 0 157 #endif 158 159 /* 160 * On entry 161 * r0 = process 162 */ 163 164 ENTRY(remrunqueue) 165 /* 166 * Local register usage 167 * r0 = oldproc 168 * r1 = queue 169 * r2 = &qs[queue] and scratch 170 * r3 = scratch 171 * r12 = whichqs 172 */ 173 174 /* Get the priority of the queue */ 175 ldrb r1, [r0, #(P_PRIORITY)] 176 mov r1, r1, lsr #2 177 178 /* Unhook the process */ 179 ldr r2, [r0, #(P_FORW)] 180 ldr r3, [r0, #(P_BACK)] 181 182 str r3, [r2, #(P_BACK)] 183 str r2, [r3, #(P_FORW)] 184 185 /* If the queue is now empty clear the queue not empty flag */ 186 teq r2, r3 187 188 /* This could be reworked to avoid the use of r4 */ 189 ldreq r12, Lwhichqs 190 moveq r3, #0x00000001 191 ldreq r2, [r12] 192 moveq r3, r3, lsl r1 193 biceq r2, r2, r3 194 streq r2, [r12] 195 196 /* Remove the back pointer for the process */ 197 mov r1, #0x00000000 198 str r1, [r0, #(P_BACK)] 199 200 mov pc, lr 201 202 203 /* 204 * cpuswitch() 205 * 206 * preforms a process context switch. 207 * This function has several entry points 208 */ 209 210 Lcurproc: 211 .word _C_LABEL(curproc) 212 213 Lcurpcb: 214 .word _C_LABEL(curpcb) 215 216 Lwant_resched: 217 .word _C_LABEL(want_resched) 218 219 Lcpufuncs: 220 .word _C_LABEL(cpufuncs) 221 222 .data 223 .global _C_LABEL(curpcb) 224 _C_LABEL(curpcb): 225 .word 0x00000000 226 .text 227 228 Lblock_userspace_access: 229 .word _C_LABEL(block_userspace_access) 230 231 /* 232 * Idle loop, exercised while waiting for a process to wake up. 233 */ 234 /* LINTSTUB: Ignore */ 235 ASENTRY_NP(idle) 236 237 #if defined(LOCKDEBUG) 238 bl _C_LABEL(sched_unlock_idle) 239 #endif 240 /* Enable interrupts */ 241 IRQenable 242 243 ldr r3, Lcpufuncs 244 mov r0, #0 245 add lr, pc, #.Lidle_slept - . - 8 246 ldr pc, [r3, #CF_SLEEP] 247 248 /* should also call the uvm pageidlezero stuff */ 249 250 .Lidle_slept: 251 252 /* Disable interrupts while we check for an active queue */ 253 IRQdisable 254 #if defined(LOCKDEBUG) 255 bl _C_LABEL(sched_lock_idle) 256 #endif 257 ldr r7, Lwhichqs 258 ldr r3, [r7] 259 teq r3, #0x00000000 260 261 beq _ASM_LABEL(idle) 262 b .Lidle_ret 263 264 /* 265 * Find a new process to run, save the current context and 266 * load the new context 267 */ 268 269 ENTRY(cpu_switch) 270 /* 271 * Local register usage. Some of these registers are out of date. 272 * r1 = oldproc 273 * r2 = spl level 274 * r3 = whichqs 275 * r4 = queue 276 * r5 = &qs[queue] 277 * r6 = newproc 278 * r7 = scratch 279 */ 280 stmfd sp!, {r4-r7, lr} 281 282 /* 283 * Get the current process and indicate that there is no longer 284 * a valid process (curproc = 0). Zero the current PCB pointer 285 * while we're at it. 286 */ 287 ldr r7, Lcurproc 288 ldr r6, Lcurpcb 289 mov r0, #0x00000000 290 ldr r1, [r7] /* r1 = curproc */ 291 str r0, [r7] /* curproc = NULL */ 292 str r0, [r6] /* curpcb = NULL */ 293 294 /* stash the old proc while we call functions */ 295 mov r5, r1 296 297 #if defined(LOCKDEBUG) 298 /* release the sched_lock before handling interrupts */ 299 bl _C_LABEL(sched_unlock_idle) 300 #endif 301 302 /* Lower the spl level to spl0 and get the current spl level. */ 303 #ifdef __NEWINTR 304 mov r0, #(IPL_NONE) 305 bl _C_LABEL(_spllower) 306 #else /* ! __NEWINTR */ 307 #ifdef spl0 308 mov r0, #(_SPL_0) 309 bl _C_LABEL(splx) 310 #else 311 bl _C_LABEL(spl0) 312 #endif /* spl0 */ 313 #endif /* __NEWINTR */ 314 315 /* Push the old spl level onto the stack */ 316 str r0, [sp, #-0x0004]! 317 318 /* First phase : find a new process */ 319 320 /* rem: r5 = old proc */ 321 322 .Lswitch_search: 323 IRQdisable 324 #if defined(LOCKDEBUG) 325 bl _C_LABEL(sched_lock_idle) 326 #endif 327 328 /* Do we have any active queues */ 329 ldr r7, Lwhichqs 330 ldr r3, [r7] 331 332 /* If not we must idle until we do. */ 333 teq r3, #0x00000000 334 beq _ASM_LABEL(idle) 335 .Lidle_ret: 336 337 /* put old proc back in r1 */ 338 mov r1, r5 339 340 /* rem: r1 = old proc */ 341 /* rem: r3 = whichqs */ 342 /* rem: interrupts are disabled */ 343 344 /* 345 * We have found an active queue. Currently we do not know which queue 346 * is active just that one of them is. 347 */ 348 /* this is the ffs algorithm devised by d.seal and posted to 349 * comp.sys.arm on 16 Feb 1994. 350 */ 351 rsb r5, r3, #0 352 ands r0, r3, r5 353 354 adr r5, Lcpu_switch_ffs_table 355 356 /* X = R0 */ 357 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 358 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 359 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 360 361 /* used further down, saves SA stall */ 362 ldr r6, Lqs 363 364 /* now lookup in table indexed on top 6 bits of a4 */ 365 ldrb r4, [ r5, r4, lsr #26 ] 366 367 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 368 /* rem: r1 = old proc */ 369 /* rem: r3 = whichqs */ 370 /* rem: r4 = queue number */ 371 /* rem: interrupts are disabled */ 372 373 /* Get the address of the queue (&qs[queue]) */ 374 add r5, r6, r4, lsl #3 375 376 /* 377 * Get the process from the queue and place the next process in 378 * the queue at the head. This basically unlinks the process at 379 * the head of the queue. 380 */ 381 ldr r6, [r5, #(P_FORW)] 382 383 /* rem: r6 = new process */ 384 ldr r7, [r6, #(P_FORW)] 385 str r7, [r5, #(P_FORW)] 386 387 /* 388 * Test to see if the queue is now empty. If the head of the queue 389 * points to the queue itself then there are no more processes in 390 * the queue. We can therefore clear the queue not empty flag held 391 * in r3. 392 */ 393 394 teq r5, r7 395 biceq r3, r3, r0 396 397 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 398 399 /* Fix the back pointer for the process now at the head of the queue. */ 400 ldr r0, [r6, #(P_BACK)] 401 str r0, [r7, #(P_BACK)] 402 403 /* Update the RAM copy of the queue not empty flags word. */ 404 ldr r7, Lwhichqs 405 str r3, [r7] 406 407 /* rem: r1 = old proc */ 408 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 409 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 410 /* rem: r6 = new process */ 411 /* rem: interrupts are disabled */ 412 413 /* Clear the want_resched flag */ 414 ldr r7, Lwant_resched 415 mov r0, #0x00000000 416 str r0, [r7] 417 418 /* 419 * Clear the back pointer of the process we have removed from 420 * the head of the queue. The new process is isolated now. 421 */ 422 str r0, [r6, #(P_BACK)] 423 424 #if defined(LOCKDEBUG) 425 /* 426 * unlock the sched_lock, but leave interrupts off, for now. 427 */ 428 mov r7, r1 429 bl _C_LABEL(sched_unlock_idle) 430 mov r1, r7 431 #endif 432 433 /* p->p_cpu initialized in fork1() for single-processor */ 434 435 /* Process is now on a processor. */ 436 mov r0, #SONPROC /* p->p_stat = SONPROC */ 437 strb r0, [r6, #(P_STAT)] 438 439 /* We have a new curproc now so make a note it */ 440 ldr r7, Lcurproc 441 str r6, [r7] 442 443 /* Hook in a new pcb */ 444 ldr r7, Lcurpcb 445 ldr r0, [r6, #(P_ADDR)] 446 str r0, [r7] 447 448 /* At this point we can allow IRQ's again. */ 449 IRQenable 450 451 /* rem: r1 = old proc */ 452 /* rem: r6 = new process */ 453 /* rem: interrupts are enabled */ 454 455 /* 456 * If the new process is the same as the process that called 457 * cpu_switch() then we do not need to save and restore any 458 * contexts. This means we can make a quick exit. 459 * The test is simple if curproc on entry (now in r1) is the 460 * same as the proc removed from the queue we can jump to the exit. 461 */ 462 teq r1, r6 463 beq .Lswitch_return 464 465 /* Remember the old process in r0 */ 466 mov r0, r1 467 468 /* 469 * If the curproc on entry to cpu_switch was zero then the 470 * process that called it was exiting. This means that we do 471 * not need to save the current context. Instead we can jump 472 * straight to restoring the context for the new process. 473 */ 474 teq r0, #0x00000000 475 beq .Lswitch_exited 476 477 /* rem: r0 = old proc */ 478 /* rem: r6 = new process */ 479 /* rem: interrupts are enabled */ 480 481 /* Stage two : Save old context */ 482 483 /* Get the user structure for the old process. */ 484 ldr r1, [r0, #(P_ADDR)] 485 486 /* Save all the registers in the old process's pcb */ 487 add r7, r1, #(PCB_R8) 488 stmia r7, {r8-r13} 489 490 /* 491 * This can be optimised... We know we want to go from SVC32 492 * mode to UND32 mode 493 */ 494 mrs r3, cpsr 495 bic r2, r3, #(PSR_MODE) 496 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 497 msr cpsr_c, r2 498 499 str sp, [r1, #(PCB_UND_SP)] 500 501 msr cpsr_c, r3 /* Restore the old mode */ 502 503 /* rem: r0 = old proc */ 504 /* rem: r1 = old pcb */ 505 /* rem: r6 = new process */ 506 /* rem: interrupts are enabled */ 507 508 /* What else needs to be saved Only FPA stuff when that is supported */ 509 510 /* r1 now free! */ 511 512 /* Third phase : restore saved context */ 513 514 /* rem: r0 = old proc */ 515 /* rem: r6 = new process */ 516 /* rem: interrupts are enabled */ 517 518 /* 519 * Don't allow user space access between the purge and the switch. 520 */ 521 ldr r3, Lblock_userspace_access 522 mov r1, #0x00000001 523 mov r2, #0x00000000 524 str r1, [r3] 525 526 stmfd sp!, {r0-r3} 527 ldr r1, Lcpufuncs 528 add lr, pc, #.Lcs_cache_purged - . - 8 529 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 530 531 .Lcs_cache_purged: 532 ldmfd sp!, {r0-r3} 533 534 .Lcs_cache_purge_skipped: 535 /* At this point we need to kill IRQ's again. */ 536 IRQdisable 537 538 /* 539 * Interrupts are disabled so we can allow user space accesses again 540 * as none will occur until interrupts are re-enabled after the 541 * switch. 542 */ 543 str r2, [r3] 544 545 /* Get the user structure for the new process in r1 */ 546 ldr r1, [r6, #(P_ADDR)] 547 548 /* Get the pagedir physical address for the process. */ 549 ldr r0, [r1, #(PCB_PAGEDIR)] 550 551 /* Switch the memory to the new process */ 552 ldr r3, Lcpufuncs 553 add lr, pc, #.Lcs_context_switched - . - 8 554 ldr pc, [r3, #CF_CONTEXT_SWITCH] 555 556 .Lcs_context_switched: 557 /* 558 * This can be optimised... We know we want to go from SVC32 559 * mode to UND32 mode 560 */ 561 mrs r3, cpsr 562 bic r2, r3, #(PSR_MODE) 563 orr r2, r2, #(PSR_UND32_MODE) 564 msr cpsr_c, r2 565 566 ldr sp, [r1, #(PCB_UND_SP)] 567 568 msr cpsr_c, r3 /* Restore the old mode */ 569 570 /* Restore all the save registers */ 571 add r7, r1, #PCB_R8 572 ldmia r7, {r8-r13} 573 574 #ifdef ARMFPE 575 add r0, r1, #(USER_SIZE) & 0x00ff 576 add r0, r0, #(USER_SIZE) & 0xff00 577 bl _C_LABEL(arm_fpe_core_changecontext) 578 #endif 579 580 /* We can enable interrupts again */ 581 IRQenable 582 583 .Lswitch_return: 584 585 /* Get the spl level from the stack and update the current spl level */ 586 ldr r0, [sp], #0x0004 587 bl _C_LABEL(splx) 588 589 /* cpu_switch returns the proc it switched to. */ 590 mov r0, r6 591 592 /* 593 * Pull the registers that got pushed when either savectx() or 594 * cpu_switch() was called and return. 595 */ 596 ldmfd sp!, {r4-r7, pc} 597 598 .Lswitch_exited: 599 /* 600 * We skip the cache purge because switch_exit() already did 601 * it. Load up registers the way Lcs_cache_purge_skipped 602 * expects. Userspace access already blocked in switch_exit(). 603 */ 604 ldr r3, Lblock_userspace_access 605 mov r2, #0x00000000 606 b .Lcs_cache_purge_skipped 607 608 Lproc0: 609 .word _C_LABEL(proc0) 610 611 Lkernel_map: 612 .word _C_LABEL(kernel_map) 613 614 /* 615 * void switch_exit(struct proc *p, struct proc *p0); 616 * Switch to proc0's saved context and deallocate the address space and kernel 617 * stack for p. Then jump into cpu_switch(), as if we were in proc0 all along. 618 */ 619 620 /* LINTSTUB: Func: void switch_exit(struct proc *p, struct proc *p0) */ 621 ENTRY(switch_exit) 622 /* 623 * r0 = proc 624 * r1 = proc0 625 */ 626 627 mov r3, r0 628 629 /* In case we fault */ 630 ldr r0, Lcurproc 631 mov r2, #0x00000000 632 str r2, [r0] 633 634 /* ldr r0, Lcurpcb 635 str r2, [r0]*/ 636 637 /* 638 * Don't allow user space access between the purge and the switch. 639 */ 640 ldr r0, Lblock_userspace_access 641 mov r2, #0x00000001 642 str r2, [r0] 643 644 /* Switch to proc0 context */ 645 646 stmfd sp!, {r0-r3} 647 648 ldr r0, Lcpufuncs 649 add lr, pc, #.Lse_cache_purged - . - 8 650 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 651 652 .Lse_cache_purged: 653 ldmfd sp!, {r0-r3} 654 655 IRQdisable 656 657 ldr r2, [r1, #(P_ADDR)] 658 ldr r0, [r2, #(PCB_PAGEDIR)] 659 660 /* Switch the memory to the new process */ 661 ldr r4, Lcpufuncs 662 add lr, pc, #.Lse_context_switched - . - 8 663 ldr pc, [r4, #CF_CONTEXT_SWITCH] 664 665 .Lse_context_switched: 666 /* Restore all the save registers */ 667 add r7, r2, #PCB_R8 668 ldmia r7, {r8-r13} 669 670 /* This is not really needed ! */ 671 /* Yes it is for the su and fu routines */ 672 ldr r0, Lcurpcb 673 str r2, [r0] 674 675 IRQenable 676 677 /* str r3, [sp, #-0x0004]!*/ 678 679 /* 680 * Schedule the vmspace and stack to be freed. 681 */ 682 mov r0, r3 /* exit2(p) */ 683 bl _C_LABEL(exit2) 684 685 /* Paranoia */ 686 ldr r1, Lcurproc 687 mov r0, #0x00000000 688 str r0, [r1] 689 690 mov r5, #0x00000000 /* r5 = old proc = NULL */ 691 b .Lswitch_search 692 693 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 694 ENTRY(savectx) 695 /* 696 * r0 = pcb 697 */ 698 699 /* Push registers.*/ 700 stmfd sp!, {r4-r7, lr} 701 702 /* Store all the registers in the process's pcb */ 703 add r2, r0, #(PCB_R8) 704 stmia r2, {r8-r13} 705 706 /* Pull the regs of the stack */ 707 ldmfd sp!, {r4-r7, pc} 708 709 ENTRY(proc_trampoline) 710 add lr, pc, #(.Ltrampoline_return - . - 8) 711 mov r0, r5 712 mov r1, sp 713 mov pc, r4 714 715 .Ltrampoline_return: 716 /* Kill irq's */ 717 mrs r0, cpsr 718 orr r0, r0, #(I32_bit) 719 msr cpsr_c, r0 720 721 PULLFRAME 722 723 movs pc, lr /* Exit */ 724 725 .type Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 726 Lcpu_switch_ffs_table: 727 /* same as ffs table but all nums are -1 from that */ 728 /* 0 1 2 3 4 5 6 7 */ 729 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 730 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 731 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 732 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 733 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 734 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 735 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 736 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 737 738 /* End of cpuswitch.S */ 739
Indexes created Wed Oct 22 00:09:40 GMT 2025