cpuswitch.S revision 1.21
1 /* $NetBSD: cpuswitch.S,v 1.21 2002/10/09 22:28:03 bjh21 Exp $ */ 2 3 /* 4 * Copyright (c) 1994-1998 Mark Brinicombe. 5 * Copyright (c) 1994 Brini. 6 * All rights reserved. 7 * 8 * This code is derived from software written for Brini by Mark Brinicombe 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by Brini. 21 * 4. The name of the company nor the name of the author may be used to 22 * endorse or promote products derived from this software without specific 23 * prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED 26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 35 * SUCH DAMAGE. 36 * 37 * RiscBSD kernel project 38 * 39 * cpuswitch.S 40 * 41 * cpu switching functions 42 * 43 * Created : 15/10/94 44 */ 45 46 #include "opt_armfpe.h" 47 #include "opt_multiprocessor.h" 48 49 #include "assym.h" 50 #include <machine/param.h> 51 #include <machine/cpu.h> 52 #include <machine/frame.h> 53 #include <machine/asm.h> 54 55 #undef IRQdisable 56 #undef IRQenable 57 58 /* 59 * New experimental definitions of IRQdisable and IRQenable 60 * These keep FIQ's enabled since FIQ's are special. 61 */ 62 63 #define IRQdisable \ 64 mrs r14, cpsr ; \ 65 orr r14, r14, #(I32_bit) ; \ 66 msr cpsr_c, r14 ; \ 67 68 #define IRQenable \ 69 mrs r14, cpsr ; \ 70 bic r14, r14, #(I32_bit) ; \ 71 msr cpsr_c, r14 ; \ 72 73 /* 74 * setrunqueue() and remrunqueue() 75 * 76 * Functions to add and remove a process for the run queue. 77 */ 78 79 .text 80 81 .Lwhichqs: 82 .word _C_LABEL(sched_whichqs) 83 84 .Lqs: 85 .word _C_LABEL(sched_qs) 86 87 /* 88 * On entry 89 * r0 = process 90 */ 91 92 ENTRY(setrunqueue) 93 /* 94 * Local register usage 95 * r0 = process 96 * r1 = queue 97 * r2 = &qs[queue] and temp 98 * r3 = temp 99 * r12 = whichqs 100 */ 101 #ifdef DIAGNOSTIC 102 ldr r1, [r0, #(P_BACK)] 103 teq r1, #0x00000000 104 bne .Lsetrunqueue_erg 105 106 ldr r1, [r0, #(P_WCHAN)] 107 teq r1, #0x00000000 108 bne .Lsetrunqueue_erg 109 #endif 110 111 /* Get the priority of the queue */ 112 ldrb r1, [r0, #(P_PRIORITY)] 113 114 /* Indicate that there is a process on this queue */ 115 ldr r12, .Lwhichqs 116 mov r1, r1, lsr #2 117 ldr r2, [r12] 118 mov r3, #0x00000001 119 mov r3, r3, lsl r1 120 orr r2, r2, r3 121 str r2, [r12] 122 123 /* Get the address of the queue */ 124 ldr r2, .Lqs 125 add r1, r2, r1, lsl # 3 126 127 /* Hook the process in */ 128 str r1, [r0, #(P_FORW)] 129 ldr r2, [r1, #(P_BACK)] 130 131 str r0, [r1, #(P_BACK)] 132 #ifdef DIAGNOSTIC 133 teq r2, #0x00000000 134 beq .Lsetrunqueue_erg 135 #endif 136 str r0, [r2, #(P_FORW)] 137 str r2, [r0, #(P_BACK)] 138 139 mov pc, lr 140 141 #ifdef DIAGNOSTIC 142 .Lsetrunqueue_erg: 143 mov r2, r1 144 mov r1, r0 145 add r0, pc, #.Ltext1 - . - 8 146 bl _C_LABEL(printf) 147 148 ldr r2, .Lqs 149 ldr r1, [r2] 150 add r0, pc, #.Ltext2 - . - 8 151 b _C_LABEL(panic) 152 153 .Ltext1: 154 .asciz "setrunqueue : %08x %08x\n" 155 .Ltext2: 156 .asciz "setrunqueue : [qs]=%08x qs=%08x\n" 157 .align 0 158 #endif 159 160 /* 161 * On entry 162 * r0 = process 163 */ 164 165 ENTRY(remrunqueue) 166 /* 167 * Local register usage 168 * r0 = oldproc 169 * r1 = queue 170 * r2 = &qs[queue] and scratch 171 * r3 = scratch 172 * r12 = whichqs 173 */ 174 175 /* Get the priority of the queue */ 176 ldrb r1, [r0, #(P_PRIORITY)] 177 mov r1, r1, lsr #2 178 179 /* Unhook the process */ 180 ldr r2, [r0, #(P_FORW)] 181 ldr r3, [r0, #(P_BACK)] 182 183 str r3, [r2, #(P_BACK)] 184 str r2, [r3, #(P_FORW)] 185 186 /* If the queue is now empty clear the queue not empty flag */ 187 teq r2, r3 188 189 /* This could be reworked to avoid the use of r4 */ 190 ldreq r12, .Lwhichqs 191 moveq r3, #0x00000001 192 ldreq r2, [r12] 193 moveq r3, r3, lsl r1 194 biceq r2, r2, r3 195 streq r2, [r12] 196 197 /* Remove the back pointer for the process */ 198 mov r1, #0x00000000 199 str r1, [r0, #(P_BACK)] 200 201 mov pc, lr 202 203 204 /* 205 * cpuswitch() 206 * 207 * preforms a process context switch. 208 * This function has several entry points 209 */ 210 211 #ifdef MULTIPROCESSOR 212 .Lcpu_info_store: 213 .word _C_LABEL(cpu_info_store) 214 .Lcurproc: 215 /* FIXME: This is bogus in the general case. */ 216 .word _C_LABEL(cpu_info_store) + CI_CURPROC 217 #else 218 .Lcurproc: 219 .word _C_LABEL(curproc) 220 #endif 221 222 .Lcurpcb: 223 .word _C_LABEL(curpcb) 224 225 .Lwant_resched: 226 .word _C_LABEL(want_resched) 227 228 .Lcpufuncs: 229 .word _C_LABEL(cpufuncs) 230 231 .data 232 .global _C_LABEL(curpcb) 233 _C_LABEL(curpcb): 234 .word 0x00000000 235 .text 236 237 .Lblock_userspace_access: 238 .word _C_LABEL(block_userspace_access) 239 240 .Lcpu_do_powersave: 241 .word _C_LABEL(cpu_do_powersave) 242 243 /* 244 * Idle loop, exercised while waiting for a process to wake up. 245 * 246 * NOTE: When we jump back to .Lswitch_search, we must have a 247 * pointer to whichqs in r7, which is what it is when we arrive 248 * here. 249 */ 250 /* LINTSTUB: Ignore */ 251 ASENTRY_NP(idle) 252 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 253 bl _C_LABEL(sched_unlock_idle) 254 #endif 255 ldr r3, .Lcpu_do_powersave 256 257 /* Enable interrupts */ 258 IRQenable 259 260 /* If we don't want to sleep, use a simpler loop. */ 261 ldr r3, [r3] /* r3 = cpu_do_powersave */ 262 teq r3, #0 263 bne 2f 264 265 /* Non-powersave idle. */ 266 1: /* should maybe do uvm pageidlezero stuff here */ 267 ldr r3, [r7] /* r3 = whichqs */ 268 teq r3, #0x00000000 269 bne .Lswitch_search 270 b 1b 271 272 2: /* Powersave idle. */ 273 ldr r4, .Lcpufuncs 274 3: ldr r3, [r7] /* r3 = whichqs */ 275 teq r3, #0x00000000 276 bne .Lswitch_search 277 278 /* if saving power, don't want to pageidlezero */ 279 mov r0, #0 280 adr lr, 3b 281 ldr pc, [r4, #(CF_SLEEP)] 282 /* loops back around */ 283 284 285 /* 286 * Find a new process to run, save the current context and 287 * load the new context 288 */ 289 290 ENTRY(cpu_switch) 291 /* 292 * Local register usage. Some of these registers are out of date. 293 * r1 = oldproc 294 * r3 = whichqs 295 * r4 = queue 296 * r5 = &qs[queue] 297 * r6 = newproc 298 * r7 = scratch 299 */ 300 stmfd sp!, {r4-r7, lr} 301 302 /* 303 * Get the current process and indicate that there is no longer 304 * a valid process (curproc = 0). Zero the current PCB pointer 305 * while we're at it. 306 */ 307 ldr r7, .Lcurproc 308 ldr r6, .Lcurpcb 309 mov r0, #0x00000000 310 ldr r1, [r7] /* r1 = curproc */ 311 str r0, [r7] /* curproc = NULL */ 312 str r0, [r6] /* curpcb = NULL */ 313 314 /* stash the old proc while we call functions */ 315 mov r5, r1 316 317 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 318 /* release the sched_lock before handling interrupts */ 319 bl _C_LABEL(sched_unlock_idle) 320 #endif 321 322 /* Lower the spl level to spl0 and get the current spl level. */ 323 #ifdef __NEWINTR 324 mov r0, #(IPL_NONE) 325 bl _C_LABEL(_spllower) 326 #else /* ! __NEWINTR */ 327 #ifdef spl0 328 mov r0, #(_SPL_0) 329 bl _C_LABEL(splx) 330 #else 331 bl _C_LABEL(spl0) 332 #endif /* spl0 */ 333 #endif /* __NEWINTR */ 334 335 /* Push the old spl level onto the stack */ 336 str r0, [sp, #-0x0004]! 337 338 /* First phase : find a new process */ 339 340 ldr r7, .Lwhichqs 341 342 /* rem: r5 = old proc */ 343 /* rem: r7 = &whichqs */ 344 345 .Lswitch_search: 346 IRQdisable 347 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 348 bl _C_LABEL(sched_lock_idle) 349 #endif 350 351 /* Do we have any active queues */ 352 ldr r3, [r7] 353 354 /* If not we must idle until we do. */ 355 teq r3, #0x00000000 356 beq _ASM_LABEL(idle) 357 358 /* put old proc back in r1 */ 359 mov r1, r5 360 361 /* rem: r1 = old proc */ 362 /* rem: r3 = whichqs */ 363 /* rem: interrupts are disabled */ 364 365 /* 366 * We have found an active queue. Currently we do not know which queue 367 * is active just that one of them is. 368 */ 369 /* this is the ffs algorithm devised by d.seal and posted to 370 * comp.sys.arm on 16 Feb 1994. 371 */ 372 rsb r5, r3, #0 373 ands r0, r3, r5 374 375 adr r5, .Lcpu_switch_ffs_table 376 377 /* X = R0 */ 378 orr r4, r0, r0, lsl #4 /* r4 = X * 0x11 */ 379 orr r4, r4, r4, lsl #6 /* r4 = X * 0x451 */ 380 rsb r4, r4, r4, lsl #16 /* r4 = X * 0x0450fbaf */ 381 382 /* used further down, saves SA stall */ 383 ldr r6, .Lqs 384 385 /* now lookup in table indexed on top 6 bits of a4 */ 386 ldrb r4, [ r5, r4, lsr #26 ] 387 388 /* rem: r0 = bit mask of chosen queue (1 << r4) */ 389 /* rem: r1 = old proc */ 390 /* rem: r3 = whichqs */ 391 /* rem: r4 = queue number */ 392 /* rem: interrupts are disabled */ 393 394 /* Get the address of the queue (&qs[queue]) */ 395 add r5, r6, r4, lsl #3 396 397 /* 398 * Get the process from the queue and place the next process in 399 * the queue at the head. This basically unlinks the process at 400 * the head of the queue. 401 */ 402 ldr r6, [r5, #(P_FORW)] 403 404 /* rem: r6 = new process */ 405 ldr r7, [r6, #(P_FORW)] 406 str r7, [r5, #(P_FORW)] 407 408 /* 409 * Test to see if the queue is now empty. If the head of the queue 410 * points to the queue itself then there are no more processes in 411 * the queue. We can therefore clear the queue not empty flag held 412 * in r3. 413 */ 414 415 teq r5, r7 416 biceq r3, r3, r0 417 418 /* rem: r0 = bit mask of chosen queue (1 << r4) - NOT NEEDED AN MORE */ 419 420 /* Fix the back pointer for the process now at the head of the queue. */ 421 ldr r0, [r6, #(P_BACK)] 422 str r0, [r7, #(P_BACK)] 423 424 /* Update the RAM copy of the queue not empty flags word. */ 425 ldr r7, .Lwhichqs 426 str r3, [r7] 427 428 /* rem: r1 = old proc */ 429 /* rem: r3 = whichqs - NOT NEEDED ANY MORE */ 430 /* rem: r4 = queue number - NOT NEEDED ANY MORE */ 431 /* rem: r6 = new process */ 432 /* rem: interrupts are disabled */ 433 434 /* Clear the want_resched flag */ 435 ldr r7, .Lwant_resched 436 mov r0, #0x00000000 437 str r0, [r7] 438 439 /* 440 * Clear the back pointer of the process we have removed from 441 * the head of the queue. The new process is isolated now. 442 */ 443 str r0, [r6, #(P_BACK)] 444 445 #if defined(MULTIPROCESSOR) || defined(LOCKDEBUG) 446 /* 447 * unlock the sched_lock, but leave interrupts off, for now. 448 */ 449 mov r7, r1 450 bl _C_LABEL(sched_unlock_idle) 451 mov r1, r7 452 #endif 453 454 #ifdef MULTIPROCESSOR 455 /* XXX use curcpu() */ 456 ldr r0, .Lcpu_info_store 457 str r0, [r6, #(P_CPU)] 458 #else 459 /* p->p_cpu initialized in fork1() for single-processor */ 460 #endif 461 462 /* Process is now on a processor. */ 463 mov r0, #SONPROC /* p->p_stat = SONPROC */ 464 strb r0, [r6, #(P_STAT)] 465 466 /* We have a new curproc now so make a note it */ 467 ldr r7, .Lcurproc 468 str r6, [r7] 469 470 /* Hook in a new pcb */ 471 ldr r7, .Lcurpcb 472 ldr r0, [r6, #(P_ADDR)] 473 str r0, [r7] 474 475 /* At this point we can allow IRQ's again. */ 476 IRQenable 477 478 /* rem: r1 = old proc */ 479 /* rem: r6 = new process */ 480 /* rem: interrupts are enabled */ 481 482 /* 483 * If the new process is the same as the process that called 484 * cpu_switch() then we do not need to save and restore any 485 * contexts. This means we can make a quick exit. 486 * The test is simple if curproc on entry (now in r1) is the 487 * same as the proc removed from the queue we can jump to the exit. 488 */ 489 teq r1, r6 490 beq .Lswitch_return 491 492 /* Remember the old process in r0 */ 493 mov r0, r1 494 495 /* 496 * If the curproc on entry to cpu_switch was zero then the 497 * process that called it was exiting. This means that we do 498 * not need to save the current context. Instead we can jump 499 * straight to restoring the context for the new process. 500 */ 501 teq r0, #0x00000000 502 beq .Lswitch_exited 503 504 /* rem: r0 = old proc */ 505 /* rem: r6 = new process */ 506 /* rem: interrupts are enabled */ 507 508 /* Stage two : Save old context */ 509 510 /* Get the user structure for the old process. */ 511 ldr r1, [r0, #(P_ADDR)] 512 513 /* Save all the registers in the old process's pcb */ 514 add r7, r1, #(PCB_R8) 515 stmia r7, {r8-r13} 516 517 /* 518 * This can be optimised... We know we want to go from SVC32 519 * mode to UND32 mode 520 */ 521 mrs r3, cpsr 522 bic r2, r3, #(PSR_MODE) 523 orr r2, r2, #(PSR_UND32_MODE | I32_bit) 524 msr cpsr_c, r2 525 526 str sp, [r1, #(PCB_UND_SP)] 527 528 msr cpsr_c, r3 /* Restore the old mode */ 529 530 /* rem: r0 = old proc */ 531 /* rem: r1 = old pcb */ 532 /* rem: r6 = new process */ 533 /* rem: interrupts are enabled */ 534 535 /* What else needs to be saved Only FPA stuff when that is supported */ 536 537 /* r1 now free! */ 538 539 /* Third phase : restore saved context */ 540 541 /* rem: r0 = old proc */ 542 /* rem: r6 = new process */ 543 /* rem: interrupts are enabled */ 544 545 /* 546 * Don't allow user space access between the purge and the switch. 547 */ 548 ldr r3, .Lblock_userspace_access 549 mov r1, #0x00000001 550 mov r2, #0x00000000 551 str r1, [r3] 552 553 stmfd sp!, {r0-r3} 554 ldr r1, .Lcpufuncs 555 add lr, pc, #.Lcs_cache_purged - . - 8 556 ldr pc, [r1, #CF_IDCACHE_WBINV_ALL] 557 558 .Lcs_cache_purged: 559 ldmfd sp!, {r0-r3} 560 561 .Lcs_cache_purge_skipped: 562 /* At this point we need to kill IRQ's again. */ 563 IRQdisable 564 565 /* 566 * Interrupts are disabled so we can allow user space accesses again 567 * as none will occur until interrupts are re-enabled after the 568 * switch. 569 */ 570 str r2, [r3] 571 572 /* Get the user structure for the new process in r1 */ 573 ldr r1, [r6, #(P_ADDR)] 574 575 /* Get the pagedir physical address for the process. */ 576 ldr r0, [r1, #(PCB_PAGEDIR)] 577 578 /* Switch the memory to the new process */ 579 ldr r3, .Lcpufuncs 580 add lr, pc, #.Lcs_context_switched - . - 8 581 ldr pc, [r3, #CF_CONTEXT_SWITCH] 582 583 .Lcs_context_switched: 584 /* 585 * This can be optimised... We know we want to go from SVC32 586 * mode to UND32 mode 587 */ 588 mrs r3, cpsr 589 bic r2, r3, #(PSR_MODE) 590 orr r2, r2, #(PSR_UND32_MODE) 591 msr cpsr_c, r2 592 593 ldr sp, [r1, #(PCB_UND_SP)] 594 595 msr cpsr_c, r3 /* Restore the old mode */ 596 597 /* Restore all the save registers */ 598 add r7, r1, #PCB_R8 599 ldmia r7, {r8-r13} 600 601 mov r7, r1 /* preserve PCB pointer */ 602 603 #ifdef ARMFPE 604 add r0, r1, #(USER_SIZE) & 0x00ff 605 add r0, r0, #(USER_SIZE) & 0xff00 606 bl _C_LABEL(arm_fpe_core_changecontext) 607 #endif 608 609 /* We can enable interrupts again */ 610 IRQenable 611 612 /* rem: r6 = new proc */ 613 /* rem: r7 = new PCB */ 614 615 /* 616 * Check for restartable atomic sequences (RAS). 617 */ 618 619 ldr r2, [r6, #(P_NRAS)] 620 ldr r4, [r7, #(PCB_TF)] /* r4 = trapframe (used below) */ 621 teq r2, #0 /* p->p_nras == 0? */ 622 bne .Lswitch_do_ras /* no, check for one */ 623 624 .Lswitch_return: 625 626 /* Get the spl level from the stack and update the current spl level */ 627 ldr r0, [sp], #0x0004 628 bl _C_LABEL(splx) 629 630 /* cpu_switch returns the proc it switched to. */ 631 mov r0, r6 632 633 /* 634 * Pull the registers that got pushed when either savectx() or 635 * cpu_switch() was called and return. 636 */ 637 ldmfd sp!, {r4-r7, pc} 638 639 .Lswitch_do_ras: 640 ldr r1, [r4, #(TF_PC)] /* second ras_lookup() arg */ 641 mov r0, r6 /* first ras_lookup() arg */ 642 bl _C_LABEL(ras_lookup) 643 cmn r0, #1 /* -1 means "not in a RAS" */ 644 strne r0, [r4, #(TF_PC)] 645 b .Lswitch_return 646 647 .Lswitch_exited: 648 /* 649 * We skip the cache purge because switch_exit() already did 650 * it. Load up registers the way Lcs_cache_purge_skipped 651 * expects. Userspace access already blocked in switch_exit(). 652 */ 653 ldr r3, .Lblock_userspace_access 654 mov r2, #0x00000000 655 b .Lcs_cache_purge_skipped 656 657 /* 658 * void switch_exit(struct proc *p, struct proc *p0); 659 * Switch to proc0's saved context and deallocate the address space and kernel 660 * stack for p. Then jump into cpu_switch(), as if we were in proc0 all along. 661 */ 662 663 /* LINTSTUB: Func: void switch_exit(struct proc *p, struct proc *p0) */ 664 ENTRY(switch_exit) 665 /* 666 * r0 = proc 667 * r1 = proc0 668 */ 669 670 mov r3, r0 671 672 /* In case we fault */ 673 ldr r0, .Lcurproc 674 mov r2, #0x00000000 675 str r2, [r0] 676 677 /* ldr r0, .Lcurpcb 678 str r2, [r0]*/ 679 680 /* 681 * Don't allow user space access between the purge and the switch. 682 */ 683 ldr r0, .Lblock_userspace_access 684 mov r2, #0x00000001 685 str r2, [r0] 686 687 /* Switch to proc0 context */ 688 689 stmfd sp!, {r0-r3} 690 691 ldr r0, .Lcpufuncs 692 add lr, pc, #.Lse_cache_purged - . - 8 693 ldr pc, [r0, #CF_IDCACHE_WBINV_ALL] 694 695 .Lse_cache_purged: 696 ldmfd sp!, {r0-r3} 697 698 IRQdisable 699 700 ldr r2, [r1, #(P_ADDR)] 701 ldr r0, [r2, #(PCB_PAGEDIR)] 702 703 /* Switch the memory to the new process */ 704 ldr r4, .Lcpufuncs 705 add lr, pc, #.Lse_context_switched - . - 8 706 ldr pc, [r4, #CF_CONTEXT_SWITCH] 707 708 .Lse_context_switched: 709 /* Restore all the save registers */ 710 add r7, r2, #PCB_R8 711 ldmia r7, {r8-r13} 712 713 /* This is not really needed ! */ 714 /* Yes it is for the su and fu routines */ 715 ldr r0, .Lcurpcb 716 str r2, [r0] 717 718 IRQenable 719 720 /* str r3, [sp, #-0x0004]!*/ 721 722 /* 723 * Schedule the vmspace and stack to be freed. 724 */ 725 mov r0, r3 /* exit2(p) */ 726 bl _C_LABEL(exit2) 727 728 /* Paranoia */ 729 ldr r1, .Lcurproc 730 mov r0, #0x00000000 731 str r0, [r1] 732 733 ldr r7, .Lwhichqs /* r7 = &whichqs */ 734 mov r5, #0x00000000 /* r5 = old proc = NULL */ 735 b .Lswitch_search 736 737 /* LINTSTUB: Func: void savectx(struct pcb *pcb) */ 738 ENTRY(savectx) 739 /* 740 * r0 = pcb 741 */ 742 743 /* Push registers.*/ 744 stmfd sp!, {r4-r7, lr} 745 746 /* Store all the registers in the process's pcb */ 747 add r2, r0, #(PCB_R8) 748 stmia r2, {r8-r13} 749 750 /* Pull the regs of the stack */ 751 ldmfd sp!, {r4-r7, pc} 752 753 ENTRY(proc_trampoline) 754 #ifdef MULTIPROCESSOR 755 bl _C_LABEL(proc_trampoline_mp) 756 #endif 757 add lr, pc, #(.Ltrampoline_return - . - 8) 758 mov r0, r5 759 mov r1, sp 760 mov pc, r4 761 762 .Ltrampoline_return: 763 /* Kill irq's */ 764 mrs r0, cpsr 765 orr r0, r0, #(I32_bit) 766 msr cpsr_c, r0 767 768 PULLFRAME 769 770 movs pc, lr /* Exit */ 771 772 .type .Lcpu_switch_ffs_table, _ASM_TYPE_OBJECT; 773 .Lcpu_switch_ffs_table: 774 /* same as ffs table but all nums are -1 from that */ 775 /* 0 1 2 3 4 5 6 7 */ 776 .byte 0, 0, 1, 12, 2, 6, 0, 13 /* 0- 7 */ 777 .byte 3, 0, 7, 0, 0, 0, 0, 14 /* 8-15 */ 778 .byte 10, 4, 0, 0, 8, 0, 0, 25 /* 16-23 */ 779 .byte 0, 0, 0, 0, 0, 21, 27, 15 /* 24-31 */ 780 .byte 31, 11, 5, 0, 0, 0, 0, 0 /* 32-39 */ 781 .byte 9, 0, 0, 24, 0, 0, 20, 26 /* 40-47 */ 782 .byte 30, 0, 0, 0, 0, 23, 0, 19 /* 48-55 */ 783 .byte 29, 0, 22, 18, 28, 17, 16, 0 /* 56-63 */ 784 785 /* End of cpuswitch.S */ 786
Indexes created Mon Oct 20 20:10:13 GMT 2025